1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2016 Freescale Semiconductor, Inc. 4 */ 5 6 #ifndef __LS1012ARDB_H__ 7 #define __LS1012ARDB_H__ 8 9 #include "ls1012a_common.h" 10 11 /* DDR */ 12 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 13 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 14 #define CONFIG_NR_DRAM_BANKS 2 15 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 16 #define CONFIG_CMD_MEMINFO 17 #define CONFIG_SYS_MEMTEST_START 0x80000000 18 #define CONFIG_SYS_MEMTEST_END 0x9fffffff 19 20 21 /* 22 * I2C IO expander 23 */ 24 25 #define I2C_MUX_IO_ADDR 0x24 26 #define I2C_MUX_IO2_ADDR 0x25 27 #define I2C_MUX_IO_0 0 28 #define I2C_MUX_IO_1 1 29 #define SW_BOOT_MASK 0x03 30 #define SW_BOOT_EMU 0x02 31 #define SW_BOOT_BANK1 0x00 32 #define SW_BOOT_BANK2 0x01 33 #define SW_REV_MASK 0xF8 34 #define SW_REV_A 0xF8 35 #define SW_REV_B 0xF0 36 #define SW_REV_C 0xE8 37 #define SW_REV_C1 0xE0 38 #define SW_REV_C2 0xD8 39 #define SW_REV_D 0xD0 40 #define SW_REV_E 0xC8 41 #define __PHY_MASK 0xF9 42 #define __PHY_ETH2_MASK 0xFB 43 #define __PHY_ETH1_MASK 0xFD 44 45 /* MMC */ 46 #ifdef CONFIG_MMC 47 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 48 #endif 49 50 51 #define CONFIG_PCIE1 /* PCIE controller 1 */ 52 53 #define CONFIG_PCI_SCAN_SHOW 54 55 #define CONFIG_CMD_MEMINFO 56 #define CONFIG_SYS_MEMTEST_START 0x80000000 57 #define CONFIG_SYS_MEMTEST_END 0x9fffffff 58 59 #undef CONFIG_EXTRA_ENV_SETTINGS 60 #define CONFIG_EXTRA_ENV_SETTINGS \ 61 "verify=no\0" \ 62 "fdt_high=0xffffffffffffffff\0" \ 63 "initrd_high=0xffffffffffffffff\0" \ 64 "fdt_addr=0x00f00000\0" \ 65 "kernel_addr=0x01000000\0" \ 66 "kernelheader_addr=0x800000\0" \ 67 "scriptaddr=0x80000000\0" \ 68 "scripthdraddr=0x80080000\0" \ 69 "fdtheader_addr_r=0x80100000\0" \ 70 "kernelheader_addr_r=0x80200000\0" \ 71 "kernel_addr_r=0x81000000\0" \ 72 "fdt_addr_r=0x90000000\0" \ 73 "load_addr=0xa0000000\0" \ 74 "kernel_size=0x2800000\0" \ 75 "kernelheader_size=0x40000\0" \ 76 "console=ttyS0,115200\0" \ 77 BOOTENV \ 78 "boot_scripts=ls1012ardb_boot.scr\0" \ 79 "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ 80 "scan_dev_for_boot_part=" \ 81 "part list ${devtype} ${devnum} devplist; " \ 82 "env exists devplist || setenv devplist 1; " \ 83 "for distro_bootpart in ${devplist}; do " \ 84 "if fstype ${devtype} " \ 85 "${devnum}:${distro_bootpart} " \ 86 "bootfstype; then " \ 87 "run scan_dev_for_boot; " \ 88 "fi; " \ 89 "done\0" \ 90 "scan_dev_for_boot=" \ 91 "echo Scanning ${devtype} " \ 92 "${devnum}:${distro_bootpart}...; " \ 93 "for prefix in ${boot_prefixes}; do " \ 94 "run scan_dev_for_scripts; " \ 95 "done;" \ 96 "\0" \ 97 "boot_a_script=" \ 98 "load ${devtype} ${devnum}:${distro_bootpart} " \ 99 "${scriptaddr} ${prefix}${script}; " \ 100 "env exists secureboot && load ${devtype} " \ 101 "${devnum}:${distro_bootpart} " \ 102 "${scripthdraddr} ${prefix}${boot_script_hdr} " \ 103 "&& esbc_validate ${scripthdraddr};" \ 104 "source ${scriptaddr}\0" \ 105 "installer=load mmc 0:2 $load_addr " \ 106 "/flex_installer_arm64.itb; " \ 107 "bootm $load_addr#$board\0" \ 108 "qspi_bootcmd=echo Trying load from qspi..;" \ 109 "sf probe && sf read $load_addr " \ 110 "$kernel_addr $kernel_size; env exists secureboot " \ 111 "&& sf read $kernelheader_addr_r $kernelheader_addr " \ 112 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ 113 "bootm $load_addr#$board\0" 114 115 #undef CONFIG_BOOTCOMMAND 116 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ 117 "env exists secureboot && esbc_halt;" 118 119 #include <asm/fsl_secure_boot.h> 120 121 #endif /* __LS1012ARDB_H__ */ 122
