1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Boundary Devices Nitrogen6X 6 * and Freescale i.MX6Q Sabre Lite boards. 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #define CONFIG_MACH_TYPE 3769 15 16 /* Size of malloc() pool */ 17 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 18 19 #define CONFIG_MISC_INIT_R 20 #define CONFIG_USBD_HS 21 #define CONFIG_NETCONSOLE 22 23 #define CONFIG_MXC_UART 24 #define CONFIG_MXC_UART_BASE UART2_BASE 25 26 #ifdef CONFIG_CMD_SF 27 #define CONFIG_SF_DEFAULT_BUS 0 28 #define CONFIG_SF_DEFAULT_CS 0 29 #define CONFIG_SF_DEFAULT_SPEED 25000000 30 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 31 #endif 32 33 /* I2C Configs */ 34 #define CONFIG_SYS_I2C 35 #define CONFIG_SYS_I2C_MXC 36 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 37 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 38 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 39 #define CONFIG_SYS_I2C_SPEED 100000 40 #define CONFIG_I2C_EDID 41 42 /* MMC Configs */ 43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 44 #define CONFIG_SYS_FSL_USDHC_NUM 2 45 46 /* 47 * SATA Configs 48 */ 49 #ifdef CONFIG_CMD_SATA 50 #define CONFIG_SYS_SATA_MAX_DEVICE 1 51 #define CONFIG_DWC_AHSATA_PORT_ID 0 52 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 53 #define CONFIG_LBA48 54 #endif 55 56 #define CONFIG_FEC_MXC 57 #define CONFIG_MII 58 #define IMX_FEC_BASE ENET_BASE_ADDR 59 #define CONFIG_FEC_XCV_TYPE RGMII 60 #define CONFIG_ETHPRIME "FEC" 61 #define CONFIG_FEC_MXC_PHYADDR 6 62 63 /* USB Configs */ 64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 65 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 66 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 67 #define CONFIG_MXC_USB_FLAGS 0 68 69 /* Framebuffer and LCD */ 70 #define CONFIG_VIDEO_IPUV3 71 #define CONFIG_VIDEO_BMP_RLE8 72 #define CONFIG_SPLASH_SCREEN 73 #define CONFIG_SPLASH_SCREEN_ALIGN 74 #define CONFIG_VIDEO_BMP_GZIP 75 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) 76 #define CONFIG_BMP_16BPP 77 #define CONFIG_IMX_HDMI 78 #define CONFIG_IMX_VIDEO_SKIP 79 80 #define CONFIG_PREBOOT "" 81 82 #ifdef CONFIG_CMD_MMC 83 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) 84 #else 85 #define DISTRO_BOOT_DEV_MMC(func) 86 #endif 87 88 #ifdef CONFIG_CMD_SATA 89 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0) 90 #else 91 #define DISTRO_BOOT_DEV_SATA(func) 92 #endif 93 94 #ifdef CONFIG_USB_STORAGE 95 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0) 96 #else 97 #define DISTRO_BOOT_DEV_USB(func) 98 #endif 99 100 #ifdef CONFIG_CMD_PXE 101 #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) 102 #else 103 #define DISTRO_BOOT_DEV_PXE(func) 104 #endif 105 106 #ifdef CONFIG_CMD_DHCP 107 #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) 108 #else 109 #define DISTRO_BOOT_DEV_DHCP(func) 110 #endif 111 112 113 #if defined(CONFIG_SABRELITE) 114 #define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0" 115 #else 116 /* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */ 117 #define FDTFILE 118 #endif 119 120 #define BOOT_TARGET_DEVICES(func) \ 121 DISTRO_BOOT_DEV_MMC(func) \ 122 DISTRO_BOOT_DEV_SATA(func) \ 123 DISTRO_BOOT_DEV_USB(func) \ 124 DISTRO_BOOT_DEV_PXE(func) \ 125 DISTRO_BOOT_DEV_DHCP(func) 126 127 #include <config_distro_bootcmd.h> 128 129 #define CONFIG_EXTRA_ENV_SETTINGS \ 130 "console=ttymxc1\0" \ 131 "fdt_high=0xffffffff\0" \ 132 "initrd_high=0xffffffff\0" \ 133 "fdt_addr_r=0x18000000\0" \ 134 FDTFILE \ 135 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 136 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 137 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 138 "ramdisk_addr_r=0x13000000\0" \ 139 "ramdiskaddr=0x13000000\0" \ 140 "ip_dyn=yes\0" \ 141 "usb_pgood_delay=2000\0" \ 142 BOOTENV 143 144 /* Miscellaneous configurable options */ 145 #define CONFIG_SYS_MEMTEST_START 0x10000000 146 #define CONFIG_SYS_MEMTEST_END 0x10010000 147 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 148 149 /* Physical Memory Map */ 150 #define CONFIG_NR_DRAM_BANKS 1 151 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 152 153 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 154 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 155 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 156 157 #define CONFIG_SYS_INIT_SP_OFFSET \ 158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 159 #define CONFIG_SYS_INIT_SP_ADDR \ 160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 161 162 /* Environment organization */ 163 #define CONFIG_ENV_SIZE (8 * 1024) 164 165 #if defined(CONFIG_ENV_IS_IN_MMC) 166 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 167 #define CONFIG_SYS_MMC_ENV_DEV 0 168 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 169 #define CONFIG_ENV_OFFSET (768 * 1024) 170 #define CONFIG_ENV_SECT_SIZE (8 * 1024) 171 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 172 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 173 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 174 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 175 #endif 176 177 /* 178 * PCI express 179 */ 180 #ifdef CONFIG_CMD_PCI 181 #define CONFIG_PCI_SCAN_SHOW 182 #define CONFIG_PCIE_IMX 183 #endif 184 185 #endif /* __CONFIG_H */ 186
