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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright (C) 2011 Samsung Electronics
      4  *
      5  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
      6  */
      7 
      8 #ifndef __CONFIG_ORIGEN_H
      9 #define __CONFIG_ORIGEN_H
     10 
     11 #include <configs/exynos4-common.h>
     12 
     13 /* High Level Configuration Options */
     14 #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
     15 #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
     16 
     17 #define CONFIG_SYS_DCACHE_OFF		1
     18 
     19 /* ORIGEN has 4 bank of DRAM */
     20 #define CONFIG_NR_DRAM_BANKS		4
     21 #define CONFIG_SYS_SDRAM_BASE		0x40000000
     22 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
     23 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
     24 
     25 /* memtest works on */
     26 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
     27 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
     28 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
     29 
     30 #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
     31 
     32 /* select serial console configuration */
     33 #define CONFIG_SERIAL2
     34 
     35 /* Console configuration */
     36 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
     37 
     38 #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
     39 
     40 #define CONFIG_SYS_MONITOR_BASE	0x00000000
     41 
     42 /* Power Down Modes */
     43 #define S5P_CHECK_SLEEP			0x00000BAD
     44 #define S5P_CHECK_DIDLE			0xBAD00000
     45 #define S5P_CHECK_LPA			0xABAD0000
     46 
     47 /* MMC SPL */
     48 #define COPY_BL2_FNPTR_ADDR	0x02020030
     49 #define CONFIG_SPL_TEXT_BASE	0x02021410
     50 
     51 #define CONFIG_EXTRA_ENV_SETTINGS \
     52 	"loadaddr=0x40007000\0" \
     53 	"rdaddr=0x48000000\0" \
     54 	"kerneladdr=0x40007000\0" \
     55 	"ramdiskaddr=0x48000000\0" \
     56 	"console=ttySAC2,115200n8\0" \
     57 	"mmcdev=0\0" \
     58 	"bootenv=uEnv.txt\0" \
     59 	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
     60 	"importbootenv=echo Importing environment from mmc ...; " \
     61 		"env import -t $loadaddr $filesize\0" \
     62         "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
     63         "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
     64                 "source ${loadaddr}\0"
     65 #define CONFIG_BOOTCOMMAND \
     66 	"if mmc rescan; then " \
     67 		"echo SD/MMC found on device ${mmcdev};" \
     68 		"if run loadbootenv; then " \
     69 			"echo Loaded environment from ${bootenv};" \
     70 			"run importbootenv;" \
     71 		"fi;" \
     72 		"if test -n $uenvcmd; then " \
     73 			"echo Running uenvcmd ...;" \
     74 			"run uenvcmd;" \
     75 		"fi;" \
     76 		"if run loadbootscript; then " \
     77 			"run bootscript; " \
     78 		"fi; " \
     79 	"fi;" \
     80 	"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
     81 
     82 #define CONFIG_CLK_1000_400_200
     83 
     84 /* MIU (Memory Interleaving Unit) */
     85 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
     86 
     87 #define CONFIG_SYS_MMC_ENV_DEV		0
     88 #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
     89 #define RESERVE_BLOCK_SIZE		(512)
     90 #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
     91 #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
     92 
     93 #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
     94 
     95 #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
     96 
     97 /* U-Boot copy size from boot Media to DRAM.*/
     98 #define COPY_BL2_SIZE		0x80000
     99 #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
    100 #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
    101 
    102 #endif	/* __CONFIG_H */
    103