1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 4 */ 5 #ifndef __CONFIG_RV1108_COMMON_H 6 #define __CONFIG_RV1108_COMMON_H 7 8 #include <asm/arch/hardware.h> 9 #include "rockchip-common.h" 10 11 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 12 #define CONFIG_SYS_CBSIZE 1024 13 #define CONFIG_SKIP_LOWLEVEL_INIT 14 15 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 16 /* TIMER1,initialized by ddr initialize code */ 17 #define CONFIG_SYS_TIMER_BASE 0x10350020 18 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 19 20 #define CONFIG_SYS_SDRAM_BASE 0x60000000 21 #define CONFIG_NR_DRAM_BANKS 1 22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) 23 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) 24 25 /* rockchip ohci host driver */ 26 #define CONFIG_USB_OHCI_NEW 27 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 28 #endif 29
