1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 4 * Stefano Babic, DENX Software Engineering, sbabic (at) denx.de. 5 * 6 * Copyright (C) 2009 TechNexion Ltd. 7 */ 8 9 #ifndef __TAM3517_H 10 #define __TAM3517_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 16 #include <asm/arch/cpu.h> /* get chip and board defs */ 17 #include <asm/arch/omap.h> 18 19 /* Clock Defines */ 20 #define V_OSCK 26000000 /* Clock output from T2 */ 21 #define V_SCLK (V_OSCK >> 1) 22 23 #define CONFIG_MISC_INIT_R 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 #define CONFIG_REVISION_TAG 29 30 /* 31 * Size of malloc() pool 32 */ 33 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 35 2 * 1024 * 1024) 36 /* 37 * DDR related 38 */ 39 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 40 41 /* 42 * Hardware drivers 43 */ 44 45 /* 46 * NS16550 Configuration 47 */ 48 #define CONFIG_SYS_NS16550_SERIAL 49 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 50 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 51 52 /* 53 * select serial console configuration 54 */ 55 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 56 #define CONFIG_SERIAL1 /* UART1 */ 57 58 /* allow to overwrite serial and ethaddr */ 59 #define CONFIG_ENV_OVERWRITE 60 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 61 115200} 62 /* EHCI */ 63 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 64 65 #define CONFIG_SYS_I2C 66 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 67 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 68 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 69 70 /* 71 * Board NAND Info. 72 */ 73 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 74 /* to access */ 75 /* nand at CS0 */ 76 77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 78 /* NAND devices */ 79 80 /* 81 * Miscellaneous configurable options 82 */ 83 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 84 85 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 86 /* args */ 87 /* memtest works on */ 88 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 89 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 90 0x01F00000) /* 31MB */ 91 92 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 93 /* address */ 94 95 /* 96 * AM3517 has 12 GP timers, they can be driven by the system clock 97 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 98 * This rate is divided by a local divisor. 99 */ 100 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 101 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 102 103 /* 104 * Physical Memory Map 105 */ 106 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 107 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 108 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 109 110 /* 111 * FLASH and environment organization 112 */ 113 114 /* **** PISMO SUPPORT *** */ 115 116 /* Redundant Environment */ 117 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 118 #define CONFIG_ENV_OFFSET 0x180000 119 #define CONFIG_ENV_ADDR 0x180000 120 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 121 2 * CONFIG_SYS_ENV_SECT_SIZE) 122 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 123 124 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 125 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 126 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 127 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 128 CONFIG_SYS_INIT_RAM_SIZE - \ 129 GENERATED_GBL_DATA_SIZE) 130 131 /* 132 * ethernet support, EMAC 133 * 134 */ 135 #define CONFIG_DRIVER_TI_EMAC 136 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 137 #define CONFIG_MII 138 #define CONFIG_BOOTP_DNS2 139 #define CONFIG_BOOTP_SEND_HOSTNAME 140 #define CONFIG_NET_RETRY_COUNT 10 141 142 /* Defines for SPL */ 143 #define CONFIG_SPL_CONSOLE 144 #define CONFIG_SPL_NAND_SOFTECC 145 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 146 147 #define CONFIG_SPL_NAND_BASE 148 #define CONFIG_SPL_NAND_DRIVERS 149 #define CONFIG_SPL_NAND_ECC 150 151 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 152 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 153 CONFIG_SPL_TEXT_BASE) 154 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 155 156 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 157 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 158 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 159 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 160 161 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 162 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 163 164 /* FAT */ 165 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 166 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 167 168 /* RAW SD card / eMMC */ 169 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 170 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 171 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 172 173 /* NAND boot config */ 174 #define CONFIG_SYS_NAND_PAGE_COUNT 64 175 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 176 #define CONFIG_SYS_NAND_OOBSIZE 64 177 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 178 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 179 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 180 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 181 48, 49, 50, 51, 52, 53, 54, 55,\ 182 56, 57, 58, 59, 60, 61, 62, 63} 183 #define CONFIG_SYS_NAND_ECCSIZE 256 184 #define CONFIG_SYS_NAND_ECCBYTES 3 185 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 186 187 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 188 189 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 190 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 191 192 #define CONFIG_MTD_PARTITIONS 193 #define CONFIG_MTD_DEVICE 194 195 /* Setup MTD for NAND on the SOM */ 196 197 #define CONFIG_TAM3517_SETTINGS \ 198 "netdev=eth0\0" \ 199 "nandargs=setenv bootargs root=${nandroot} " \ 200 "rootfstype=${nandrootfstype}\0" \ 201 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 202 "nfsroot=${serverip}:${rootpath}\0" \ 203 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 204 "addip_sta=setenv bootargs ${bootargs} " \ 205 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 206 ":${hostname}:${netdev}:off panic=1\0" \ 207 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 208 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 209 "else run addip_sta;fi\0" \ 210 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 211 "addtty=setenv bootargs ${bootargs}" \ 212 " console=ttyO0,${baudrate}\0" \ 213 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 214 "loadaddr=82000000\0" \ 215 "kernel_addr_r=82000000\0" \ 216 "hostname=" CONFIG_HOSTNAME "\0" \ 217 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 218 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 219 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 220 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 221 "bootm ${kernel_addr}\0" \ 222 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 223 "nand read ${kernel_addr_r} kernel\0" \ 224 "bootm ${kernel_addr_r}\0" \ 225 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 226 "run nfsargs addip addtty addmtd addmisc;" \ 227 "bootm ${kernel_addr_r}\0" \ 228 "net_self=if run net_self_load;then " \ 229 "run ramargs addip addtty addmtd addmisc;" \ 230 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 231 "else echo Images not loades;fi\0" \ 232 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ 233 "load=tftp ${loadaddr} ${u-boot}\0" \ 234 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 235 "mlo=" CONFIG_HOSTNAME "/MLO\0" \ 236 "uboot_addr=0x80000\0" \ 237 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 238 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 239 "updatemlo=nandecc hw;nand erase 0 20000;" \ 240 "nand write ${loadaddr} 0 20000\0" \ 241 "upd=if run load;then echo Updating u-boot;if run update;" \ 242 "then echo U-Boot updated;" \ 243 "else echo Error updating u-boot !;" \ 244 "echo Board without bootloader !!;" \ 245 "fi;" \ 246 "else echo U-Boot not downloaded..exiting;fi\0" \ 247 248 /* 249 * this is common code for all TAM3517 boards. 250 * MAC address is stored from manufacturer in 251 * I2C EEPROM 252 */ 253 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 254 /* 255 * The I2C EEPROM on the TAM3517 contains 256 * mac address and production data 257 */ 258 struct tam3517_module_info { 259 char customer[48]; 260 char product[48]; 261 262 /* 263 * bit 0~47 : sequence number 264 * bit 48~55 : week of year, from 0. 265 * bit 56~63 : year 266 */ 267 unsigned long long sequence_number; 268 269 /* 270 * bit 0~7 : revision fixed 271 * bit 8~15 : revision major 272 * bit 16~31 : TNxxx 273 */ 274 unsigned int revision; 275 unsigned char eth_addr[4][8]; 276 unsigned char _rev[100]; 277 }; 278 279 #define TAM3517_READ_EEPROM(info, ret) \ 280 do { \ 281 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 282 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 283 (void *)info, sizeof(*info))) \ 284 ret = 1; \ 285 else \ 286 ret = 0; \ 287 } while (0) 288 289 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 290 do { \ 291 char buf[80], ethname[20]; \ 292 int i; \ 293 memset(buf, 0, sizeof(buf)); \ 294 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 295 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 296 (info)->eth_addr[i][5], \ 297 (info)->eth_addr[i][4], \ 298 (info)->eth_addr[i][3], \ 299 (info)->eth_addr[i][2], \ 300 (info)->eth_addr[i][1], \ 301 (info)->eth_addr[i][0]); \ 302 \ 303 if (i) \ 304 sprintf(ethname, "eth%daddr", i); \ 305 else \ 306 strcpy(ethname, "ethaddr"); \ 307 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 308 env_set(ethname, buf); \ 309 } \ 310 } while (0) 311 312 /* The following macros are taken from Technexion's documentation */ 313 #define TAM3517_sequence_number(info) \ 314 ((info)->sequence_number % 0x1000000000000LL) 315 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 316 #define TAM3517_year(info) ((info)->sequence_number >> 56) 317 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 318 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 319 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 320 321 #define TAM3517_PRINT_SOM_INFO(info) \ 322 do { \ 323 printf("Vendor:%s\n", (info)->customer); \ 324 printf("SOM: %s\n", (info)->product); \ 325 printf("SeqNr: %02llu%02llu%012llu\n", \ 326 TAM3517_year(info), \ 327 TAM3517_week_of_year(info), \ 328 TAM3517_sequence_number(info)); \ 329 printf("Rev: TN%u %u.%u\n", \ 330 TAM3517_revision_tn(info), \ 331 TAM3517_revision_major(info), \ 332 TAM3517_revision_fixed(info)); \ 333 } while (0) 334 335 #endif 336 337 #endif /* __TAM3517_H */ 338
