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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * (C) Copyright 2013-2015
      4  * NVIDIA Corporation <www.nvidia.com>
      5  */
      6 
      7 #ifndef _TEGRA210_COMMON_H_
      8 #define _TEGRA210_COMMON_H_
      9 
     10 #include "tegra-common.h"
     11 
     12 /*
     13  * NS16550 Configuration
     14  */
     15 #define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */
     16 
     17 /*-----------------------------------------------------------------------
     18  * Physical Memory Map
     19  */
     20 
     21 /* Generic Interrupt Controller */
     22 #define CONFIG_GICV2
     23 
     24 /*
     25  * Memory layout for where various images get loaded by boot scripts:
     26  *
     27  * scriptaddr can be pretty much anywhere that doesn't conflict with something
     28  *   else. Put it above BOOTMAPSZ to eliminate conflicts.
     29  *
     30  * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
     31  *   something else. Put it above BOOTMAPSZ to eliminate conflicts.
     32  *
     33  * kernel_addr_r must be within the first 128M of RAM in order for the
     34  *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
     35  *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
     36  *   should not overlap that area, or the kernel will have to copy itself
     37  *   somewhere else before decompression. Similarly, the address of any other
     38  *   data passed to the kernel shouldn't overlap the start of RAM. Pushing
     39  *   this up to 16M allows for a sizable kernel to be decompressed below the
     40  *   compressed load address.
     41  *
     42  * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
     43  *   the compressed kernel to be up to 16M too.
     44  *
     45  * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
     46  *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
     47  */
     48 #define CONFIG_LOADADDR 0x80080000
     49 #define MEM_LAYOUT_ENV_SETTINGS \
     50 	"scriptaddr=0x90000000\0" \
     51 	"pxefile_addr_r=0x90100000\0" \
     52 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
     53 	"fdt_addr_r=0x82000000\0" \
     54 	"ramdisk_addr_r=0x82100000\0"
     55 
     56 /* For USB EHCI controller */
     57 #define CONFIG_EHCI_IS_TDI
     58 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
     59 
     60 /* GPU needs setup */
     61 #define CONFIG_TEGRA_GPU
     62 
     63 #endif /* _TEGRA210_COMMON_H_ */
     64