1 #ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H 2 #define DT_BINDINGS_MEMORY_TEGRA124_MC_H 3 4 #define TEGRA_SWGROUP_PTC 0 5 #define TEGRA_SWGROUP_DC 1 6 #define TEGRA_SWGROUP_DCB 2 7 #define TEGRA_SWGROUP_AFI 3 8 #define TEGRA_SWGROUP_AVPC 4 9 #define TEGRA_SWGROUP_HDA 5 10 #define TEGRA_SWGROUP_HC 6 11 #define TEGRA_SWGROUP_MSENC 7 12 #define TEGRA_SWGROUP_PPCS 8 13 #define TEGRA_SWGROUP_SATA 9 14 #define TEGRA_SWGROUP_VDE 10 15 #define TEGRA_SWGROUP_MPCORELP 11 16 #define TEGRA_SWGROUP_MPCORE 12 17 #define TEGRA_SWGROUP_ISP2 13 18 #define TEGRA_SWGROUP_XUSB_HOST 14 19 #define TEGRA_SWGROUP_XUSB_DEV 15 20 #define TEGRA_SWGROUP_ISP2B 16 21 #define TEGRA_SWGROUP_TSEC 17 22 #define TEGRA_SWGROUP_A9AVP 18 23 #define TEGRA_SWGROUP_GPU 19 24 #define TEGRA_SWGROUP_SDMMC1A 20 25 #define TEGRA_SWGROUP_SDMMC2A 21 26 #define TEGRA_SWGROUP_SDMMC3A 22 27 #define TEGRA_SWGROUP_SDMMC4A 23 28 #define TEGRA_SWGROUP_VIC 24 29 #define TEGRA_SWGROUP_VI 25 30 31 #endif 32
