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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright 2016 Freescale Semiconductor, Inc.
      4  * Hou Zhiqiang <Zhiqiang.Hou (at) freescale.com>
      5  */
      6 
      7 #ifndef __MC34VR500_H_
      8 #define __MC34VR500_H_
      9 
     10 #include <power/pmic.h>
     11 
     12 #define MC34VR500_I2C_ADDR	0x08
     13 
     14 /* Drivers name */
     15 #define MC34VR500_REGULATOR_DRIVER	"mc34vr500_regulator"
     16 
     17 /* Register map */
     18 enum {
     19 	MC34VR500_DEVICEID		= 0x00,
     20 
     21 	MC34VR500_SILICONREVID		= 0x03,
     22 	MC34VR500_FABID,
     23 	MC34VR500_INTSTAT0,
     24 	MC34VR500_INTMASK0,
     25 	MC34VR500_INTSENSE0,
     26 	MC34VR500_INTSTAT1,
     27 	MC34VR500_INTMASK1,
     28 	MC34VR500_INTSENSE1,
     29 
     30 	MC34VR500_INTSTAT4		= 0x11,
     31 	MC34VR500_INTMASK4,
     32 	MC34VR500_INTSENSE4,
     33 
     34 	MC34VR500_PWRCTL		= 0x1B,
     35 
     36 	MC34VR500_SW1VOLT		= 0x2E,
     37 	MC34VR500_SW1STBY,
     38 	MC34VR500_SW1OFF,
     39 	MC34VR500_SW1MODE,
     40 	MC34VR500_SW1CONF,
     41 	MC34VR500_SW2VOLT,
     42 	MC34VR500_SW2STBY,
     43 	MC34VR500_SW2OFF,
     44 	MC34VR500_SW2MODE,
     45 	MC34VR500_SW2CONF,
     46 
     47 	MC34VR500_SW3VOLT		= 0x3C,
     48 	MC34VR500_SW3STBY,
     49 	MC34VR500_SW3OFF,
     50 	MC34VR500_SW3MODE,
     51 	MC34VR500_SW3CONF,
     52 
     53 	MC34VR500_SW4VOLT		= 0x4A,
     54 	MC34VR500_SW4STBY,
     55 	MC34VR500_SW4OFF,
     56 	MC34VR500_SW4MODE,
     57 	MC34VR500_SW4CONF,
     58 
     59 	MC34VR500_REFOUTCRTRL		= 0x6A,
     60 
     61 	MC34VR500_LDO1CTL		= 0x6D,
     62 	MC34VR500_LDO2CTL,
     63 	MC34VR500_LDO3CTL,
     64 	MC34VR500_LDO4CTL,
     65 	MC34VR500_LDO5CTL,
     66 
     67 	MC34VR500_PAGE_REGISTER		= 0x7F,
     68 
     69 	/* Internal RAM */
     70 	MC34VR500_SW1_VOLT		= 0xA8,
     71 	MC34VR500_SW1_SEQ,
     72 	MC34VR500_SW1_CONFIG,
     73 
     74 	MC34VR500_SW2_VOLT		= 0xAC,
     75 	MC34VR500_SW2_SEQ,
     76 	MC34VR500_SW2_CONFIG,
     77 
     78 	MC34VR500_SW3_VOLT		= 0xB0,
     79 	MC34VR500_SW3_SEQ,
     80 	MC34VR500_SW3_CONFIG,
     81 
     82 	MC34VR500_SW4_VOLT		= 0xB8,
     83 	MC34VR500_SW4_SEQ,
     84 	MC34VR500_SW4_CONFIG,
     85 
     86 	MC34VR500_REFOUT_SEQ		= 0xC4,
     87 
     88 	MC34VR500_LDO1_VOLT		= 0xCC,
     89 	MC34VR500_LDO1_SEQ,
     90 
     91 	MC34VR500_LDO2_VOLT		= 0xD0,
     92 	MC34VR500_LDO2_SEQ,
     93 
     94 	MC34VR500_LDO3_VOLT		= 0xD4,
     95 	MC34VR500_LDO3_SEQ,
     96 
     97 	MC34VR500_LDO4_VOLT		= 0xD8,
     98 	MC34VR500_LDO4_SEQ,
     99 
    100 	MC34VR500_LDO5_VOLT		= 0xDC,
    101 	MC34VR500_LDO5_SEQ,
    102 
    103 	MC34VR500_PU_CONFIG1		= 0xE0,
    104 
    105 	MC34VR500_TBB_POR		= 0xE4,
    106 
    107 	MC34VR500_PWRGD_EN		= 0xE8,
    108 
    109 	MC34VR500_NUM_OF_REGS,
    110 };
    111 
    112 /* Registor offset based on SWxVOLT register */
    113 #define MC34VR500_VOLT_OFFSET	0
    114 #define MC34VR500_STBY_OFFSET	1
    115 #define MC34VR500_OFF_OFFSET	2
    116 #define MC34VR500_MODE_OFFSET	3
    117 #define MC34VR500_CONF_OFFSET	4
    118 
    119 #define SW_MODE_MASK	0xf
    120 #define SW_MODE_SHIFT	0
    121 
    122 #define LDO_VOL_MASK	0xf
    123 #define LDO_EN		(1 << 4)
    124 #define LDO_MODE_SHIFT	4
    125 #define LDO_MODE_MASK	(1 << 4)
    126 #define LDO_MODE_OFF	0
    127 #define LDO_MODE_ON	1
    128 
    129 #define REFOUTEN	(1 << 4)
    130 
    131 /*
    132  * Regulator Mode Control
    133  *
    134  * OFF: The regulator is switched off and the output voltage is discharged.
    135  * PFM: In this mode, the regulator is always in PFM mode, which is useful
    136  *      at light loads for optimized efficiency.
    137  * PWM: In this mode, the regulator is always in PWM mode operation
    138  *	regardless of load conditions.
    139  * APS: In this mode, the regulator moves automatically between pulse
    140  *	skipping mode and PWM mode depending on load conditions.
    141  *
    142  * SWxMODE[3:0]
    143  * Normal Mode  |  Standby Mode	|      value
    144  *   OFF		OFF		0x0
    145  *   PWM		OFF		0x1
    146  *   PFM		OFF		0x3
    147  *   APS		OFF		0x4
    148  *   PWM		PWM		0x5
    149  *   PWM		APS		0x6
    150  *   APS		APS		0x8
    151  *   APS		PFM		0xc
    152  *   PWM		PFM		0xd
    153  */
    154 #define OFF_OFF		0x0
    155 #define PWM_OFF		0x1
    156 #define PFM_OFF		0x3
    157 #define APS_OFF		0x4
    158 #define PWM_PWM		0x5
    159 #define PWM_APS		0x6
    160 #define APS_APS		0x8
    161 #define APS_PFM		0xc
    162 #define PWM_PFM		0xd
    163 
    164 enum swx {
    165 	SW1 = 0,
    166 	SW2,
    167 	SW3,
    168 	SW4,
    169 };
    170 
    171 int mc34vr500_get_sw_volt(uint8_t sw);
    172 int mc34vr500_set_sw_volt(uint8_t sw, int sw_volt);
    173 int power_mc34vr500_init(unsigned char bus);
    174 #endif /* __MC34VR500_PMIC_H_ */
    175