1 /* 2 * SuperH Pin Function Controller Support 3 * Copy from Linux kernel. (include/linux/sh_pfc.h) 4 * 5 * Copyright (C) 2015 Renesas Electronics Corporation 6 * Copyright (c) 2008 Magnus Damm 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #ifndef __SH_PFC_H 14 #define __SH_PFC_H 15 16 typedef unsigned short pinmux_enum_t; 17 typedef unsigned short pinmux_flag_t; 18 19 #define PINMUX_TYPE_NONE 0 20 #define PINMUX_TYPE_FUNCTION 1 21 #define PINMUX_TYPE_GPIO 2 22 #define PINMUX_TYPE_OUTPUT 3 23 #define PINMUX_TYPE_INPUT 4 24 #define PINMUX_TYPE_INPUT_PULLUP 5 25 #define PINMUX_TYPE_INPUT_PULLDOWN 6 26 27 #define PINMUX_FLAG_TYPE (0x7) 28 #define PINMUX_FLAG_WANT_PULLUP (1 << 3) 29 #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4) 30 31 #define PINMUX_FLAG_DBIT_SHIFT 5 32 #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT) 33 #define PINMUX_FLAG_DREG_SHIFT 10 34 #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT) 35 36 struct pinmux_gpio { 37 pinmux_enum_t enum_id; 38 pinmux_flag_t flags; 39 }; 40 41 #define PINMUX_GPIO(gpio, data_or_mark)[gpio] = { data_or_mark } 42 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 43 44 struct pinmux_cfg_reg { 45 unsigned long reg, reg_width, field_width; 46 unsigned long *cnt; 47 pinmux_enum_t *enum_ids; 48 unsigned long *var_field_width; 49 }; 50 51 #define PINMUX_CFG_REG(name, r, r_width, f_width) \ 52 .reg = r, .reg_width = r_width, .field_width = f_width, \ 53 .cnt = (unsigned long [r_width / f_width]) {}, \ 54 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) 55 56 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ 57 .reg = r, .reg_width = r_width, \ 58 .cnt = (unsigned long [r_width]) {}, \ 59 .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \ 60 .enum_ids = (pinmux_enum_t []) 61 62 struct pinmux_data_reg { 63 unsigned long reg, reg_width, reg_shadow; 64 pinmux_enum_t *enum_ids; 65 void *mapped_reg; 66 }; 67 68 #define PINMUX_DATA_REG(name, r, r_width) \ 69 .reg = r, .reg_width = r_width, \ 70 .enum_ids = (pinmux_enum_t [r_width]) \ 71 72 struct pinmux_irq { 73 int irq; 74 pinmux_enum_t *enum_ids; 75 }; 76 77 #define PINMUX_IRQ(irq_nr, ids...) \ 78 { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \ 79 80 struct pinmux_range { 81 pinmux_enum_t begin; 82 pinmux_enum_t end; 83 pinmux_enum_t force; 84 }; 85 86 struct pinmux_info { 87 char *name; 88 pinmux_enum_t reserved_id; 89 struct pinmux_range data; 90 struct pinmux_range input; 91 struct pinmux_range input_pd; 92 struct pinmux_range input_pu; 93 struct pinmux_range output; 94 struct pinmux_range mark; 95 struct pinmux_range function; 96 97 unsigned first_gpio, last_gpio; 98 99 struct pinmux_gpio *gpios; 100 struct pinmux_cfg_reg *cfg_regs; 101 struct pinmux_data_reg *data_regs; 102 103 pinmux_enum_t *gpio_data; 104 unsigned int gpio_data_size; 105 106 struct pinmux_irq *gpio_irq; 107 unsigned int gpio_irq_size; 108 109 struct resource *resource; 110 unsigned int num_resources; 111 unsigned long unlock_reg; 112 }; 113 114 int register_pinmux(struct pinmux_info *pip); 115 int unregister_pinmux(struct pinmux_info *pip); 116 117 /* helper macro for port */ 118 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx) 119 120 #define PORT_10(fn, pfx, sfx) \ 121 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ 122 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ 123 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ 124 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ 125 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx) 126 127 #define PORT_90(fn, pfx, sfx) \ 128 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \ 129 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \ 130 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \ 131 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \ 132 PORT_10(fn, pfx##9, sfx) 133 134 #define _PORT_ALL(pfx, sfx) pfx##_##sfx 135 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA) 136 #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) 137 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused) 138 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK) 139 #define GPIO_GFN(str) PINMUX_GPIO(GPIO_GFN_##str, str##_GMARK) 140 #define GPIO_IFN(str) PINMUX_GPIO(GPIO_IFN_##str, str##_IMARK) 141 142 /* helper macro for pinmux_enum_t */ 143 #define PORT_DATA_I(nr) \ 144 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN) 145 146 #define PORT_DATA_I_PD(nr) \ 147 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 148 PORT##nr##_IN, PORT##nr##_IN_PD) 149 150 #define PORT_DATA_I_PU(nr) \ 151 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 152 PORT##nr##_IN, PORT##nr##_IN_PU) 153 154 #define PORT_DATA_I_PU_PD(nr) \ 155 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 156 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU) 157 158 #define PORT_DATA_O(nr) \ 159 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT) 160 161 #define PORT_DATA_IO(nr) \ 162 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 163 PORT##nr##_IN) 164 165 #define PORT_DATA_IO_PD(nr) \ 166 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 167 PORT##nr##_IN, PORT##nr##_IN_PD) 168 169 #define PORT_DATA_IO_PU(nr) \ 170 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 171 PORT##nr##_IN, PORT##nr##_IN_PU) 172 173 #define PORT_DATA_IO_PU_PD(nr) \ 174 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 175 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU) 176 177 /* helper macro for top 4 bits in PORTnCR */ 178 #define _PCRH(in, in_pd, in_pu, out) \ 179 0, (out), (in), 0, \ 180 0, 0, 0, 0, \ 181 0, 0, (in_pd), 0, \ 182 0, 0, (in_pu), 0 183 184 #define PORTCR(nr, reg) \ 185 { \ 186 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \ 187 _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \ 188 PORT##nr##_IN_PU, PORT##nr##_OUT), \ 189 PORT##nr##_FN0, PORT##nr##_FN1, \ 190 PORT##nr##_FN2, PORT##nr##_FN3, \ 191 PORT##nr##_FN4, PORT##nr##_FN5, \ 192 PORT##nr##_FN6, PORT##nr##_FN7 } \ 193 } 194 195 #endif /* __SH_PFC_H */ 196
