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      1 ; XFAIL: *
      2 ; RUN: rs2spirv_lit_driver.sh %s | FileCheck %s
      3 
      4 target datalayout = "e-p:32:32-i64:64-v128:64:128-n32-S64"
      5 target triple = "armv7-none-linux-gnueabi"
      6 
      7 ; CHECK: %struct___GPUBuffer = OpTypeStruct %uchar
      8 ; CHECK: [[PTR_TYPE:%[a-zA-Z_0-9]+]] = OpTypePointer Uniform %struct___GPUBuffer
      9 
     10 ; CHECK: %__GPUBlock = OpVariable [[PTR_TYPE]] Uniform
     11 
     12 %struct.rs_allocation = type { i32* }
     13 
     14 @a1 = common global %struct.rs_allocation zeroinitializer, align 4
     15 @c1 = common global i8 0, align 1
     16 
     17 ; Function Attrs: nounwind
     18 define <4 x i8> @k1(<4 x i8> %in) #0 {
     19 entry:
     20   %0 = extractelement <4 x i8> %in, i32 0
     21   %conv = zext i8 %0 to i32
     22   %1 = extractelement <4 x i8> %in, i32 1
     23   %conv1 = zext i8 %1 to i32
     24   %.unpack = load i32, i32* bitcast (%struct.rs_allocation* @a1 to i32*), align 4
     25   %2 = insertvalue [1 x i32] undef, i32 %.unpack, 0
     26   %call = tail call <4 x i8> @_Z21rsGetElementAt_uchar413rs_allocationjj([1 x i32] %2, i32 %conv, i32 %conv1) #2
     27   %3 = extractelement <4 x i8> %in, i32 2
     28   %conv2 = zext i8 %3 to i32
     29   %4 = extractelement <4 x i8> %in, i32 3
     30   %conv3 = zext i8 %4 to i32
     31   %.unpack14 = load i32, i32* bitcast (%struct.rs_allocation* @a1 to i32*), align 4
     32   %5 = insertvalue [1 x i32] undef, i32 %.unpack14, 0
     33   tail call void @_Z21rsSetElementAt_uchar413rs_allocationDv4_hjj([1 x i32] %5, <4 x i8> %call, i32 %conv2, i32 %conv3) #2
     34   %6 = load i8, i8* @c1, align 1, !tbaa !13
     35   %conv4 = zext i8 %6 to i32
     36   %7 = extractelement <4 x i8> %call, i32 2
     37   %conv5 = zext i8 %7 to i32
     38   %add = add nuw nsw i32 %conv4, %conv5
     39   %conv6 = trunc i32 %add to i8
     40   %8 = insertelement <4 x i8> %call, i8 %conv6, i32 2
     41   ret <4 x i8> %8
     42 }
     43 
     44 declare <4 x i8> @_Z21rsGetElementAt_uchar413rs_allocationjj([1 x i32], i32, i32) #1
     45 
     46 declare void @_Z21rsSetElementAt_uchar413rs_allocationDv4_hjj([1 x i32], <4 x i8>, i32, i32) #1
     47 
     48 ; Function Attrs: nounwind
     49 define void @.rs.dtor() #0 {
     50 entry:
     51   tail call void @_Z13rsClearObjectP13rs_allocation(%struct.rs_allocation* nonnull @a1) #2
     52   ret void
     53 }
     54 
     55 declare void @_Z13rsClearObjectP13rs_allocation(%struct.rs_allocation*) #1
     56 
     57 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="0" "stackrealign" "target-features"="+long64" "unsafe-fp-math"="false" "use-soft-float"="false" }
     58 attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="0" "stackrealign" "target-features"="+long64" "unsafe-fp-math"="false" "use-soft-float"="false" }
     59 attributes #2 = { nounwind }
     60 
     61 !llvm.module.flags = !{!0, !1}
     62 !llvm.ident = !{!2}
     63 !\23pragma = !{!3, !4, !5}
     64 !\23rs_export_var = !{!6, !7}
     65 !\23rs_object_slots = !{!8}
     66 !\23rs_export_foreach_name = !{!9, !10}
     67 !\23rs_export_foreach = !{!11, !12}
     68 
     69 !0 = !{i32 1, !"wchar_size", i32 4}
     70 !1 = !{i32 1, !"min_enum_size", i32 4}
     71 !2 = !{!"Android clang version 3.8.256229  (based on LLVM 3.8.256229)"}
     72 !3 = !{!"version", !"1"}
     73 !4 = !{!"java_package_name", !"rs2spirv"}
     74 !5 = !{!"rs_fp_relaxed", !""}
     75 !6 = !{!"c1", !"7"}
     76 !7 = !{!"a1", !"20"}
     77 !8 = !{!"1"}
     78 !9 = !{!"root"}
     79 !10 = !{!"k1"}
     80 !11 = !{!"0"}
     81 !12 = !{!"35"}
     82 !13 = !{!14, !14, i64 0}
     83 !14 = !{!"omnipotent char", !15, i64 0}
     84 !15 = !{!"Simple C/C++ TBAA"}
     85