1 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd"> 2 3 <html> 4 5 <head> 6 <title>Bytecode for the Dalvik VM</title> 7 <link rel=stylesheet href="dalvik-bytecode.css"> 8 </head> 9 10 <body> 11 12 <h1>Bytecode for the Dalvik VM</h1> 13 <p>Copyright © 2007 The Android Open Source Project 14 15 <h2>General Design</h2> 16 17 <ul> 18 <li>The machine model and calling conventions are meant to approximately 19 imitate common real architectures and C-style calling conventions: 20 <ul> 21 <li>The VM is register-based, and frames are fixed in size upon creation. 22 Each frame consists of a particular number of registers (specified by 23 the method) as well as any adjunct data needed to execute the method, 24 such as (but not limited to) the program counter and a reference to the 25 <code>.dex</code> file that contains the method. 26 </li> 27 <li>Registers are 32 bits wide. Adjacent register pairs are used for 64-bit 28 values. 29 </li> 30 <li>In terms of bitwise representation, <code>(Object) null == (int) 31 0</code>. 32 </li> 33 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers 34 of the method's invocation frame, in order. Wide arguments consume 35 two registers. Instance methods are passed a <code>this</code> reference 36 as their first argument. 37 </li> 38 </ul> 39 <li>The storage unit in the instruction stream is a 16-bit unsigned quantity. 40 Some bits in some instructions are ignored / must-be-zero. 41 </li> 42 <li>Instructions aren't gratuitously limited to a particular type. For 43 example, instructions that move 32-bit register values without interpretation 44 don't have to specify whether they are moving ints or floats. 45 </li> 46 <li>There are separately enumerated and indexed constant pools for 47 references to strings, types, fields, and methods. 48 </li> 49 <li>Bitwise literal data is represented in-line in the instruction stream.</li> 50 <li>Because, in practice, it is uncommon for a method to need more than 51 16 registers, and because needing more than eight registers <i>is</i> 52 reasonably common, many instructions are limited to only addressing 53 the first 16 54 registers. When reasonably possible, instructions allow references to 55 up to the first 256 registers. In cases where an instruction variant isn't 56 available to address a desired register, it is expected that the register 57 contents get moved from the original register to a low register (before the 58 operation) and/or moved from a low result register to a high register 59 (after the operation). 60 </li> 61 <li>There are several "pseudo-instructions" that are used to hold 62 variable-length data referred to by regular instructions (for example, 63 <code>fill-array-data</code>). Such instructions must never be 64 encountered during the normal flow of execution. In addition, the 65 instructions must be located on even-numbered bytecode offsets (that is, 66 4-byte aligned). In order to meet this requirement, dex generation tools 67 should emit an extra <code>nop</code> instruction as a spacer if such an 68 instruction would otherwise be unaligned. Finally, though not required, 69 it is expected that most tools will choose to emit these instructions at 70 the ends of methods, since otherwise it would likely be the case that 71 additional instructions would be needed to branch around them. 72 </li> 73 <li>When installed on a running system, some instructions may be altered, 74 changing their format, as an install-time static linking optimization. 75 This is to allow for faster execution once linkage is known. 76 See the associated 77 <a href="instruction-formats.html">instruction formats document</a> 78 for the suggested variants. The word "suggested" is used advisedly; 79 it is not mandatory to implement these. 80 </li> 81 <li>Human-syntax and mnemonics: 82 <ul> 83 <li>Dest-then-source ordering for arguments.</li> 84 <li>Some opcodes have a disambiguating suffix with respect to the type(s) 85 they operate on: Type-general 64-bit opcodes 86 are suffixed with <code>-wide</code>. 87 Type-specific opcodes are suffixed with their type (or a 88 straightforward abbreviation), one of: <code>-boolean</code> 89 <code>-byte</code> <code>-char</code> <code>-short</code> 90 <code>-int</code> <code>-long</code> <code>-float</code> 91 <code>-double</code> <code>-object</code> <code>-string</code> 92 <code>-class</code> <code>-void</code>. Type-general 32-bit opcodes 93 are unmarked. 94 </li> 95 <li>Some opcodes have a disambiguating suffix to distinguish 96 otherwise-identical operations that have different instruction layouts 97 or options. These suffixes are separated from the main names with a slash 98 ("<code>/</code>") and mainly exist at all to make there be a one-to-one 99 mapping with static constants in the code that generates and interprets 100 executables (that is, to reduce ambiguity for humans). 101 </li> 102 </ul> 103 </li> 104 <li>See the <a href="instruction-formats.html">instruction formats 105 document</a> for more details about the various instruction formats 106 (listed under "Op & Format") as well as details about the opcode 107 syntax. 108 </li> 109 </ul> 110 111 <h2>Summary of Instruction Set</h2> 112 113 <table class="instruc"> 114 <thead> 115 <tr> 116 <th>Op & Format</th> 117 <th>Mnemonic / Syntax</th> 118 <th>Arguments</th> 119 <th>Description</th> 120 </tr> 121 </thead> 122 <tbody> 123 <tr> 124 <td>00 10x</td> 125 <td>nop</td> 126 <td> </td> 127 <td>Waste cycles.</td> 128 </tr> 129 <tr> 130 <td>01 12x</td> 131 <td>move vA, vB</td> 132 <td><code>A:</code> destination register (4 bits)<br/> 133 <code>B:</code> source register (4 bits)</td> 134 <td>Move the contents of one non-object register to another.</td> 135 </tr> 136 <tr> 137 <td>02 22x</td> 138 <td>move/from16 vAA, vBBBB</td> 139 <td><code>A:</code> destination register (8 bits)<br/> 140 <code>B:</code> source register (16 bits)</td> 141 <td>Move the contents of one non-object register to another.</td> 142 </tr> 143 <tr> 144 <td>03 32x</td> 145 <td>move/16 vAAAA, vBBBB</td> 146 <td><code>A:</code> destination register (16 bits)<br/> 147 <code>B:</code> source register (16 bits)</td> 148 <td>Move the contents of one non-object register to another.</td> 149 </tr> 150 <tr> 151 <td>04 12x</td> 152 <td>move-wide vA, vB</td> 153 <td><code>A:</code> destination register pair (4 bits)<br/> 154 <code>B:</code> source register pair (4 bits)</td> 155 <td>Move the contents of one register-pair to another. 156 <p><b>Note:</b> 157 It is legal to move from <code>v<i>N</i></code> to either 158 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations 159 must arrange for both halves of a register pair to be read before 160 anything is written.</p> 161 </td> 162 </tr> 163 <tr> 164 <td>05 22x</td> 165 <td>move-wide/from16 vAA, vBBBB</td> 166 <td><code>A:</code> destination register pair (8 bits)<br/> 167 <code>B:</code> source register pair (16 bits)</td> 168 <td>Move the contents of one register-pair to another. 169 <p><b>Note:</b> 170 Implementation considerations are the same as <code>move-wide</code>, 171 above.</p> 172 </td> 173 </tr> 174 <tr> 175 <td>06 32x</td> 176 <td>move-wide/16 vAAAA, vBBBB</td> 177 <td><code>A:</code> destination register pair (16 bits)<br/> 178 <code>B:</code> source register pair (16 bits)</td> 179 <td>Move the contents of one register-pair to another. 180 <p><b>Note:</b> 181 Implementation considerations are the same as <code>move-wide</code>, 182 above.</p> 183 </td> 184 </tr> 185 <tr> 186 <td>07 12x</td> 187 <td>move-object vA, vB</td> 188 <td><code>A:</code> destination register (4 bits)<br/> 189 <code>B:</code> source register (4 bits)</td> 190 <td>Move the contents of one object-bearing register to another.</td> 191 </tr> 192 <tr> 193 <td>08 22x</td> 194 <td>move-object/from16 vAA, vBBBB</td> 195 <td><code>A:</code> destination register (8 bits)<br/> 196 <code>B:</code> source register (16 bits)</td> 197 <td>Move the contents of one object-bearing register to another.</td> 198 </tr> 199 <tr> 200 <td>09 32x</td> 201 <td>move-object/16 vAAAA, vBBBB</td> 202 <td><code>A:</code> destination register (16 bits)<br/> 203 <code>B:</code> source register (16 bits)</td> 204 <td>Move the contents of one object-bearing register to another.</td> 205 </tr> 206 <tr> 207 <td>0a 11x</td> 208 <td>move-result vAA</td> 209 <td><code>A:</code> destination register (8 bits)</td> 210 <td>Move the single-word non-object result of the most recent 211 <code>invoke-<i>kind</i></code> into the indicated register. 212 This must be done as the instruction immediately after an 213 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result 214 is not to be ignored; anywhere else is invalid.</td> 215 </tr> 216 <tr> 217 <td>0b 11x</td> 218 <td>move-result-wide vAA</td> 219 <td><code>A:</code> destination register pair (8 bits)</td> 220 <td>Move the double-word result of the most recent 221 <code>invoke-<i>kind</i></code> into the indicated register pair. 222 This must be done as the instruction immediately after an 223 <code>invoke-<i>kind</i></code> whose (double-word) result 224 is not to be ignored; anywhere else is invalid.</td> 225 </tr> 226 <tr> 227 <td>0c 11x</td> 228 <td>move-result-object vAA</td> 229 <td><code>A:</code> destination register (8 bits)</td> 230 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code> 231 into the indicated register. This must be done as the instruction 232 immediately after an <code>invoke-<i>kind</i></code> or 233 <code>filled-new-array</code> 234 whose (object) result is not to be ignored; anywhere else is invalid.</td> 235 </tr> 236 <tr> 237 <td>0d 11x</td> 238 <td>move-exception vAA</td> 239 <td><code>A:</code> destination register (8 bits)</td> 240 <td>Save a just-caught exception into the given register. This should 241 be the first instruction of any exception handler whose caught 242 exception is not to be ignored, and this instruction must <i>only</i> 243 ever occur as the first instruction of an exception handler; anywhere 244 else is invalid.</td> 245 </tr> 246 <tr> 247 <td>0e 10x</td> 248 <td>return-void</td> 249 <td> </td> 250 <td>Return from a <code>void</code> method.</td> 251 </tr> 252 <tr> 253 <td>0f 11x</td> 254 <td>return vAA</td> 255 <td><code>A:</code> return value register (8 bits)</td> 256 <td>Return from a single-width (32-bit) non-object value-returning 257 method. 258 </td> 259 </tr> 260 <tr> 261 <td>10 11x</td> 262 <td>return-wide vAA</td> 263 <td><code>A:</code> return value register-pair (8 bits)</td> 264 <td>Return from a double-width (64-bit) value-returning method.</td> 265 </tr> 266 <tr> 267 <td>11 11x</td> 268 <td>return-object vAA</td> 269 <td><code>A:</code> return value register (8 bits)</td> 270 <td>Return from an object-returning method.</td> 271 </tr> 272 <tr> 273 <td>12 11n</td> 274 <td>const/4 vA, #+B</td> 275 <td><code>A:</code> destination register (4 bits)<br/> 276 <code>B:</code> signed int (4 bits)</td> 277 <td>Move the given literal value (sign-extended to 32 bits) into 278 the specified register.</td> 279 </tr> 280 <tr> 281 <td>13 21s</td> 282 <td>const/16 vAA, #+BBBB</td> 283 <td><code>A:</code> destination register (8 bits)<br/> 284 <code>B:</code> signed int (16 bits)</td> 285 <td>Move the given literal value (sign-extended to 32 bits) into 286 the specified register.</td> 287 </tr> 288 <tr> 289 <td>14 31i</td> 290 <td>const vAA, #+BBBBBBBB</td> 291 <td><code>A:</code> destination register (8 bits)<br/> 292 <code>B:</code> arbitrary 32-bit constant</td> 293 <td>Move the given literal value into the specified register.</td> 294 </tr> 295 <tr> 296 <td>15 21h</td> 297 <td>const/high16 vAA, #+BBBB0000</td> 298 <td><code>A:</code> destination register (8 bits)<br/> 299 <code>B:</code> signed int (16 bits)</td> 300 <td>Move the given literal value (right-zero-extended to 32 bits) into 301 the specified register.</td> 302 </tr> 303 <tr> 304 <td>16 21s</td> 305 <td>const-wide/16 vAA, #+BBBB</td> 306 <td><code>A:</code> destination register (8 bits)<br/> 307 <code>B:</code> signed int (16 bits)</td> 308 <td>Move the given literal value (sign-extended to 64 bits) into 309 the specified register-pair.</td> 310 </tr> 311 <tr> 312 <td>17 31i</td> 313 <td>const-wide/32 vAA, #+BBBBBBBB</td> 314 <td><code>A:</code> destination register (8 bits)<br/> 315 <code>B:</code> signed int (32 bits)</td> 316 <td>Move the given literal value (sign-extended to 64 bits) into 317 the specified register-pair.</td> 318 </tr> 319 <tr> 320 <td>18 51l</td> 321 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td> 322 <td><code>A:</code> destination register (8 bits)<br/> 323 <code>B:</code> arbitrary double-width (64-bit) constant</td> 324 <td>Move the given literal value into 325 the specified register-pair.</td> 326 </tr> 327 <tr> 328 <td>19 21h</td> 329 <td>const-wide/high16 vAA, #+BBBB000000000000</td> 330 <td><code>A:</code> destination register (8 bits)<br/> 331 <code>B:</code> signed int (16 bits)</td> 332 <td>Move the given literal value (right-zero-extended to 64 bits) into 333 the specified register-pair.</td> 334 </tr> 335 <tr> 336 <td>1a 21c</td> 337 <td>const-string vAA, string@BBBB</td> 338 <td><code>A:</code> destination register (8 bits)<br/> 339 <code>B:</code> string index</td> 340 <td>Move a reference to the string specified by the given index into the 341 specified register.</td> 342 </tr> 343 <tr> 344 <td>1b 31c</td> 345 <td>const-string/jumbo vAA, string@BBBBBBBB</td> 346 <td><code>A:</code> destination register (8 bits)<br/> 347 <code>B:</code> string index</td> 348 <td>Move a reference to the string specified by the given index into the 349 specified register.</td> 350 </tr> 351 <tr> 352 <td>1c 21c</td> 353 <td>const-class vAA, type@BBBB</td> 354 <td><code>A:</code> destination register (8 bits)<br/> 355 <code>B:</code> type index</td> 356 <td>Move a reference to the class specified by the given index into the 357 specified register. In the case where the indicated type is primitive, 358 this will store a reference to the primitive type's degenerate 359 class.</td> 360 </tr> 361 <tr> 362 <td>1d 11x</td> 363 <td>monitor-enter vAA</td> 364 <td><code>A:</code> reference-bearing register (8 bits)</td> 365 <td>Acquire the monitor for the indicated object.</td> 366 </tr> 367 <tr> 368 <td>1e 11x</td> 369 <td>monitor-exit vAA</td> 370 <td><code>A:</code> reference-bearing register (8 bits)</td> 371 <td>Release the monitor for the indicated object. 372 <p><b>Note:</b> 373 If this instruction needs to throw an exception, it must do 374 so as if the pc has already advanced past the instruction. 375 It may be useful to think of this as the instruction successfully 376 executing (in a sense), and the exception getting thrown <i>after</i> 377 the instruction but <i>before</i> the next one gets a chance to 378 run. This definition makes it possible for a method to use 379 a monitor cleanup catch-all (e.g., <code>finally</code>) block as 380 the monitor cleanup for that block itself, as a way to handle the 381 arbitrary exceptions that might get thrown due to the historical 382 implementation of <code>Thread.stop()</code>, while still managing 383 to have proper monitor hygiene.</p> 384 </td> 385 </tr> 386 <tr> 387 <td>1f 21c</td> 388 <td>check-cast vAA, type@BBBB</td> 389 <td><code>A:</code> reference-bearing register (8 bits)<br/> 390 <code>B:</code> type index (16 bits)</td> 391 <td>Throw a <code>ClassCastException</code> if the reference in the 392 given register cannot be cast to the indicated type. 393 <p><b>Note:</b> Since <code>A</code> must always be a reference 394 (and not a primitive value), this will necessarily fail at runtime 395 (that is, it will throw an exception) if <code>B</code> refers to a 396 primitive type.</p> 397 </td> 398 </tr> 399 <tr> 400 <td>20 22c</td> 401 <td>instance-of vA, vB, type@CCCC</td> 402 <td><code>A:</code> destination register (4 bits)<br/> 403 <code>B:</code> reference-bearing register (4 bits)<br/> 404 <code>C:</code> type index (16 bits)</td> 405 <td>Store in the given destination register <code>1</code> 406 if the indicated reference is an instance of the given type, 407 or <code>0</code> if not. 408 <p><b>Note:</b> Since <code>B</code> must always be a reference 409 (and not a primitive value), this will always result 410 in <code>0</code> being stored if <code>C</code> refers to a primitive 411 type.</td> 412 </tr> 413 <tr> 414 <td>21 12x</td> 415 <td>array-length vA, vB</td> 416 <td><code>A:</code> destination register (4 bits)<br/> 417 <code>B:</code> array reference-bearing register (4 bits)</td> 418 <td>Store in the given destination register the length of the indicated 419 array, in entries</td> 420 </tr> 421 <tr> 422 <td>22 21c</td> 423 <td>new-instance vAA, type@BBBB</td> 424 <td><code>A:</code> destination register (8 bits)<br/> 425 <code>B:</code> type index</td> 426 <td>Construct a new instance of the indicated type, storing a 427 reference to it in the destination. The type must refer to a 428 non-array class.</td> 429 </tr> 430 <tr> 431 <td>23 22c</td> 432 <td>new-array vA, vB, type@CCCC</td> 433 <td><code>A:</code> destination register (8 bits)<br/> 434 <code>B:</code> size register<br/> 435 <code>C:</code> type index</td> 436 <td>Construct a new array of the indicated type and size. The type 437 must be an array type.</td> 438 </tr> 439 <tr> 440 <td>24 35c</td> 441 <td>filled-new-array {vD, vE, vF, vG, vA}, type@CCCC</td> 442 <td><code>B:</code> array size and argument word count (4 bits)<br/> 443 <code>C:</code> type index (16 bits)<br/> 444 <code>D..G, A:</code> argument registers (4 bits each)</td> 445 <td>Construct an array of the given type and size, filling it with the 446 supplied contents. The type must be an array type. The array's 447 contents must be single-word (that is, 448 no arrays of <code>long</code> or <code>double</code>, but reference 449 types are acceptable). The constructed 450 instance is stored as a "result" in the same way that the method invocation 451 instructions store their results, so the constructed instance must 452 be moved to a register with an immediately subsequent 453 <code>move-result-object</code> instruction (if it is to be used).</td> 454 </tr> 455 <tr> 456 <td>25 3rc</td> 457 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td> 458 <td><code>A:</code> array size and argument word count (8 bits)<br/> 459 <code>B:</code> type index (16 bits)<br/> 460 <code>C:</code> first argument register (16 bits)<br/> 461 <code>N = A + C - 1</code></td> 462 <td>Construct an array of the given type and size, filling it with 463 the supplied contents. Clarifications and restrictions are the same 464 as <code>filled-new-array</code>, described above.</td> 465 </tr> 466 <tr> 467 <td>26 31t</td> 468 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified 469 below in "<code>fill-array-data</code> Format")</i></td> 470 <td><code>A:</code> array reference (8 bits)<br/> 471 <code>B:</code> signed "branch" offset to table data pseudo-instruction 472 (32 bits) 473 </td> 474 <td>Fill the given array with the indicated data. The reference must be 475 to an array of primitives, and the data table must match it in type and 476 must contain no more elements than will fit in the array. That is, 477 the array may be larger than the table, and if so, only the initial 478 elements of the array are set, leaving the remainder alone. 479 </td> 480 </tr> 481 <tr> 482 <td>27 11x</td> 483 <td>throw vAA</td> 484 <td><code>A:</code> exception-bearing register (8 bits)<br/></td> 485 <td>Throw the indicated exception.</td> 486 </tr> 487 <tr> 488 <td>28 10t</td> 489 <td>goto +AA</td> 490 <td><code>A:</code> signed branch offset (8 bits)</td> 491 <td>Unconditionally jump to the indicated instruction. 492 <p><b>Note:</b> 493 The branch offset must not be <code>0</code>. (A spin 494 loop may be legally constructed either with <code>goto/32</code> or 495 by including a <code>nop</code> as a target before the branch.)</p> 496 </td> 497 </tr> 498 <tr> 499 <td>29 20t</td> 500 <td>goto/16 +AAAA</td> 501 <td><code>A:</code> signed branch offset (16 bits)<br/></td> 502 <td>Unconditionally jump to the indicated instruction. 503 <p><b>Note:</b> 504 The branch offset must not be <code>0</code>. (A spin 505 loop may be legally constructed either with <code>goto/32</code> or 506 by including a <code>nop</code> as a target before the branch.)</p> 507 </td> 508 </tr> 509 <tr> 510 <td>2a 30t</td> 511 <td>goto/32 +AAAAAAAA</td> 512 <td><code>A:</code> signed branch offset (32 bits)<br/></td> 513 <td>Unconditionally jump to the indicated instruction.</td> 514 </tr> 515 <tr> 516 <td>2b 31t</td> 517 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as 518 specified below in "<code>packed-switch</code> Format")</i></td> 519 <td><code>A:</code> register to test<br/> 520 <code>B:</code> signed "branch" offset to table data pseudo-instruction 521 (32 bits) 522 </td> 523 <td>Jump to a new instruction based on the value in the 524 given register, using a table of offsets corresponding to each value 525 in a particular integral range, or fall through to the next 526 instruction if there is no match. 527 </td> 528 </tr> 529 <tr> 530 <td>2c 31t</td> 531 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as 532 specified below in "<code>sparse-switch</code> Format")</i></td> 533 <td><code>A:</code> register to test<br/> 534 <code>B:</code> signed "branch" offset to table data pseudo-instruction 535 (32 bits) 536 </td> 537 <td>Jump to a new instruction based on the value in the given 538 register, using an ordered table of value-offset pairs, or fall 539 through to the next instruction if there is no match. 540 </td> 541 </tr> 542 <tr> 543 <td>2d..31 23x</td> 544 <td>cmp<i>kind</i> vAA, vBB, vCC<br/> 545 2d: cmpl-float <i>(lt bias)</i><br/> 546 2e: cmpg-float <i>(gt bias)</i><br/> 547 2f: cmpl-double <i>(lt bias)</i><br/> 548 30: cmpg-double <i>(gt bias)</i><br/> 549 31: cmp-long 550 </td> 551 <td><code>A:</code> destination register (8 bits)<br/> 552 <code>B:</code> first source register or pair<br/> 553 <code>C:</code> second source register or pair</td> 554 <td>Perform the indicated floating point or <code>long</code> comparison, 555 storing <code>0</code> if the two arguments are equal, <code>1</code> 556 if the second argument is larger, or <code>-1</code> if the first 557 argument is larger. The "bias" listed for the floating point operations 558 indicates how <code>NaN</code> comparisons are treated: "Gt bias" 559 instructions return <code>1</code> for <code>NaN</code> comparisons, 560 and "lt bias" instructions return 561 <code>-1</code>. 562 <p>For example, to check to see if floating point 563 <code>a < b</code>, then it is advisable to use 564 <code>cmpg-float</code>; a result of <code>-1</code> indicates that 565 the test was true, and the other values indicate it was false either 566 due to a valid comparison or because one or the other values was 567 <code>NaN</code>.</p> 568 </td> 569 </tr> 570 <tr> 571 <td>32..37 22t</td> 572 <td>if-<i>test</i> vA, vB, +CCCC<br/> 573 32: if-eq<br/> 574 33: if-ne<br/> 575 34: if-lt<br/> 576 35: if-ge<br/> 577 36: if-gt<br/> 578 37: if-le<br/> 579 </td> 580 <td><code>A:</code> first register to test (4 bits)<br/> 581 <code>B:</code> second register to test (4 bits)<br/> 582 <code>C:</code> signed branch offset (16 bits)</td> 583 <td>Branch to the given destination if the given two registers' values 584 compare as specified. 585 <p><b>Note:</b> 586 The branch offset must not be <code>0</code>. (A spin 587 loop may be legally constructed either by branching around a 588 backward <code>goto</code> or by including a <code>nop</code> as 589 a target before the branch.)</p> 590 </td> 591 </tr> 592 <tr> 593 <td>38..3d 21t</td> 594 <td>if-<i>test</i>z vAA, +BBBB<br/> 595 38: if-eqz<br/> 596 39: if-nez<br/> 597 3a: if-ltz<br/> 598 3b: if-gez<br/> 599 3c: if-gtz<br/> 600 3d: if-lez<br/> 601 </td> 602 <td><code>A:</code> register to test (8 bits)<br/> 603 <code>B:</code> signed branch offset (16 bits)</td> 604 <td>Branch to the given destination if the given register's value compares 605 with 0 as specified. 606 <p><b>Note:</b> 607 The branch offset must not be <code>0</code>. (A spin 608 loop may be legally constructed either by branching around a 609 backward <code>goto</code> or by including a <code>nop</code> as 610 a target before the branch.)</p> 611 </td> 612 </tr> 613 <tr> 614 <td>3e..43 10x</td> 615 <td><i>(unused)</i></td> 616 <td> </td> 617 <td><i>(unused)</i></td> 618 </tr> 619 <tr> 620 <td>44..51 23x</td> 621 <td><i>arrayop</i> vAA, vBB, vCC<br/> 622 44: aget<br/> 623 45: aget-wide<br/> 624 46: aget-object<br/> 625 47: aget-boolean<br/> 626 48: aget-byte<br/> 627 49: aget-char<br/> 628 4a: aget-short<br/> 629 4b: aput<br/> 630 4c: aput-wide<br/> 631 4d: aput-object<br/> 632 4e: aput-boolean<br/> 633 4f: aput-byte<br/> 634 50: aput-char<br/> 635 51: aput-short 636 </td> 637 <td><code>A:</code> value register or pair; may be source or dest 638 (8 bits)<br/> 639 <code>B:</code> array register (8 bits)<br/> 640 <code>C:</code> index register (8 bits)</td> 641 <td>Perform the identified array operation at the identified index of 642 the given array, loading or storing into the value register.</td> 643 </tr> 644 <tr> 645 <td>52..5f 22c</td> 646 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/> 647 52: iget<br/> 648 53: iget-wide<br/> 649 54: iget-object<br/> 650 55: iget-boolean<br/> 651 56: iget-byte<br/> 652 57: iget-char<br/> 653 58: iget-short<br/> 654 59: iput<br/> 655 5a: iput-wide<br/> 656 5b: iput-object<br/> 657 5c: iput-boolean<br/> 658 5d: iput-byte<br/> 659 5e: iput-char<br/> 660 5f: iput-short 661 </td> 662 <td><code>A:</code> value register or pair; may be source or dest 663 (4 bits)<br/> 664 <code>B:</code> object register (4 bits)<br/> 665 <code>C:</code> instance field reference index (16 bits)</td> 666 <td>Perform the identified object instance field operation with 667 the identified field, loading or storing into the value register. 668 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 669 altering the field argument to be a more direct offset.</p> 670 </td> 671 </tr> 672 <tr> 673 <td>60..6d 21c</td> 674 <td>s<i>staticop</i> vAA, field@BBBB<br/> 675 60: sget<br/> 676 61: sget-wide<br/> 677 62: sget-object<br/> 678 63: sget-boolean<br/> 679 64: sget-byte<br/> 680 65: sget-char<br/> 681 66: sget-short<br/> 682 67: sput<br/> 683 68: sput-wide<br/> 684 69: sput-object<br/> 685 6a: sput-boolean<br/> 686 6b: sput-byte<br/> 687 6c: sput-char<br/> 688 6d: sput-short 689 </td> 690 <td><code>A:</code> value register or pair; may be source or dest 691 (8 bits)<br/> 692 <code>B:</code> static field reference index (16 bits)</td> 693 <td>Perform the identified object static field operation with the identified 694 static field, loading or storing into the value register. 695 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 696 altering the field argument to be a more direct offset.</p> 697 </td> 698 </tr> 699 <tr> 700 <td>6e..72 35c</td> 701 <td>invoke-<i>kind</i> {vD, vE, vF, vG, vA}, meth@CCCC<br/> 702 6e: invoke-virtual<br/> 703 6f: invoke-super<br/> 704 70: invoke-direct<br/> 705 71: invoke-static<br/> 706 72: invoke-interface 707 </td> 708 <td><code>B:</code> argument word count (4 bits)<br/> 709 <code>C:</code> method index (16 bits)<br/> 710 <code>D..G, A:</code> argument registers (4 bits each)</td> 711 <td>Call the indicated method. The result (if any) may be stored 712 with an appropriate <code>move-result*</code> variant as the immediately 713 subsequent instruction. 714 <p><code>invoke-virtual</code> is used to invoke a normal virtual 715 method (a method that is not <code>static</code> or <code>final</code>, 716 and is not a constructor).</p> 717 <p><code>invoke-super</code> is used to invoke the closest superclass's 718 virtual method (as opposed to the one with the same <code>method_id</code> 719 in the calling class).</p> 720 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code> 721 direct method (that is, an instance method that is by its nature 722 non-overridable, namely either a <code>private</code> instance method 723 or a constructor).</p> 724 <p><code>invoke-static</code> is used to invoke a <code>static</code> 725 method (which is always considered a direct method).</p> 726 <p><code>invoke-interface</code> is used to invoke an 727 <code>interface</code> method, that is, on an object whose concrete 728 class isn't known, using a <code>method_id</code> that refers to 729 an <code>interface</code>.</p> 730 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 731 altering the method argument to be a more direct offset 732 (or pair thereof).</p> 733 </td> 734 </tr> 735 <tr> 736 <td>73 10x</td> 737 <td><i>(unused)</i></td> 738 <td> </td> 739 <td><i>(unused)</i></td> 740 </tr> 741 <tr> 742 <td>74..78 3rc</td> 743 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/> 744 74: invoke-virtual/range<br/> 745 75: invoke-super/range<br/> 746 76: invoke-direct/range<br/> 747 77: invoke-static/range<br/> 748 78: invoke-interface/range 749 </td> 750 <td><code>A:</code> argument word count (8 bits)<br/> 751 <code>B:</code> method index (16 bits)<br/> 752 <code>C:</code> first argument register (16 bits)<br/> 753 <code>N = A + C - 1</code></td> 754 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code> 755 description above for details, caveats, and suggestions. 756 </td> 757 </tr> 758 <tr> 759 <td>79..7a 10x</td> 760 <td><i>(unused)</i></td> 761 <td> </td> 762 <td><i>(unused)</i></td> 763 </tr> 764 <tr> 765 <td>7b..8f 12x</td> 766 <td><i>unop</i> vA, vB<br/> 767 7b: neg-int<br/> 768 7c: not-int<br/> 769 7d: neg-long<br/> 770 7e: not-long<br/> 771 7f: neg-float<br/> 772 80: neg-double<br/> 773 81: int-to-long<br/> 774 82: int-to-float<br/> 775 83: int-to-double<br/> 776 84: long-to-int<br/> 777 85: long-to-float<br/> 778 86: long-to-double<br/> 779 87: float-to-int<br/> 780 88: float-to-long<br/> 781 89: float-to-double<br/> 782 8a: double-to-int<br/> 783 8b: double-to-long<br/> 784 8c: double-to-float<br/> 785 8d: int-to-byte<br/> 786 8e: int-to-char<br/> 787 8f: int-to-short 788 </td> 789 <td><code>A:</code> destination register or pair (4 bits)<br/> 790 <code>B:</code> source register or pair (4 bits)</td> 791 <td>Perform the identified unary operation on the source register, 792 storing the result in the destination register.</td> 793 </tr> 794 795 <tr> 796 <td>90..af 23x</td> 797 <td><i>binop</i> vAA, vBB, vCC<br/> 798 90: add-int<br/> 799 91: sub-int<br/> 800 92: mul-int<br/> 801 93: div-int<br/> 802 94: rem-int<br/> 803 95: and-int<br/> 804 96: or-int<br/> 805 97: xor-int<br/> 806 98: shl-int<br/> 807 99: shr-int<br/> 808 9a: ushr-int<br/> 809 9b: add-long<br/> 810 9c: sub-long<br/> 811 9d: mul-long<br/> 812 9e: div-long<br/> 813 9f: rem-long<br/> 814 a0: and-long<br/> 815 a1: or-long<br/> 816 a2: xor-long<br/> 817 a3: shl-long<br/> 818 a4: shr-long<br/> 819 a5: ushr-long<br/> 820 a6: add-float<br/> 821 a7: sub-float<br/> 822 a8: mul-float<br/> 823 a9: div-float<br/> 824 aa: rem-float<br/> 825 ab: add-double<br/> 826 ac: sub-double<br/> 827 ad: mul-double<br/> 828 ae: div-double<br/> 829 af: rem-double 830 </td> 831 <td><code>A:</code> destination register or pair (8 bits)<br/> 832 <code>B:</code> first source register or pair (8 bits)<br/> 833 <code>C:</code> second source register or pair (8 bits)</td> 834 <td>Perform the identified binary operation on the two source registers, 835 storing the result in the first source register.</td> 836 </tr> 837 <tr> 838 <td>b0..cf 12x</td> 839 <td><i>binop</i>/2addr vA, vB<br/> 840 b0: add-int/2addr<br/> 841 b1: sub-int/2addr<br/> 842 b2: mul-int/2addr<br/> 843 b3: div-int/2addr<br/> 844 b4: rem-int/2addr<br/> 845 b5: and-int/2addr<br/> 846 b6: or-int/2addr<br/> 847 b7: xor-int/2addr<br/> 848 b8: shl-int/2addr<br/> 849 b9: shr-int/2addr<br/> 850 ba: ushr-int/2addr<br/> 851 bb: add-long/2addr<br/> 852 bc: sub-long/2addr<br/> 853 bd: mul-long/2addr<br/> 854 be: div-long/2addr<br/> 855 bf: rem-long/2addr<br/> 856 c0: and-long/2addr<br/> 857 c1: or-long/2addr<br/> 858 c2: xor-long/2addr<br/> 859 c3: shl-long/2addr<br/> 860 c4: shr-long/2addr<br/> 861 c5: ushr-long/2addr<br/> 862 c6: add-float/2addr<br/> 863 c7: sub-float/2addr<br/> 864 c8: mul-float/2addr<br/> 865 c9: div-float/2addr<br/> 866 ca: rem-float/2addr<br/> 867 cb: add-double/2addr<br/> 868 cc: sub-double/2addr<br/> 869 cd: mul-double/2addr<br/> 870 ce: div-double/2addr<br/> 871 cf: rem-double/2addr 872 </td> 873 <td><code>A:</code> destination and first source register or pair 874 (4 bits)<br/> 875 <code>B:</code> second source register or pair (4 bits)</td> 876 <td>Perform the identified binary operation on the two source registers, 877 storing the result in the first source register.</td> 878 </tr> 879 <tr> 880 <td>d0..d7 22s</td> 881 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/> 882 d0: add-int/lit16<br/> 883 d1: rsub-int (reverse subtract)<br/> 884 d2: mul-int/lit16<br/> 885 d3: div-int/lit16<br/> 886 d4: rem-int/lit16<br/> 887 d5: and-int/lit16<br/> 888 d6: or-int/lit16<br/> 889 d7: xor-int/lit16 890 </td> 891 <td><code>A:</code> destination register (4 bits)<br/> 892 <code>B:</code> source register (4 bits)<br/> 893 <code>C:</code> signed int constant (16 bits)</td> 894 <td>Perform the indicated binary op on the indicated register (first 895 argument) and literal value (second argument), storing the result in 896 the destination register. 897 <p><b>Note:</b> 898 <code>rsub-int</code> does not have a suffix since this version is the 899 main opcode of its family. Also, see below for details on its semantics. 900 </p> 901 </td> 902 </tr> 903 <tr> 904 <td>d8..e2 22b</td> 905 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/> 906 d8: add-int/lit8<br/> 907 d9: rsub-int/lit8<br/> 908 da: mul-int/lit8<br/> 909 db: div-int/lit8<br/> 910 dc: rem-int/lit8<br/> 911 dd: and-int/lit8<br/> 912 de: or-int/lit8<br/> 913 df: xor-int/lit8<br/> 914 e0: shl-int/lit8<br/> 915 e1: shr-int/lit8<br/> 916 e2: ushr-int/lit8 917 </td> 918 <td><code>A:</code> destination register (8 bits)<br/> 919 <code>B:</code> source register (8 bits)<br/> 920 <code>C:</code> signed int constant (8 bits)</td> 921 <td>Perform the indicated binary op on the indicated register (first 922 argument) and literal value (second argument), storing the result 923 in the destination register. 924 <p><b>Note:</b> See below for details on the semantics of 925 <code>rsub-int</code>.</p> 926 </td> 927 </tr> 928 <tr> 929 <td>e3..ff 10x</td> 930 <td><i>(unused)</i></td> 931 <td> </td> 932 <td><i>(unused)</i></td> 933 </tr> 934 </tbody> 935 </table> 936 937 <h2><code>packed-switch</code> Format</h2> 938 939 <table class="supplement"> 940 <thead> 941 <tr> 942 <th>Name</th> 943 <th>Format</th> 944 <th>Description</th> 945 </tr> 946 </thead> 947 <tbody> 948 <tr> 949 <td>ident</td> 950 <td>ushort = 0x0100</td> 951 <td>identifying pseudo-opcode</td> 952 </tr> 953 <tr> 954 <td>size</td> 955 <td>ushort</td> 956 <td>number of entries in the table</td> 957 </tr> 958 <tr> 959 <td>first_key</td> 960 <td>int</td> 961 <td>first (and lowest) switch case value</td> 962 </tr> 963 <tr> 964 <td>targets</td> 965 <td>int[]</td> 966 <td>list of <code>size</code> relative branch targets. The targets are 967 relative to the address of the switch opcode, not of this table. 968 </td> 969 </tr> 970 </tbody> 971 </table> 972 973 <p><b>Note:</b> The total number of code units for an instance of this 974 table is <code>(size * 2) + 4</code>.</p> 975 976 <h2><code>sparse-switch</code> Format</h2> 977 978 <table class="supplement"> 979 <thead> 980 <tr> 981 <th>Name</th> 982 <th>Format</th> 983 <th>Description</th> 984 </tr> 985 </thead> 986 <tbody> 987 <tr> 988 <td>ident</td> 989 <td>ushort = 0x0200</td> 990 <td>identifying pseudo-opcode</td> 991 </tr> 992 <tr> 993 <td>size</td> 994 <td>ushort</td> 995 <td>number of entries in the table</td> 996 </tr> 997 <tr> 998 <td>keys</td> 999 <td>int[]</td> 1000 <td>list of <code>size</code> key values, sorted low-to-high</td> 1001 </tr> 1002 <tr> 1003 <td>targets</td> 1004 <td>int[]</td> 1005 <td>list of <code>size</code> relative branch targets, each corresponding 1006 to the key value at the same index. The targets are 1007 relative to the address of the switch opcode, not of this table. 1008 </td> 1009 </tr> 1010 </tbody> 1011 </table> 1012 1013 <p><b>Note:</b> The total number of code units for an instance of this 1014 table is <code>(size * 4) + 2</code>.</p> 1015 1016 <h2><code>fill-array-data</code> Format</h2> 1017 1018 <table class="supplement"> 1019 <thead> 1020 <tr> 1021 <th>Name</th> 1022 <th>Format</th> 1023 <th>Description</th> 1024 </tr> 1025 </thead> 1026 <tbody> 1027 <tr> 1028 <td>ident</td> 1029 <td>ushort = 0x0300</td> 1030 <td>identifying pseudo-opcode</td> 1031 </tr> 1032 <tr> 1033 <td>element_width</td> 1034 <td>ushort</td> 1035 <td>number of bytes in each element</td> 1036 </tr> 1037 <tr> 1038 <td>size</td> 1039 <td>uint</td> 1040 <td>number of elements in the table</td> 1041 </tr> 1042 <tr> 1043 <td>data</td> 1044 <td>ubyte[]</td> 1045 <td>data values</td> 1046 </tr> 1047 </tbody> 1048 </table> 1049 1050 <p><b>Note:</b> The total number of code units for an instance of this 1051 table is <code>(size * element_width + 1) / 2 + 4</code>.</p> 1052 1053 1054 <h2>Mathematical Operation Details</h2> 1055 1056 <p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using 1057 round-to-nearest and gradual underflow, except where stated otherwise.</p> 1058 1059 <table class="math"> 1060 <thead> 1061 <tr> 1062 <th>Opcode</th> 1063 <th>C Semantics</th> 1064 <th>Notes</th> 1065 </tr> 1066 </thead> 1067 <tbody> 1068 <tr> 1069 <td>neg-int</td> 1070 <td>int32 a;<br/> 1071 int32 result = -a; 1072 </td> 1073 <td>Unary twos-complement.</td> 1074 </tr> 1075 <tr> 1076 <td>not-int</td> 1077 <td>int32 a;<br/> 1078 int32 result = ~a; 1079 </td> 1080 <td>Unary ones-complement.</td> 1081 </tr> 1082 <tr> 1083 <td>neg-long</td> 1084 <td>int64 a;<br/> 1085 int64 result = -a; 1086 </td> 1087 <td>Unary twos-complement.</td> 1088 </tr> 1089 <tr> 1090 <td>not-long</td> 1091 <td>int64 a;<br/> 1092 int64 result = ~a; 1093 </td> 1094 <td>Unary ones-complement.</td> 1095 </tr> 1096 <tr> 1097 <td>neg-float</td> 1098 <td>float a;<br/> 1099 float result = -a; 1100 </td> 1101 <td>Floating point negation.</td> 1102 </tr> 1103 <tr> 1104 <td>neg-double</td> 1105 <td>double a;<br/> 1106 double result = -a; 1107 </td> 1108 <td>Floating point negation.</td> 1109 </tr> 1110 <tr> 1111 <td>int-to-long</td> 1112 <td>int32 a;<br/> 1113 int64 result = (int64) a; 1114 </td> 1115 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td> 1116 </tr> 1117 <tr> 1118 <td>int-to-float</td> 1119 <td>int32 a;<br/> 1120 float result = (float) a; 1121 </td> 1122 <td>Conversion of <code>int32</code> to <code>float</code>, using 1123 round-to-nearest. This loses precision for some values. 1124 </td> 1125 </tr> 1126 <tr> 1127 <td>int-to-double</td> 1128 <td>int32 a;<br/> 1129 double result = (double) a; 1130 </td> 1131 <td>Conversion of <code>int32</code> to <code>double</code>.</td> 1132 </tr> 1133 <tr> 1134 <td>long-to-int</td> 1135 <td>int64 a;<br/> 1136 int32 result = (int32) a; 1137 </td> 1138 <td>Truncation of <code>int64</code> into <code>int32</code>.</td> 1139 </tr> 1140 <tr> 1141 <td>long-to-float</td> 1142 <td>int64 a;<br/> 1143 float result = (float) a; 1144 </td> 1145 <td>Conversion of <code>int64</code> to <code>float</code>, using 1146 round-to-nearest. This loses precision for some values. 1147 </td> 1148 </tr> 1149 <tr> 1150 <td>long-to-double</td> 1151 <td>int64 a;<br/> 1152 double result = (double) a; 1153 </td> 1154 <td>Conversion of <code>int64</code> to <code>double</code>, using 1155 round-to-nearest. This loses precision for some values. 1156 </td> 1157 </tr> 1158 <tr> 1159 <td>float-to-int</td> 1160 <td>float a;<br/> 1161 int32 result = (int32) a; 1162 </td> 1163 <td>Conversion of <code>float</code> to <code>int32</code>, using 1164 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero) 1165 convert to the integer <code>0</code>. Infinities and values with 1166 too large a magnitude to be represented get converted to either 1167 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign. 1168 </td> 1169 </tr> 1170 <tr> 1171 <td>float-to-long</td> 1172 <td>float a;<br/> 1173 int64 result = (int64) a; 1174 </td> 1175 <td>Conversion of <code>float</code> to <code>int64</code>, using 1176 round-toward-zero. The same special case rules as for 1177 <code>float-to-int</code> apply here, except that out-of-range values 1178 get converted to either <code>0x7fffffffffffffff</code> or 1179 <code>-0x8000000000000000</code> depending on sign. 1180 </td> 1181 </tr> 1182 <tr> 1183 <td>float-to-double</td> 1184 <td>float a;<br/> 1185 double result = (double) a; 1186 </td> 1187 <td>Conversion of <code>float</code> to <code>double</code>, preserving 1188 the value exactly. 1189 </td> 1190 </tr> 1191 <tr> 1192 <td>double-to-int</td> 1193 <td>double a;<br/> 1194 int32 result = (int32) a; 1195 </td> 1196 <td>Conversion of <code>double</code> to <code>int32</code>, using 1197 round-toward-zero. The same special case rules as for 1198 <code>float-to-int</code> apply here. 1199 </td> 1200 </tr> 1201 <tr> 1202 <td>double-to-long</td> 1203 <td>double a;<br/> 1204 int64 result = (int64) a; 1205 </td> 1206 <td>Conversion of <code>double</code> to <code>int64</code>, using 1207 round-toward-zero. The same special case rules as for 1208 <code>float-to-long</code> apply here. 1209 </td> 1210 </tr> 1211 <tr> 1212 <td>double-to-float</td> 1213 <td>double a;<br/> 1214 float result = (float) a; 1215 </td> 1216 <td>Conversion of <code>double</code> to <code>float</code>, using 1217 round-to-nearest. This loses precision for some values. 1218 </td> 1219 </tr> 1220 <tr> 1221 <td>int-to-byte</td> 1222 <td>int32 a;<br/> 1223 int32 result = (a << 24) >> 24; 1224 </td> 1225 <td>Truncation of <code>int32</code> to <code>int8</code>, sign 1226 extending the result. 1227 </td> 1228 </tr> 1229 <tr> 1230 <td>int-to-char</td> 1231 <td>int32 a;<br/> 1232 int32 result = a & 0xffff; 1233 </td> 1234 <td>Truncation of <code>int32</code> to <code>uint16</code>, without 1235 sign extension. 1236 </td> 1237 </tr> 1238 <tr> 1239 <td>int-to-short</td> 1240 <td>int32 a;<br/> 1241 int32 result = (a << 16) >> 16; 1242 </td> 1243 <td>Truncation of <code>int32</code> to <code>int16</code>, sign 1244 extending the result. 1245 </td> 1246 </tr> 1247 <tr> 1248 <td>add-int</td> 1249 <td>int32 a, b;<br/> 1250 int32 result = a + b; 1251 </td> 1252 <td>Twos-complement addition.</td> 1253 </tr> 1254 <tr> 1255 <td>sub-int</td> 1256 <td>int32 a, b;<br/> 1257 int32 result = a - b; 1258 </td> 1259 <td>Twos-complement subtraction.</td> 1260 </tr> 1261 <tr> 1262 <td>rsub-int</td> 1263 <td>int32 a, b;<br/> 1264 int32 result = b - a; 1265 </td> 1266 <td>Twos-complement reverse subtraction.</td> 1267 </tr> 1268 <tr> 1269 <td>mul-int</td> 1270 <td>int32 a, b;<br/> 1271 int32 result = a * b; 1272 </td> 1273 <td>Twos-complement multiplication.</td> 1274 </tr> 1275 <tr> 1276 <td>div-int</td> 1277 <td>int32 a, b;<br/> 1278 int32 result = a / b; 1279 </td> 1280 <td>Twos-complement division, rounded towards zero (that is, truncated to 1281 integer). This throws <code>ArithmeticException</code> if 1282 <code>b == 0</code>. 1283 </td> 1284 </tr> 1285 <tr> 1286 <td>rem-int</td> 1287 <td>int32 a, b;<br/> 1288 int32 result = a % b; 1289 </td> 1290 <td>Twos-complement remainder after division. The sign of the result 1291 is the same as that of <code>a</code>, and it is more precisely 1292 defined as <code>result == a - (a / b) * b</code>. This throws 1293 <code>ArithmeticException</code> if <code>b == 0</code>. 1294 </td> 1295 </tr> 1296 <tr> 1297 <td>and-int</td> 1298 <td>int32 a, b;<br/> 1299 int32 result = a & b; 1300 </td> 1301 <td>Bitwise AND.</td> 1302 </tr> 1303 <tr> 1304 <td>or-int</td> 1305 <td>int32 a, b;<br/> 1306 int32 result = a | b; 1307 </td> 1308 <td>Bitwise OR.</td> 1309 </tr> 1310 <tr> 1311 <td>xor-int</td> 1312 <td>int32 a, b;<br/> 1313 int32 result = a ^ b; 1314 </td> 1315 <td>Bitwise XOR.</td> 1316 </tr> 1317 <tr> 1318 <td>shl-int</td> 1319 <td>int32 a, b;<br/> 1320 int32 result = a << (b & 0x1f); 1321 </td> 1322 <td>Bitwise shift left (with masked argument).</td> 1323 </tr> 1324 <tr> 1325 <td>shr-int</td> 1326 <td>int32 a, b;<br/> 1327 int32 result = a >> (b & 0x1f); 1328 </td> 1329 <td>Bitwise signed shift right (with masked argument).</td> 1330 </tr> 1331 <tr> 1332 <td>ushr-int</td> 1333 <td>uint32 a, b;<br/> 1334 int32 result = a >> (b & 0x1f); 1335 </td> 1336 <td>Bitwise unsigned shift right (with masked argument).</td> 1337 </tr> 1338 <tr> 1339 <td>add-long</td> 1340 <td>int64 a, b;<br/> 1341 int64 result = a + b; 1342 </td> 1343 <td>Twos-complement addition.</td> 1344 </tr> 1345 <tr> 1346 <td>sub-long</td> 1347 <td>int64 a, b;<br/> 1348 int64 result = a - b; 1349 </td> 1350 <td>Twos-complement subtraction.</td> 1351 </tr> 1352 <tr> 1353 <td>mul-long</td> 1354 <td>int64 a, b;<br/> 1355 int64 result = a * b; 1356 </td> 1357 <td>Twos-complement multiplication.</td> 1358 </tr> 1359 <tr> 1360 <td>div-long</td> 1361 <td>int64 a, b;<br/> 1362 int64 result = a / b; 1363 </td> 1364 <td>Twos-complement division, rounded towards zero (that is, truncated to 1365 integer). This throws <code>ArithmeticException</code> if 1366 <code>b == 0</code>. 1367 </td> 1368 </tr> 1369 <tr> 1370 <td>rem-long</td> 1371 <td>int64 a, b;<br/> 1372 int64 result = a % b; 1373 </td> 1374 <td>Twos-complement remainder after division. The sign of the result 1375 is the same as that of <code>a</code>, and it is more precisely 1376 defined as <code>result == a - (a / b) * b</code>. This throws 1377 <code>ArithmeticException</code> if <code>b == 0</code>. 1378 </td> 1379 </tr> 1380 <tr> 1381 <td>and-long</td> 1382 <td>int64 a, b;<br/> 1383 int64 result = a & b; 1384 </td> 1385 <td>Bitwise AND.</td> 1386 </tr> 1387 <tr> 1388 <td>or-long</td> 1389 <td>int64 a, b;<br/> 1390 int64 result = a | b; 1391 </td> 1392 <td>Bitwise OR.</td> 1393 </tr> 1394 <tr> 1395 <td>xor-long</td> 1396 <td>int64 a, b;<br/> 1397 int64 result = a ^ b; 1398 </td> 1399 <td>Bitwise XOR.</td> 1400 </tr> 1401 <tr> 1402 <td>shl-long</td> 1403 <td>int64 a, b;<br/> 1404 int64 result = a << (b & 0x3f); 1405 </td> 1406 <td>Bitwise shift left (with masked argument).</td> 1407 </tr> 1408 <tr> 1409 <td>shr-long</td> 1410 <td>int64 a, b;<br/> 1411 int64 result = a >> (b & 0x3f); 1412 </td> 1413 <td>Bitwise signed shift right (with masked argument).</td> 1414 </tr> 1415 <tr> 1416 <td>ushr-long</td> 1417 <td>uint64 a, b;<br/> 1418 int64 result = a >> (b & 0x3f); 1419 </td> 1420 <td>Bitwise unsigned shift right (with masked argument).</td> 1421 </tr> 1422 <tr> 1423 <td>add-float</td> 1424 <td>float a, b;<br/> 1425 float result = a + b; 1426 </td> 1427 <td>Floating point addition.</td> 1428 </tr> 1429 <tr> 1430 <td>sub-float</td> 1431 <td>float a, b;<br/> 1432 float result = a - b; 1433 </td> 1434 <td>Floating point subtraction.</td> 1435 </tr> 1436 <tr> 1437 <td>mul-float</td> 1438 <td>float a, b;<br/> 1439 float result = a * b; 1440 </td> 1441 <td>Floating point multiplication.</td> 1442 </tr> 1443 <tr> 1444 <td>div-float</td> 1445 <td>float a, b;<br/> 1446 float result = a / b; 1447 </td> 1448 <td>Floating point division.</td> 1449 </tr> 1450 <tr> 1451 <td>rem-float</td> 1452 <td>float a, b;<br/> 1453 float result = a % b; 1454 </td> 1455 <td>Floating point remainder after division. This function is different 1456 than IEEE 754 remainder and is defined as 1457 <code>result == a - roundTowardZero(a / b) * b</code>. 1458 </td> 1459 </tr> 1460 <tr> 1461 <td>add-double</td> 1462 <td>double a, b;<br/> 1463 double result = a + b; 1464 </td> 1465 <td>Floating point addition.</td> 1466 </tr> 1467 <tr> 1468 <td>sub-double</td> 1469 <td>double a, b;<br/> 1470 double result = a - b; 1471 </td> 1472 <td>Floating point subtraction.</td> 1473 </tr> 1474 <tr> 1475 <td>mul-double</td> 1476 <td>double a, b;<br/> 1477 double result = a * b; 1478 </td> 1479 <td>Floating point multiplication.</td> 1480 </tr> 1481 <tr> 1482 <td>div-double</td> 1483 <td>double a, b;<br/> 1484 double result = a / b; 1485 </td> 1486 <td>Floating point division.</td> 1487 </tr> 1488 <tr> 1489 <td>rem-double</td> 1490 <td>double a, b;<br/> 1491 double result = a % b; 1492 </td> 1493 <td>Floating point remainder after division. This function is different 1494 than IEEE 754 remainder and is defined as 1495 <code>result == a - roundTowardZero(a / b) * b</code>. 1496 </td> 1497 </tr> 1498 </tbody> 1499 </table> 1500 1501 </body> 1502 </html> 1503
