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      1 /****************************************************************************
      2  ****************************************************************************
      3  ***
      4  ***   This header was automatically generated from a Linux kernel header
      5  ***   of the same name, to make information necessary for userspace to
      6  ***   call into the kernel available to libc.  It contains only constants,
      7  ***   structures, and macros generated from the original header, and thus,
      8  ***   contains no copyrightable information.
      9  ***
     10  ****************************************************************************
     11  ****************************************************************************/
     12 #ifndef __ASM_SH_RENESAS_SDK7780_H
     13 #define __ASM_SH_RENESAS_SDK7780_H
     14 
     15 #include <asm/addrspace.h>
     16 
     17 #define SE_AREA0_WIDTH 4
     18 #define PA_ROM 0xa0000000
     19 #define PA_ROM_SIZE 0x00400000
     20 #define PA_FROM 0xa0800000
     21 #define PA_FROM_SIZE 0x00400000
     22 #define PA_EXT1 0xa4000000
     23 #define PA_EXT1_SIZE 0x04000000
     24 #define PA_SDRAM 0xa8000000
     25 #define PA_SDRAM_SIZE 0x08000000
     26 
     27 #define PA_EXT4 0xb0000000
     28 #define PA_EXT4_SIZE 0x04000000
     29 #define PA_EXT_USER PA_EXT4
     30 
     31 #define PA_PERIPHERAL PA_AREA5_IO
     32 
     33 #define PA_RESERVED (PA_PERIPHERAL + 0)
     34 
     35 #define PA_FPGA (PA_PERIPHERAL + 0x01000000)
     36 
     37 #define PA_LAN (PA_PERIPHERAL + 0x01800000)
     38 
     39 #define FPGA_SRSTR (PA_FPGA + 0x000)
     40 #define FPGA_IRQ0SR (PA_FPGA + 0x010)
     41 #define FPGA_IRQ0MR (PA_FPGA + 0x020)
     42 #define FPGA_BDMR (PA_FPGA + 0x030)
     43 #define FPGA_INTT0PRTR (PA_FPGA + 0x040)
     44 #define FPGA_INTT0SELR (PA_FPGA + 0x050)
     45 #define FPGA_INTT1POLR (PA_FPGA + 0x060)
     46 #define FPGA_NMIR (PA_FPGA + 0x070)
     47 #define FPGA_NMIMR (PA_FPGA + 0x080)
     48 #define FPGA_IRQR (PA_FPGA + 0x090)
     49 #define FPGA_IRQMR (PA_FPGA + 0x0A0)
     50 #define FPGA_SLEDR (PA_FPGA + 0x0B0)
     51 #define PA_LED FPGA_SLEDR
     52 #define FPGA_MAPSWR (PA_FPGA + 0x0C0)
     53 #define FPGA_FPVERR (PA_FPGA + 0x0D0)
     54 #define FPGA_FPDATER (PA_FPGA + 0x0E0)
     55 #define FPGA_RSE (PA_FPGA + 0x100)
     56 #define FPGA_EASR (PA_FPGA + 0x110)
     57 #define FPGA_SPER (PA_FPGA + 0x120)
     58 #define FPGA_IMSR (PA_FPGA + 0x130)
     59 #define FPGA_PCIMR (PA_FPGA + 0x140)
     60 #define FPGA_DIPSWMR (PA_FPGA + 0x150)
     61 #define FPGA_FPODR (PA_FPGA + 0x160)
     62 #define FPGA_ATAESR (PA_FPGA + 0x170)
     63 #define FPGA_IRQPOLR (PA_FPGA + 0x180)
     64 
     65 #define SDK7780_NR_IRL 15
     66 
     67 #define IRQ_CFCARD 14
     68 
     69 #define IRQ_ETHERNET 6
     70 
     71 #define __IO_PREFIX sdk7780
     72 #include <asm/io_generic.h>
     73 
     74 #endif
     75