1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #if defined(WITH_JIT) 18 19 /* 20 * ARMv5 definitions and declarations. 21 */ 22 23 /* 24 ARM EABI general notes: 25 26 r0-r3 hold first 4 args to a method; they are not preserved across method calls 27 r4-r8 are available for general use 28 r9 is given special treatment in some situations, but not for us 29 r10 (sl) seems to be generally available 30 r11 (fp) is used by gcc (unless -fomit-frame-pointer is set) 31 r12 (ip) is scratch -- not preserved across method calls 32 r13 (sp) should be managed carefully in case a signal arrives 33 r14 (lr) must be preserved 34 r15 (pc) can be tinkered with directly 35 36 r0 holds returns of <= 4 bytes 37 r0-r1 hold returns of 8 bytes, low word in r0 38 39 Callee must save/restore r4+ (except r12) if it modifies them. 40 41 Stack is "full descending". Only the arguments that don't fit in the first 4 42 registers are placed on the stack. "sp" points at the first stacked argument 43 (i.e. the 5th arg). 44 45 VFP: single-precision results in s0, double-precision results in d0. 46 47 In the EABI, "sp" must be 64-bit aligned on entry to a function, and any 48 64-bit quantities (long long, double) must be 64-bit aligned. 49 */ 50 51 /* 52 JIT and ARM notes: 53 54 The following registers have fixed assignments: 55 56 reg nick purpose 57 r5 rFP interpreted frame pointer, used for accessing locals and args 58 r6 rGLUE MterpGlue pointer 59 60 The following registers have fixed assignments in mterp but are scratch 61 registers in compiled code 62 63 reg nick purpose 64 r4 rPC interpreted program counter, used for fetching instructions 65 r7 rINST first 16-bit code unit of current instruction 66 r8 rIBASE interpreted instruction base pointer, used for computed goto 67 68 Macros are provided for common operations. Each macro MUST emit only 69 one instruction to make instruction-counting easier. They MUST NOT alter 70 unspecified registers or condition codes. 71 */ 72 73 /* single-purpose registers, given names for clarity */ 74 #define rPC r4 75 #define rFP r5 76 #define rGLUE r6 77 #define rINST r7 78 #define rIBASE r8 79 80 /* 81 * Given a frame pointer, find the stack save area. 82 * 83 * In C this is "((StackSaveArea*)(_fp) -1)". 84 */ 85 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ 86 sub _reg, _fpreg, #sizeofStackSaveArea 87 88 #define EXPORT_PC() \ 89 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)] 90 91 /* 92 * This is a #include, not a %include, because we want the C pre-processor 93 * to expand the macros into assembler assignment statements. 94 */ 95 #include "../../../mterp/common/asm-constants.h" 96
