1 %default {"result":"%eax"} 2 /* 3 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4 * that specifies an instruction that performs "result = r0 op r1". 5 * This could be an ARM instruction or a function call. (If the result 6 * comes back in a register other than r0, you can override "result".) 7 * 8 * If "chkzero" is set to 1, we perform a divide-by-zero check on 9 * vCC (r1). Useful for integer division and modulus. 10 * 11 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 12 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 13 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 14 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 15 */ 16 /* binop/2addr vA, vB */ 17 movzx rINST_HI,%ecx # ecx<- A+ 18 sarl $$12,rINST_FULL # rINST_FULL<- B 19 GET_VREG(%eax,rINST_FULL) # eax<- vB 20 FETCH_INST_WORD(1) 21 andb $$0xf,%cl # ecx<- A 22 $instr # for ex: addl %eax,(rFP,%ecx,4) 23 ADVANCE_PC(1) 24 GOTO_NEXT 25
