1 /* Interface between the opcode library and its callers. 2 Written by Cygnus Support, 1993. 3 4 The opcode library (libopcodes.a) provides instruction decoders for 5 a large variety of instruction sets, callable with an identical 6 interface, for making instruction-processing programs more independent 7 of the instruction set being processed. */ 8 9 #ifndef DIS_ASM_H 10 #define DIS_ASM_H 11 12 #include <stdlib.h> 13 #include <stdbool.h> 14 #include <stdio.h> 15 #include <string.h> 16 #include <inttypes.h> 17 18 typedef void *PTR; 19 typedef uint64_t bfd_vma; 20 typedef int64_t bfd_signed_vma; 21 typedef uint8_t bfd_byte; 22 #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x) 23 #define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x) 24 25 #define BFD64 26 27 enum bfd_flavour { 28 bfd_target_unknown_flavour, 29 bfd_target_aout_flavour, 30 bfd_target_coff_flavour, 31 bfd_target_ecoff_flavour, 32 bfd_target_elf_flavour, 33 bfd_target_ieee_flavour, 34 bfd_target_nlm_flavour, 35 bfd_target_oasys_flavour, 36 bfd_target_tekhex_flavour, 37 bfd_target_srec_flavour, 38 bfd_target_ihex_flavour, 39 bfd_target_som_flavour, 40 bfd_target_os9k_flavour, 41 bfd_target_versados_flavour, 42 bfd_target_msdos_flavour, 43 bfd_target_evax_flavour 44 }; 45 46 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; 47 48 enum bfd_architecture 49 { 50 bfd_arch_unknown, /* File arch not known */ 51 bfd_arch_obscure, /* Arch known, not one of these */ 52 bfd_arch_m68k, /* Motorola 68xxx */ 53 #define bfd_mach_m68000 1 54 #define bfd_mach_m68008 2 55 #define bfd_mach_m68010 3 56 #define bfd_mach_m68020 4 57 #define bfd_mach_m68030 5 58 #define bfd_mach_m68040 6 59 #define bfd_mach_m68060 7 60 #define bfd_mach_cpu32 8 61 #define bfd_mach_mcf5200 9 62 #define bfd_mach_mcf5206e 10 63 #define bfd_mach_mcf5307 11 64 #define bfd_mach_mcf5407 12 65 #define bfd_mach_mcf528x 13 66 #define bfd_mach_mcfv4e 14 67 #define bfd_mach_mcf521x 15 68 #define bfd_mach_mcf5249 16 69 #define bfd_mach_mcf547x 17 70 #define bfd_mach_mcf548x 18 71 bfd_arch_vax, /* DEC Vax */ 72 bfd_arch_i960, /* Intel 960 */ 73 /* The order of the following is important. 74 lower number indicates a machine type that 75 only accepts a subset of the instructions 76 available to machines with higher numbers. 77 The exception is the "ca", which is 78 incompatible with all other machines except 79 "core". */ 80 81 #define bfd_mach_i960_core 1 82 #define bfd_mach_i960_ka_sa 2 83 #define bfd_mach_i960_kb_sb 3 84 #define bfd_mach_i960_mc 4 85 #define bfd_mach_i960_xa 5 86 #define bfd_mach_i960_ca 6 87 #define bfd_mach_i960_jx 7 88 #define bfd_mach_i960_hx 8 89 90 bfd_arch_a29k, /* AMD 29000 */ 91 bfd_arch_sparc, /* SPARC */ 92 #define bfd_mach_sparc 1 93 /* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 94 #define bfd_mach_sparc_sparclet 2 95 #define bfd_mach_sparc_sparclite 3 96 #define bfd_mach_sparc_v8plus 4 97 #define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 98 #define bfd_mach_sparc_sparclite_le 6 99 #define bfd_mach_sparc_v9 7 100 #define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 101 #define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 102 #define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 103 /* Nonzero if MACH has the v9 instruction set. */ 104 #define bfd_mach_sparc_v9_p(mach) \ 105 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ 106 && (mach) != bfd_mach_sparc_sparclite_le) 107 bfd_arch_mips, /* MIPS Rxxxx */ 108 #define bfd_mach_mips3000 3000 109 #define bfd_mach_mips3900 3900 110 #define bfd_mach_mips4000 4000 111 #define bfd_mach_mips4010 4010 112 #define bfd_mach_mips4100 4100 113 #define bfd_mach_mips4300 4300 114 #define bfd_mach_mips4400 4400 115 #define bfd_mach_mips4600 4600 116 #define bfd_mach_mips4650 4650 117 #define bfd_mach_mips5000 5000 118 #define bfd_mach_mips6000 6000 119 #define bfd_mach_mips8000 8000 120 #define bfd_mach_mips10000 10000 121 #define bfd_mach_mips16 16 122 bfd_arch_i386, /* Intel 386 */ 123 #define bfd_mach_i386_i386 0 124 #define bfd_mach_i386_i8086 1 125 #define bfd_mach_i386_i386_intel_syntax 2 126 #define bfd_mach_x86_64 3 127 #define bfd_mach_x86_64_intel_syntax 4 128 bfd_arch_we32k, /* AT&T WE32xxx */ 129 bfd_arch_tahoe, /* CCI/Harris Tahoe */ 130 bfd_arch_i860, /* Intel 860 */ 131 bfd_arch_romp, /* IBM ROMP PC/RT */ 132 bfd_arch_alliant, /* Alliant */ 133 bfd_arch_convex, /* Convex */ 134 bfd_arch_m88k, /* Motorola 88xxx */ 135 bfd_arch_pyramid, /* Pyramid Technology */ 136 bfd_arch_h8300, /* Hitachi H8/300 */ 137 #define bfd_mach_h8300 1 138 #define bfd_mach_h8300h 2 139 #define bfd_mach_h8300s 3 140 bfd_arch_powerpc, /* PowerPC */ 141 #define bfd_mach_ppc 0 142 #define bfd_mach_ppc64 1 143 #define bfd_mach_ppc_403 403 144 #define bfd_mach_ppc_403gc 4030 145 #define bfd_mach_ppc_e500 500 146 #define bfd_mach_ppc_505 505 147 #define bfd_mach_ppc_601 601 148 #define bfd_mach_ppc_602 602 149 #define bfd_mach_ppc_603 603 150 #define bfd_mach_ppc_ec603e 6031 151 #define bfd_mach_ppc_604 604 152 #define bfd_mach_ppc_620 620 153 #define bfd_mach_ppc_630 630 154 #define bfd_mach_ppc_750 750 155 #define bfd_mach_ppc_860 860 156 #define bfd_mach_ppc_a35 35 157 #define bfd_mach_ppc_rs64ii 642 158 #define bfd_mach_ppc_rs64iii 643 159 #define bfd_mach_ppc_7400 7400 160 bfd_arch_rs6000, /* IBM RS/6000 */ 161 bfd_arch_hppa, /* HP PA RISC */ 162 #define bfd_mach_hppa10 10 163 #define bfd_mach_hppa11 11 164 #define bfd_mach_hppa20 20 165 #define bfd_mach_hppa20w 25 166 bfd_arch_d10v, /* Mitsubishi D10V */ 167 bfd_arch_z8k, /* Zilog Z8000 */ 168 #define bfd_mach_z8001 1 169 #define bfd_mach_z8002 2 170 bfd_arch_h8500, /* Hitachi H8/500 */ 171 bfd_arch_sh, /* Hitachi SH */ 172 #define bfd_mach_sh 1 173 #define bfd_mach_sh2 0x20 174 #define bfd_mach_sh_dsp 0x2d 175 #define bfd_mach_sh2a 0x2a 176 #define bfd_mach_sh2a_nofpu 0x2b 177 #define bfd_mach_sh2e 0x2e 178 #define bfd_mach_sh3 0x30 179 #define bfd_mach_sh3_nommu 0x31 180 #define bfd_mach_sh3_dsp 0x3d 181 #define bfd_mach_sh3e 0x3e 182 #define bfd_mach_sh4 0x40 183 #define bfd_mach_sh4_nofpu 0x41 184 #define bfd_mach_sh4_nommu_nofpu 0x42 185 #define bfd_mach_sh4a 0x4a 186 #define bfd_mach_sh4a_nofpu 0x4b 187 #define bfd_mach_sh4al_dsp 0x4d 188 #define bfd_mach_sh5 0x50 189 bfd_arch_alpha, /* Dec Alpha */ 190 #define bfd_mach_alpha 1 191 bfd_arch_arm, /* Advanced Risc Machines ARM */ 192 #define bfd_mach_arm_unknown 0 193 #define bfd_mach_arm_2 1 194 #define bfd_mach_arm_2a 2 195 #define bfd_mach_arm_3 3 196 #define bfd_mach_arm_3M 4 197 #define bfd_mach_arm_4 5 198 #define bfd_mach_arm_4T 6 199 #define bfd_mach_arm_5 7 200 #define bfd_mach_arm_5T 8 201 #define bfd_mach_arm_5TE 9 202 #define bfd_mach_arm_XScale 10 203 #define bfd_mach_arm_ep9312 11 204 #define bfd_mach_arm_iWMMXt 12 205 #define bfd_mach_arm_iWMMXt2 13 206 bfd_arch_ns32k, /* National Semiconductors ns32000 */ 207 bfd_arch_w65, /* WDC 65816 */ 208 bfd_arch_tic30, /* Texas Instruments TMS320C30 */ 209 bfd_arch_v850, /* NEC V850 */ 210 #define bfd_mach_v850 0 211 bfd_arch_arc, /* Argonaut RISC Core */ 212 #define bfd_mach_arc_base 0 213 bfd_arch_m32r, /* Mitsubishi M32R/D */ 214 #define bfd_mach_m32r 0 /* backwards compatibility */ 215 bfd_arch_mn10200, /* Matsushita MN10200 */ 216 bfd_arch_mn10300, /* Matsushita MN10300 */ 217 bfd_arch_cris, /* Axis CRIS */ 218 #define bfd_mach_cris_v0_v10 255 219 #define bfd_mach_cris_v32 32 220 #define bfd_mach_cris_v10_v32 1032 221 bfd_arch_microblaze, /* Xilinx MicroBlaze. */ 222 bfd_arch_last 223 }; 224 #define bfd_mach_s390_31 31 225 #define bfd_mach_s390_64 64 226 227 typedef struct symbol_cache_entry 228 { 229 const char *name; 230 union 231 { 232 PTR p; 233 bfd_vma i; 234 } udata; 235 } asymbol; 236 237 typedef int (*fprintf_ftype) (FILE*, const char*, ...); 238 239 enum dis_insn_type { 240 dis_noninsn, /* Not a valid instruction */ 241 dis_nonbranch, /* Not a branch instruction */ 242 dis_branch, /* Unconditional branch */ 243 dis_condbranch, /* Conditional branch */ 244 dis_jsr, /* Jump to subroutine */ 245 dis_condjsr, /* Conditional jump to subroutine */ 246 dis_dref, /* Data reference instruction */ 247 dis_dref2 /* Two data references in instruction */ 248 }; 249 250 /* This struct is passed into the instruction decoding routine, 251 and is passed back out into each callback. The various fields are used 252 for conveying information from your main routine into your callbacks, 253 for passing information into the instruction decoders (such as the 254 addresses of the callback functions), or for passing information 255 back from the instruction decoders to their callers. 256 257 It must be initialized before it is first passed; this can be done 258 by hand, or using one of the initialization macros below. */ 259 260 typedef struct disassemble_info { 261 fprintf_ftype fprintf_func; 262 FILE *stream; 263 PTR application_data; 264 265 /* Target description. We could replace this with a pointer to the bfd, 266 but that would require one. There currently isn't any such requirement 267 so to avoid introducing one we record these explicitly. */ 268 /* The bfd_flavour. This can be bfd_target_unknown_flavour. */ 269 enum bfd_flavour flavour; 270 /* The bfd_arch value. */ 271 enum bfd_architecture arch; 272 /* The bfd_mach value. */ 273 unsigned long mach; 274 /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */ 275 enum bfd_endian endian; 276 277 /* An array of pointers to symbols either at the location being disassembled 278 or at the start of the function being disassembled. The array is sorted 279 so that the first symbol is intended to be the one used. The others are 280 present for any misc. purposes. This is not set reliably, but if it is 281 not NULL, it is correct. */ 282 asymbol **symbols; 283 /* Number of symbols in array. */ 284 int num_symbols; 285 286 /* For use by the disassembler. 287 The top 16 bits are reserved for public use (and are documented here). 288 The bottom 16 bits are for the internal use of the disassembler. */ 289 unsigned long flags; 290 #define INSN_HAS_RELOC 0x80000000 291 PTR private_data; 292 293 /* Function used to get bytes to disassemble. MEMADDR is the 294 address of the stuff to be disassembled, MYADDR is the address to 295 put the bytes in, and LENGTH is the number of bytes to read. 296 INFO is a pointer to this struct. 297 Returns an errno value or 0 for success. */ 298 int (*read_memory_func) 299 (bfd_vma memaddr, bfd_byte *myaddr, int length, 300 struct disassemble_info *info); 301 302 /* Function which should be called if we get an error that we can't 303 recover from. STATUS is the errno value from read_memory_func and 304 MEMADDR is the address that we were trying to read. INFO is a 305 pointer to this struct. */ 306 void (*memory_error_func) 307 (int status, bfd_vma memaddr, struct disassemble_info *info); 308 309 /* Function called to print ADDR. */ 310 void (*print_address_func) 311 (bfd_vma addr, struct disassemble_info *info); 312 313 /* Function called to determine if there is a symbol at the given ADDR. 314 If there is, the function returns 1, otherwise it returns 0. 315 This is used by ports which support an overlay manager where 316 the overlay number is held in the top part of an address. In 317 some circumstances we want to include the overlay number in the 318 address, (normally because there is a symbol associated with 319 that address), but sometimes we want to mask out the overlay bits. */ 320 int (* symbol_at_address_func) 321 (bfd_vma addr, struct disassemble_info * info); 322 323 /* These are for buffer_read_memory. */ 324 bfd_byte *buffer; 325 bfd_vma buffer_vma; 326 int buffer_length; 327 328 /* This variable may be set by the instruction decoder. It suggests 329 the number of bytes objdump should display on a single line. If 330 the instruction decoder sets this, it should always set it to 331 the same value in order to get reasonable looking output. */ 332 int bytes_per_line; 333 334 /* the next two variables control the way objdump displays the raw data */ 335 /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */ 336 /* output will look like this: 337 00: 00000000 00000000 338 with the chunks displayed according to "display_endian". */ 339 int bytes_per_chunk; 340 enum bfd_endian display_endian; 341 342 /* Results from instruction decoders. Not all decoders yet support 343 this information. This info is set each time an instruction is 344 decoded, and is only valid for the last such instruction. 345 346 To determine whether this decoder supports this information, set 347 insn_info_valid to 0, decode an instruction, then check it. */ 348 349 char insn_info_valid; /* Branch info has been set. */ 350 char branch_delay_insns; /* How many sequential insn's will run before 351 a branch takes effect. (0 = normal) */ 352 char data_size; /* Size of data reference in insn, in bytes */ 353 enum dis_insn_type insn_type; /* Type of instruction */ 354 bfd_vma target; /* Target address of branch or dref, if known; 355 zero if unknown. */ 356 bfd_vma target2; /* Second target address for dref2 */ 357 358 /* Command line options specific to the target disassembler. */ 359 char * disassembler_options; 360 361 } disassemble_info; 362 363 364 /* Standard disassemblers. Disassemble one instruction at the given 366 target address. Return number of bytes processed. */ 367 typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *); 368 369 extern int print_insn_big_mips (bfd_vma, disassemble_info*); 370 extern int print_insn_little_mips (bfd_vma, disassemble_info*); 371 extern int print_insn_i386 (bfd_vma, disassemble_info*); 372 extern int print_insn_m68k (bfd_vma, disassemble_info*); 373 extern int print_insn_z8001 (bfd_vma, disassemble_info*); 374 extern int print_insn_z8002 (bfd_vma, disassemble_info*); 375 extern int print_insn_h8300 (bfd_vma, disassemble_info*); 376 extern int print_insn_h8300h (bfd_vma, disassemble_info*); 377 extern int print_insn_h8300s (bfd_vma, disassemble_info*); 378 extern int print_insn_h8500 (bfd_vma, disassemble_info*); 379 extern int print_insn_alpha (bfd_vma, disassemble_info*); 380 extern disassembler_ftype arc_get_disassembler (int, int); 381 extern int print_insn_arm (bfd_vma, disassemble_info*); 382 extern int print_insn_sparc (bfd_vma, disassemble_info*); 383 extern int print_insn_big_a29k (bfd_vma, disassemble_info*); 384 extern int print_insn_little_a29k (bfd_vma, disassemble_info*); 385 extern int print_insn_i960 (bfd_vma, disassemble_info*); 386 extern int print_insn_sh (bfd_vma, disassemble_info*); 387 extern int print_insn_shl (bfd_vma, disassemble_info*); 388 extern int print_insn_hppa (bfd_vma, disassemble_info*); 389 extern int print_insn_m32r (bfd_vma, disassemble_info*); 390 extern int print_insn_m88k (bfd_vma, disassemble_info*); 391 extern int print_insn_mn10200 (bfd_vma, disassemble_info*); 392 extern int print_insn_mn10300 (bfd_vma, disassemble_info*); 393 extern int print_insn_ns32k (bfd_vma, disassemble_info*); 394 extern int print_insn_big_powerpc (bfd_vma, disassemble_info*); 395 extern int print_insn_little_powerpc (bfd_vma, disassemble_info*); 396 extern int print_insn_rs6000 (bfd_vma, disassemble_info*); 397 extern int print_insn_w65 (bfd_vma, disassemble_info*); 398 extern int print_insn_d10v (bfd_vma, disassemble_info*); 399 extern int print_insn_v850 (bfd_vma, disassemble_info*); 400 extern int print_insn_tic30 (bfd_vma, disassemble_info*); 401 extern int print_insn_ppc (bfd_vma, disassemble_info*); 402 extern int print_insn_s390 (bfd_vma, disassemble_info*); 403 extern int print_insn_crisv32 (bfd_vma, disassemble_info*); 404 extern int print_insn_microblaze (bfd_vma, disassemble_info*); 405 406 #if 0 407 /* Fetch the disassembler for a given BFD, if that support is available. */ 408 extern disassembler_ftype disassembler (bfd *); 409 #endif 410 411 412 /* This block of definitions is for particular callers who read instructions 414 into a buffer before calling the instruction decoder. */ 415 416 /* Here is a function which callers may wish to use for read_memory_func. 417 It gets bytes from a buffer. */ 418 extern int buffer_read_memory 419 (bfd_vma, bfd_byte *, int, struct disassemble_info *); 420 421 /* This function goes with buffer_read_memory. 422 It prints a message using info->fprintf_func and info->stream. */ 423 extern void perror_memory (int, bfd_vma, struct disassemble_info *); 424 425 426 /* Just print the address in hex. This is included for completeness even 427 though both GDB and objdump provide their own (to print symbolic 428 addresses). */ 429 extern void generic_print_address (bfd_vma, struct disassemble_info *); 430 431 /* Always true. */ 432 extern int generic_symbol_at_address (bfd_vma, struct disassemble_info *); 433 434 /* Macro to initialize a disassemble_info struct. This should be called 435 by all applications creating such a struct. */ 436 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \ 437 (INFO).flavour = bfd_target_unknown_flavour, \ 438 (INFO).arch = bfd_arch_unknown, \ 439 (INFO).mach = 0, \ 440 (INFO).endian = BFD_ENDIAN_UNKNOWN, \ 441 INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) 442 443 /* Call this macro to initialize only the internal variables for the 444 disassembler. Architecture dependent things such as byte order, or machine 445 variant are not touched by this macro. This makes things much easier for 446 GDB which must initialize these things separately. */ 447 448 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \ 449 (INFO).fprintf_func = (FPRINTF_FUNC), \ 450 (INFO).stream = (STREAM), \ 451 (INFO).symbols = NULL, \ 452 (INFO).num_symbols = 0, \ 453 (INFO).private_data = NULL, \ 454 (INFO).buffer = NULL, \ 455 (INFO).buffer_vma = 0, \ 456 (INFO).buffer_length = 0, \ 457 (INFO).read_memory_func = buffer_read_memory, \ 458 (INFO).memory_error_func = perror_memory, \ 459 (INFO).print_address_func = generic_print_address, \ 460 (INFO).symbol_at_address_func = generic_symbol_at_address, \ 461 (INFO).flags = 0, \ 462 (INFO).bytes_per_line = 0, \ 463 (INFO).bytes_per_chunk = 0, \ 464 (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \ 465 (INFO).disassembler_options = NULL, \ 466 (INFO).insn_info_valid = 0 467 468 #define _(x) x 469 #define ATTRIBUTE_UNUSED __attribute__((unused)) 470 471 /* from libbfd */ 472 473 bfd_vma bfd_getl32 (const bfd_byte *addr); 474 bfd_vma bfd_getb32 (const bfd_byte *addr); 475 bfd_vma bfd_getl16 (const bfd_byte *addr); 476 bfd_vma bfd_getb16 (const bfd_byte *addr); 477 typedef bool bfd_boolean; 478 479 #endif /* ! defined (DIS_ASM_H) */ 480
