| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_RESTORE_STATE.S | 4 * r0 - offset from rGLUE to the 1st element of the coreRegs save array.
6 add r0, r0, rGLUE @ pointer to heapArgSpace.coreRegs[0]
7 ldmia r0, {r0-r12}
|
| TEMPLATE_STRING_INDEXOF.S | 4 * Requires r0 to have been previously checked for null. Will
5 * return index of match of r1 in r0.
13 * r0: string object pointer
18 ldr r7, [r0, #STRING_FIELDOFF_OFFSET]
19 ldr r8, [r0, #STRING_FIELDOFF_COUNT]
20 ldr r0, [r0, #STRING_FIELDOFF_VALUE]
24 * r0: object pointer
32 add r0, #16
33 add r0, r0, r7, lsl #
[all...] |
| TEMPLATE_SHR_LONG.S | 8 and r2, r2, #63 @ r0<- r0 & 0x3f
9 mov r0, r0, lsr r2 @ r0<- r2 >> r2
11 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
13 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32
[all...] |
| TEMPLATE_USHR_LONG.S | 8 and r2, r2, #63 @ r0<- r0 & 0x3f
9 mov r0, r0, lsr r2 @ r0<- r2 >> r2
11 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
13 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32
[all...] |
| TEMPLATE_SAVE_STATE.S | 5 * Top of stack + 0: r0 value to save
6 * r0 - offset from rGLUE to the beginning of the heapArgSpace record
9 * The handler must save regMap, r0-r12 and then return with r0-r12
10 * with their original values (note that this means r0 and r7 must take
14 add r0, r0, rGLUE @ pointer to heapArgSpace
15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r
[all...] |
| TEMPLATE_CMP_LONG.S | 10 * subs ip, r0, r2
12 * subeqs ip, r0, r2
25 subs r0, r0, r2 @ r0<- r0 - r2
29 mvn r0, #0 @ r0<- -1
32 mov r0, #1 @ r0<-
[all...] |
| TEMPLATE_SHL_LONG.S | 11 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
13 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
14 mov r0, r0, asl r2 @ r0<- r0 << r2
|
| /bionic/libc/arch-arm/bionic/ |
| ffs.S | 47 /* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */
48 rsb r1, r0, #0
49 ands r0, r0, r1
52 * now r0 has at most one set bit, call this X
56 orrne r0, r0, r0, lsl #4 /* r0 = X * 0x11 */
[all...] |
| memcmp.S | 48 PLD (r0, #0)
52 cmp r0, r1
54 moveq r0, #0
61 PLD (r0, #32)
64 /* since r0 hold the result, move the first source
68 mov r4, r0
85 1: ldrb r0, [r4], #1
87 subs r0, r0, ip
98 eor r0, r4, r
[all...] |
| memcmp16.S | 48 PLD (r0, #0)
52 cmp r0, r1
54 moveq r0, #0
57 /* since r0 hold the result, move the first source
61 mov r3, r0
71 PLD (r0, #32)
74 1: ldrh r0, [r3], #2
76 subs r0, r0, ip
91 ldrh r0, [r3], #
[all...] |
| /bionic/libc/arch-sh/bionic/ |
| ffs.S | 53 mov r4,r0 ! using r0 specific instructions
54 tst #0xff,r0
58 tst r0,r0 ! ffs(0) is 0
61 shlr8 r0
62 tst #0xff,r0
66 shlr8 r0
67 tst #0xff,r0
71 shlr8 r0
[all...] |
| memcpy.S | 63 mov REG_SRC,r0
64 xor REG_DST,r0
65 and #3,r0
66 mov r0,r1
67 tst r0,r0 /* (src ^ dst) & 3 */
75 mov REG_SRC,r0
76 tst #1,r0 /* if ( src & 1 ) */
78 mov.b @REG_SRC+,r0 /* *dst++ = *src++; */
80 mov.b r0,@REG_DS
[all...] |
| /dalvik/vm/compiler/template/armv5te-vfp/ |
| TEMPLATE_SAVE_STATE.S | 5 * Top of stack + 0: r0 value to save
6 * r0 - offset from rGLUE to the beginning of the heapArgSpace record
9 * The handler must save regMap, r0-r12 and then return with r0-r12
10 * with their original values (note that this means r0 and r7 must take
14 add r0, r0, rGLUE @ pointer to heapArgSpace
15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r
[all...] |
| TEMPLATE_RESTORE_STATE.S | 4 * r0 - offset from rGLUE to the 1st element of the coreRegs save array.
6 add r0, r0, rGLUE @ pointer to heapArgSpace.coreRegs[0]
7 add r0, #64 @ pointer to heapArgSpace.fpRegs[0]
8 vldmia r0, {d0-d15}
9 sub r0, #64 @ pointer to heapArgSpace.coreRegs[0]
10 ldmia r0, {r0-r12}
|
| /bootable/bootloader/legacy/arch_armv6/ |
| dcc.S | 35 mrc 14, 0, r0, c0, c1, 0
36 tst r0, #(1 << 30)
37 moveq r0, #-1
38 mrcne 14, 0, r0, c0, c5, 0
44 mcrcc 14, 0, r0, c0, c5, 0
45 movcc r0, #0
46 movcs r0, #-1
|
| misc.S | 37 ldr r0, =0x80000016
38 mcr p15, 0, r0, c15, c2, 4
42 mov r0, #0
43 mcr p15, 0, r0, c15, c2, 4
|
| /dalvik/vm/mterp/armv5te/ |
| OP_SHR_LONG.S | 9 FETCH(r0, 1) @ r0<- CCBB
11 and r3, r0, #255 @ r3<- BB
12 mov r0, r0, lsr #8 @ r0<- CC
14 GET_VREG(r2, r0) @ r2<- vCC
15 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1
16 and r2, r2, #63 @ r0<- r0 & 0x3
[all...] |
| OP_USHR_LONG.S | 9 FETCH(r0, 1) @ r0<- CCBB
11 and r3, r0, #255 @ r3<- BB
12 mov r0, r0, lsr #8 @ r0<- CC
14 GET_VREG(r2, r0) @ r2<- vCC
15 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1
16 and r2, r2, #63 @ r0<- r0 & 0x3
[all...] |
| OP_CONST_WIDE_32.S | 3 FETCH(r0, 1) @ r0<- 0000bbbb (low)
7 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb
9 mov r1, r0, asr #31 @ r1<- ssssssss
11 stmia r3, {r0-r1} @ vAA<- r0/r1
|
| OP_SHL_LONG.S | 9 FETCH(r0, 1) @ r0<- CCBB
11 and r3, r0, #255 @ r3<- BB
12 mov r0, r0, lsr #8 @ r0<- CC
14 GET_VREG(r2, r0) @ r2<- vCC
15 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1
21 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2)
[all...] |
| OP_CONST.S | 4 FETCH(r0, 1) @ r0<- bbbb (low)
7 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb
9 SET_VREG(r0, r3) @ vAA<- r0
|
| OP_CONST_HIGH16.S | 3 FETCH(r0, 1) @ r0<- 0000BBBB (zero-extended)
5 mov r0, r0, lsl #16 @ r0<- BBBB0000
7 SET_VREG(r0, r3) @ vAA<- r0
|
| OP_RETURN.S | 10 GET_VREG(r0, r2) @ r0<- vAA
11 str r0, [rGLUE, #offGlue_retval] @ retval.i <- vAA
|
| /frameworks/base/opengl/libagl/ |
| fixed_asm.S | 36 movs r1, r0, lsl #1 /* remove bit sign */
39 mov r2, r0, lsl #8 /* mantissa<<8 */
41 mov r0, r2, lsr r1 /* scale to 16.16 */
42 rsbcs r0, r0, #0 /* negate if needed */
51 mov r1, r0, lsl #1 /* remove bit sign */
55 mov r2, r0, lsl #8 /* mantissa<<8 */
57 mov r3, r0
58 movs r0, r2, lsr r1 /* scale to 16.16 */
59 addcs r0, r0, #1 /* round-to-nearest *
[all...] |
| /dalvik/vm/arch/sh/ |
| CallSH4ABI.S | 38 * @remark r0,r1 Scratch before invoking method.
60 mov #1, r0 /* shorty's 1st byte specify ret value type. */
61 add r0, r2
84 mov #0, r0
85 cmp/eq r0, r5
92 mov.b @r2+, r0
93 cmp/eq #0, r0 /* if (*shorty == '\0) */
102 cmp/eq #'F', r0
105 cmp/eq #'D', r0
108 cmp/eq #'J', r0
[all...] |
