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      6 <title>sparse-switch</title>
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     11 
     12 <h1>sparse-switch</h1>
     13 
     14 <h2>Purpose</h2>
     15 
     16 <p>
     17 Jump to a new instruction based on the value in the given register, using an
     18 ordered table of value-offset pairs, or fall through to the next instruction if
     19 there is no match.
     20 </p>
     21 <p>
     22 Note: The address of the table is guaranteed to be even (that is, 4-byte
     23 aligned). If the code size of the method is otherwise odd, then an extra code
     24 unit is inserted between the main code and the table whose value is the same as
     25 a nop.
     26 </p>
     27 
     28 <h2>Details</h2>
     29 
     30 <table class="instruc">
     31 <thead>
     32 <tr>
     33   <th>Op &amp; Format</th>
     34   <th>Mnemonic / Syntax</th>
     35   <th>Arguments</th>
     36 </tr>
     37 </thead>
     38 <tbody>
     39 <tr>
     40   <td>2c 31t</td>
     41   <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
     42     specified below in "<code>sparse-switch</code> Format")</i></td>
     43   <td><code>A:</code> register to test<br/>
     44     <code>B:</code> signed "branch" offset to table data (32 bits)</td>
     45 </tr>
     46 </tbody>
     47 </table>
     48 
     49 <h2>Constraints</h2>
     50 
     51 <ul>
     52   <li>
     53     A must be a valid register index in the current stack frame.
     54   </li>
     55   <li>
     56     Let PC be the address of the packed-switch instruction in the code array of
     57     the current method. Then T = PC + B with the following properties:
     58     <ul>
     59       <li>
     60         T must be 4-byte-aligned.
     61       </li>
     62       <li>
     63         T must be in the same method.
     64       </li>
     65       <li>
     66         T must point to a sparse-switch data table.
     67       </li>
     68     </ul>
     69   </li>
     70 </ul>
     71 
     72 <h2>Behavior</h2>
     73 
     74 <ul>
     75   <li>
     76     The value of vA is used as a lookup key inside the sparse table data.
     77   </li>
     78   <li>
     79     If there exists an I with 0 <= I < table.size such that table.keys[I] = vA,
     80     then the jump target is determined as follows:
     81     <ul>
     82       <li>
     83         PC' = PC + table.targets[I].
     84       </li>
     85       <li>
     86         Execution will resume at this address.
     87       </li>
     88     </ul>
     89   </li>
     90   <li>
     91     Otherwise execution continues at the instruction following the sparse-switch
     92     statement.
     93   </li>
     94 </ul>
     95 
     96 <h2>Exceptions</h2>
     97 
     98 <p>
     99 None.
    100 </p>
    101 
    102 <h2>Notes</h2>
    103 
    104 <p>
    105 The low-to-high ordering of the keys allows the VM to employ binary search for
    106 the lookup, resulting in O(log table.size) comparisons.
    107 </p>
    108 
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