1 %verify "executed" 2 /* move-wide vA, vB */ 3 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 4 mov r2, rINST, lsr #8 @ r2<- A(+) 5 mov r3, rINST, lsr #12 @ r3<- B 6 and r2, r2, #15 7 add r3, rFP, r3, lsl #2 @ r3<- &fp[B] 8 add r2, rFP, r2, lsl #2 @ r2<- &fp[A] 9 ldmia r3, {r0-r1} @ r0/r1<- fp[B] 10 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST 11 GET_INST_OPCODE(ip) @ extract opcode from rINST 12 stmia r2, {r0-r1} @ fp[A]<- r0/r1 13 GOTO_OPCODE(ip) @ jump to next instruction 14
