1 %default { "func":"dvmInterpHandlePackedSwitch" } 2 %verify executed 3 /* 4 * Handle a packed-switch or sparse-switch instruction. In both cases 5 * we decode it and hand it off to a helper function. 6 * 7 * We don't really expect backward branches in a switch statement, but 8 * they're perfectly legal, so we check for them here. 9 * 10 * for: packed-switch, sparse-switch 11 */ 12 /* op vAA, +BBBB */ 13 FETCH(r0, 1) @ r0<- bbbb (lo) 14 FETCH(r1, 2) @ r1<- BBBB (hi) 15 mov r3, rINST, lsr #8 @ r3<- AA 16 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb 17 GET_VREG(r1, r3) @ r1<- vAA 18 add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 19 bl $func @ r0<- code-unit branch offset 20 movs r9, r0, asl #1 @ r9<- branch byte offset, check sign 21 bmi common_backwardBranch @ backward branch, do periodic checks 22 beq common_backwardBranch @ (want to use BLE but V is unknown) 23 #if defined(WITH_JIT) 24 GET_JIT_PROF_TABLE(r0) 25 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST 26 cmp r0,#0 27 bne common_updateProfile 28 GET_INST_OPCODE(ip) @ extract opcode from rINST 29 GOTO_OPCODE(ip) @ jump to next instruction 30 #else 31 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST 32 GET_INST_OPCODE(ip) @ extract opcode from rINST 33 GOTO_OPCODE(ip) @ jump to next instruction 34 #endif 35
