1 This is ../.././gas/doc/as.info, produced by makeinfo version 4.8 from 2 ../.././gas/doc/as.texinfo. 3 4 START-INFO-DIR-ENTRY 5 * As: (as). The GNU assembler. 6 * Gas: (as). The GNU assembler. 7 END-INFO-DIR-ENTRY 8 9 This file documents the GNU Assembler "as". 10 11 Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002 12 Free Software Foundation, Inc. 13 14 Permission is granted to copy, distribute and/or modify this document 15 under the terms of the GNU Free Documentation License, Version 1.1 or 16 any later version published by the Free Software Foundation; with no 17 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover 18 Texts. A copy of the license is included in the section entitled "GNU 19 Free Documentation License". 20 21 22 File: as.info, Node: Top, Next: Overview, Up: (dir) 23 24 Using as 25 ******** 26 27 This file is a user guide to the GNU assembler `as' version 2.17. 28 29 This document is distributed under the terms of the GNU Free 30 Documentation License. A copy of the license is included in the 31 section entitled "GNU Free Documentation License". 32 33 * Menu: 34 35 * Overview:: Overview 36 * Invoking:: Command-Line Options 37 * Syntax:: Syntax 38 * Sections:: Sections and Relocation 39 * Symbols:: Symbols 40 * Expressions:: Expressions 41 * Pseudo Ops:: Assembler Directives 42 * Machine Dependencies:: Machine Dependent Features 43 * Reporting Bugs:: Reporting Bugs 44 * Acknowledgements:: Who Did What 45 * GNU Free Documentation License:: GNU Free Documentation License 46 * Index:: Index 47 48 49 File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top 50 51 1 Overview 52 ********** 53 54 Here is a brief summary of how to invoke `as'. For details, *note 55 Command-Line Options: Invoking. 56 57 as [-a[cdhlns][=FILE]] [-alternate] [-D] 58 [-defsym SYM=VAL] [-f] [-g] [-gstabs] 59 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J] 60 [-K] [-L] [-listing-lhs-width=NUM] 61 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM] 62 [-listing-cont-lines=NUM] [-keep-locals] [-o 63 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics] 64 [-v] [-version] [-version] [-W] [-warn] 65 [-fatal-warnings] [-w] [-x] [-Z] [@FILE] 66 [-target-help] [TARGET-OPTIONS] 67 [-|FILES ...] 68 69 _Target Alpha options:_ 70 [-mCPU] 71 [-mdebug | -no-mdebug] 72 [-relax] [-g] [-GSIZE] 73 [-F] [-32addr] 74 75 _Target ARC options:_ 76 [-marc[5|6|7|8]] 77 [-EB|-EL] 78 79 _Target ARM options:_ 80 [-mcpu=PROCESSOR[+EXTENSION...]] 81 [-march=ARCHITECTURE[+EXTENSION...]] 82 [-mfpu=FLOATING-POINT-FORMAT] 83 [-mfloat-abi=ABI] 84 [-meabi=VER] 85 [-mthumb] 86 [-EB|-EL] 87 [-mapcs-32|-mapcs-26|-mapcs-float| 88 -mapcs-reentrant] 89 [-mthumb-interwork] [-k] 90 91 _Target CRIS options:_ 92 [-underscore | -no-underscore] 93 [-pic] [-N] 94 [-emulation=criself | -emulation=crisaout] 95 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32] 96 97 _Target D10V options:_ 98 [-O] 99 100 _Target D30V options:_ 101 [-O|-n|-N] 102 103 _Target i386 options:_ 104 [-32|-64] [-n] 105 106 _Target i960 options:_ 107 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| 108 -AKC|-AMC] 109 [-b] [-no-relax] 110 111 _Target IA-64 options:_ 112 [-mconstant-gp|-mauto-pic] 113 [-milp32|-milp64|-mlp64|-mp64] 114 [-mle|mbe] 115 [-mtune=itanium1|-mtune=itanium2] 116 [-munwind-check=warning|-munwind-check=error] 117 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error] 118 [-x|-xexplicit] [-xauto] [-xdebug] 119 120 _Target IP2K options:_ 121 [-mip2022|-mip2022ext] 122 123 _Target M32C options:_ 124 [-m32c|-m16c] 125 126 _Target M32R options:_ 127 [-m32rx|-[no-]warn-explicit-parallel-conflicts| 128 -W[n]p] 129 130 _Target M680X0 options:_ 131 [-l] [-m68000|-m68010|-m68020|...] 132 133 _Target M68HC11 options:_ 134 [-m68hc11|-m68hc12|-m68hcs12] 135 [-mshort|-mlong] 136 [-mshort-double|-mlong-double] 137 [-force-long-branchs] [-short-branchs] 138 [-strict-direct-mode] [-print-insn-syntax] 139 [-print-opcodes] [-generate-example] 140 141 _Target MCORE options:_ 142 [-jsri2bsr] [-sifilter] [-relax] 143 [-mcpu=[210|340]] 144 145 _Target MIPS options:_ 146 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]] 147 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared] 148 [-non_shared] [-xgot] 149 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32] 150 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2] 151 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] 152 [-mips64] [-mips64r2] 153 [-construct-floats] [-no-construct-floats] 154 [-trap] [-no-break] [-break] [-no-trap] 155 [-mfix7000] [-mno-fix7000] 156 [-mips16] [-no-mips16] 157 [-mips3d] [-no-mips3d] 158 [-mdmx] [-no-mdmx] 159 [-mdsp] [-mno-dsp] 160 [-mmt] [-mno-mt] 161 [-mdebug] [-no-mdebug] 162 [-mpdr] [-mno-pdr] 163 164 _Target MMIX options:_ 165 [-fixed-special-register-names] [-globalize-symbols] 166 [-gnu-syntax] [-relax] [-no-predefined-symbols] 167 [-no-expand] [-no-merge-gregs] [-x] 168 [-linker-allocated-gregs] 169 170 _Target PDP11 options:_ 171 [-mpic|-mno-pic] [-mall] [-mno-extensions] 172 [-mEXTENSION|-mno-EXTENSION] 173 [-mCPU] [-mMACHINE] 174 175 _Target picoJava options:_ 176 [-mb|-me] 177 178 _Target PowerPC options:_ 179 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604| 180 -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke| 181 -mbooke32|-mbooke64] 182 [-mcom|-many|-maltivec] [-memb] 183 [-mregnames|-mno-regnames] 184 [-mrelocatable|-mrelocatable-lib] 185 [-mlittle|-mlittle-endian|-mbig|-mbig-endian] 186 [-msolaris|-mno-solaris] 187 188 _Target SPARC options:_ 189 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite 190 -Av8plus|-Av8plusa|-Av9|-Av9a] 191 [-xarch=v8plus|-xarch=v8plusa] [-bump] 192 [-32|-64] 193 194 _Target TIC54X options:_ 195 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] 196 [-merrors-to-file <FILENAME>|-me <FILENAME>] 197 198 199 _Target Z80 options:_ 200 [-z80] [-r800] 201 [ -ignore-undocumented-instructions] [-Wnud] 202 [ -ignore-unportable-instructions] [-Wnup] 203 [ -warn-undocumented-instructions] [-Wud] 204 [ -warn-unportable-instructions] [-Wup] 205 [ -forbid-undocumented-instructions] [-Fud] 206 [ -forbid-unportable-instructions] [-Fup] 207 208 209 _Target Xtensa options:_ 210 [-[no-]text-section-literals] [-[no-]absolute-literals] 211 [-[no-]target-align] [-[no-]longcalls] 212 [-[no-]transform] 213 [-rename-section OLDNAME=NEWNAME] 214 215 `@FILE' 216 Read command-line options from FILE. The options read are 217 inserted in place of the original @FILE option. If FILE does not 218 exist, or cannot be read, then the option will be treated 219 literally, and not removed. 220 221 Options in FILE are separated by whitespace. A whitespace 222 character may be included in an option by surrounding the entire 223 option in either single or double quotes. Any character 224 (including a backslash) may be included by prefixing the character 225 to be included with a backslash. The FILE may itself contain 226 additional @FILE options; any such options will be processed 227 recursively. 228 229 `-a[cdhlmns]' 230 Turn on listings, in any of a variety of ways: 231 232 `-ac' 233 omit false conditionals 234 235 `-ad' 236 omit debugging directives 237 238 `-ah' 239 include high-level source 240 241 `-al' 242 include assembly 243 244 `-am' 245 include macro expansions 246 247 `-an' 248 omit forms processing 249 250 `-as' 251 include symbols 252 253 `=file' 254 set the name of the listing file 255 256 You may combine these options; for example, use `-aln' for assembly 257 listing without forms processing. The `=file' option, if used, 258 must be the last one. By itself, `-a' defaults to `-ahls'. 259 260 `--alternate' 261 Begin in alternate macro mode, see *Note `.altmacro': Altmacro. 262 263 `-D' 264 Ignored. This option is accepted for script compatibility with 265 calls to other assemblers. 266 267 `--defsym SYM=VALUE' 268 Define the symbol SYM to be VALUE before assembling the input file. 269 VALUE must be an integer constant. As in C, a leading `0x' 270 indicates a hexadecimal value, and a leading `0' indicates an 271 octal value. 272 273 `-f' 274 "fast"--skip whitespace and comment preprocessing (assume source is 275 compiler output). 276 277 `-g' 278 `--gen-debug' 279 Generate debugging information for each assembler source line 280 using whichever debug format is preferred by the target. This 281 currently means either STABS, ECOFF or DWARF2. 282 283 `--gstabs' 284 Generate stabs debugging information for each assembler line. This 285 may help debugging assembler code, if the debugger can handle it. 286 287 `--gstabs+' 288 Generate stabs debugging information for each assembler line, with 289 GNU extensions that probably only gdb can handle, and that could 290 make other debuggers crash or refuse to read your program. This 291 may help debugging assembler code. Currently the only GNU 292 extension is the location of the current working directory at 293 assembling time. 294 295 `--gdwarf-2' 296 Generate DWARF2 debugging information for each assembler line. 297 This may help debugging assembler code, if the debugger can handle 298 it. Note--this option is only supported by some targets, not all 299 of them. 300 301 `--help' 302 Print a summary of the command line options and exit. 303 304 `--target-help' 305 Print a summary of all target specific options and exit. 306 307 `-I DIR' 308 Add directory DIR to the search list for `.include' directives. 309 310 `-J' 311 Don't warn about signed overflow. 312 313 `-K' 314 Issue warnings when difference tables altered for long 315 displacements. 316 317 `-L' 318 `--keep-locals' 319 Keep (in the symbol table) local symbols. On traditional a.out 320 systems these start with `L', but different systems have different 321 local label prefixes. 322 323 `--listing-lhs-width=NUMBER' 324 Set the maximum width, in words, of the output data column for an 325 assembler listing to NUMBER. 326 327 `--listing-lhs-width2=NUMBER' 328 Set the maximum width, in words, of the output data column for 329 continuation lines in an assembler listing to NUMBER. 330 331 `--listing-rhs-width=NUMBER' 332 Set the maximum width of an input source line, as displayed in a 333 listing, to NUMBER bytes. 334 335 `--listing-cont-lines=NUMBER' 336 Set the maximum number of lines printed in a listing for a single 337 line of input to NUMBER + 1. 338 339 `-o OBJFILE' 340 Name the object-file output from `as' OBJFILE. 341 342 `-R' 343 Fold the data section into the text section. 344 345 Set the default size of GAS's hash tables to a prime number close 346 to NUMBER. Increasing this value can reduce the length of time it 347 takes the assembler to perform its tasks, at the expense of 348 increasing the assembler's memory requirements. Similarly 349 reducing this value can reduce the memory requirements at the 350 expense of speed. 351 352 `--reduce-memory-overheads' 353 This option reduces GAS's memory requirements, at the expense of 354 making the assembly processes slower. Currently this switch is a 355 synonym for `--hash-size=4051', but in the future it may have 356 other effects as well. 357 358 `--statistics' 359 Print the maximum space (in bytes) and total time (in seconds) 360 used by assembly. 361 362 `--strip-local-absolute' 363 Remove local absolute symbols from the outgoing symbol table. 364 365 `-v' 366 `-version' 367 Print the `as' version. 368 369 `--version' 370 Print the `as' version and exit. 371 372 `-W' 373 `--no-warn' 374 Suppress warning messages. 375 376 `--fatal-warnings' 377 Treat warnings as errors. 378 379 `--warn' 380 Don't suppress warning messages or treat them as errors. 381 382 `-w' 383 Ignored. 384 385 `-x' 386 Ignored. 387 388 `-Z' 389 Generate an object file even after errors. 390 391 `-- | FILES ...' 392 Standard input, or source files to assemble. 393 394 395 The following options are available when as is configured for an ARC 396 processor. 397 398 `-marc[5|6|7|8]' 399 This option selects the core processor variant. 400 401 `-EB | -EL' 402 Select either big-endian (-EB) or little-endian (-EL) output. 403 404 The following options are available when as is configured for the ARM 405 processor family. 406 407 `-mcpu=PROCESSOR[+EXTENSION...]' 408 Specify which ARM processor variant is the target. 409 410 `-march=ARCHITECTURE[+EXTENSION...]' 411 Specify which ARM architecture variant is used by the target. 412 413 `-mfpu=FLOATING-POINT-FORMAT' 414 Select which Floating Point architecture is the target. 415 416 `-mfloat-abi=ABI' 417 Select which floating point ABI is in use. 418 419 `-mthumb' 420 Enable Thumb only instruction decoding. 421 422 `-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant' 423 Select which procedure calling convention is in use. 424 425 `-EB | -EL' 426 Select either big-endian (-EB) or little-endian (-EL) output. 427 428 `-mthumb-interwork' 429 Specify that the code has been generated with interworking between 430 Thumb and ARM code in mind. 431 432 `-k' 433 Specify that PIC code has been generated. 434 435 See the info pages for documentation of the CRIS-specific options. 436 437 The following options are available when as is configured for a D10V 438 processor. 439 `-O' 440 Optimize output by parallelizing instructions. 441 442 The following options are available when as is configured for a D30V 443 processor. 444 `-O' 445 Optimize output by parallelizing instructions. 446 447 `-n' 448 Warn when nops are generated. 449 450 `-N' 451 Warn when a nop after a 32-bit multiply instruction is generated. 452 453 The following options are available when as is configured for the 454 Intel 80960 processor. 455 456 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 457 Specify which variant of the 960 architecture is the target. 458 459 `-b' 460 Add code to collect statistics about branches taken. 461 462 `-no-relax' 463 Do not alter compare-and-branch instructions for long 464 displacements; error if necessary. 465 466 467 The following options are available when as is configured for the 468 Ubicom IP2K series. 469 470 `-mip2022ext' 471 Specifies that the extended IP2022 instructions are allowed. 472 473 `-mip2022' 474 Restores the default behaviour, which restricts the permitted 475 instructions to just the basic IP2022 ones. 476 477 478 The following options are available when as is configured for the 479 Renesas M32C and M16C processors. 480 481 `-m32c' 482 Assemble M32C instructions. 483 484 `-m16c' 485 Assemble M16C instructions (the default). 486 487 488 The following options are available when as is configured for the 489 Renesas M32R (formerly Mitsubishi M32R) series. 490 491 `--m32rx' 492 Specify which processor in the M32R family is the target. The 493 default is normally the M32R, but this option changes it to the 494 M32RX. 495 496 `--warn-explicit-parallel-conflicts or --Wp' 497 Produce warning messages when questionable parallel constructs are 498 encountered. 499 500 `--no-warn-explicit-parallel-conflicts or --Wnp' 501 Do not produce warning messages when questionable parallel 502 constructs are encountered. 503 504 505 The following options are available when as is configured for the 506 Motorola 68000 series. 507 508 `-l' 509 Shorten references to undefined symbols, to one word instead of 510 two. 511 512 `-m68000 | -m68008 | -m68010 | -m68020 | -m68030' 513 `| -m68040 | -m68060 | -m68302 | -m68331 | -m68332' 514 `| -m68333 | -m68340 | -mcpu32 | -m5200' 515 Specify what processor in the 68000 family is the target. The 516 default is normally the 68020, but this can be changed at 517 configuration time. 518 519 `-m68881 | -m68882 | -mno-68881 | -mno-68882' 520 The target machine does (or does not) have a floating-point 521 coprocessor. The default is to assume a coprocessor for 68020, 522 68030, and cpu32. Although the basic 68000 is not compatible with 523 the 68881, a combination of the two can be specified, since it's 524 possible to do emulation of the coprocessor instructions with the 525 main processor. 526 527 `-m68851 | -mno-68851' 528 The target machine does (or does not) have a memory-management 529 unit coprocessor. The default is to assume an MMU for 68020 and 530 up. 531 532 533 For details about the PDP-11 machine dependent features options, see 534 *Note PDP-11-Options::. 535 536 `-mpic | -mno-pic' 537 Generate position-independent (or position-dependent) code. The 538 default is `-mpic'. 539 540 `-mall' 541 `-mall-extensions' 542 Enable all instruction set extensions. This is the default. 543 544 `-mno-extensions' 545 Disable all instruction set extensions. 546 547 `-mEXTENSION | -mno-EXTENSION' 548 Enable (or disable) a particular instruction set extension. 549 550 `-mCPU' 551 Enable the instruction set extensions supported by a particular 552 CPU, and disable all other extensions. 553 554 `-mMACHINE' 555 Enable the instruction set extensions supported by a particular 556 machine model, and disable all other extensions. 557 558 The following options are available when as is configured for a 559 picoJava processor. 560 561 `-mb' 562 Generate "big endian" format output. 563 564 `-ml' 565 Generate "little endian" format output. 566 567 568 The following options are available when as is configured for the 569 Motorola 68HC11 or 68HC12 series. 570 571 `-m68hc11 | -m68hc12 | -m68hcs12' 572 Specify what processor is the target. The default is defined by 573 the configuration option when building the assembler. 574 575 `-mshort' 576 Specify to use the 16-bit integer ABI. 577 578 `-mlong' 579 Specify to use the 32-bit integer ABI. 580 581 `-mshort-double' 582 Specify to use the 32-bit double ABI. 583 584 `-mlong-double' 585 Specify to use the 64-bit double ABI. 586 587 `--force-long-branchs' 588 Relative branches are turned into absolute ones. This concerns 589 conditional branches, unconditional branches and branches to a sub 590 routine. 591 592 `-S | --short-branchs' 593 Do not turn relative branchs into absolute ones when the offset is 594 out of range. 595 596 `--strict-direct-mode' 597 Do not turn the direct addressing mode into extended addressing 598 mode when the instruction does not support direct addressing mode. 599 600 `--print-insn-syntax' 601 Print the syntax of instruction in case of error. 602 603 `--print-opcodes' 604 print the list of instructions with syntax and then exit. 605 606 `--generate-example' 607 print an example of instruction for each possible instruction and 608 then exit. This option is only useful for testing `as'. 609 610 611 The following options are available when `as' is configured for the 612 SPARC architecture: 613 614 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 615 `-Av8plus | -Av8plusa | -Av9 | -Av9a' 616 Explicitly select a variant of the SPARC architecture. 617 618 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9' 619 and `-Av9a' select a 64 bit environment. 620 621 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 622 UltraSPARC extensions. 623 624 `-xarch=v8plus | -xarch=v8plusa' 625 For compatibility with the Solaris v9 assembler. These options are 626 equivalent to -Av8plus and -Av8plusa, respectively. 627 628 `-bump' 629 Warn when the assembler switches to another architecture. 630 631 The following options are available when as is configured for the 632 'c54x architecture. 633 634 `-mfar-mode' 635 Enable extended addressing mode. All addresses and relocations 636 will assume extended addressing (usually 23 bits). 637 638 `-mcpu=CPU_VERSION' 639 Sets the CPU version being compiled for. 640 641 `-merrors-to-file FILENAME' 642 Redirect error output to a file, for broken systems which don't 643 support such behaviour in the shell. 644 645 The following options are available when as is configured for a MIPS 646 processor. 647 648 `-G NUM' 649 This option sets the largest size of an object that can be 650 referenced implicitly with the `gp' register. It is only accepted 651 for targets that use ECOFF format, such as a DECstation running 652 Ultrix. The default value is 8. 653 654 `-EB' 655 Generate "big endian" format output. 656 657 `-EL' 658 Generate "little endian" format output. 659 660 `-mips1' 661 `-mips2' 662 `-mips3' 663 `-mips4' 664 `-mips5' 665 `-mips32' 666 `-mips32r2' 667 `-mips64' 668 `-mips64r2' 669 Generate code for a particular MIPS Instruction Set Architecture 670 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an 671 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000' 672 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32', 673 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic 674 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64 675 Release 2' ISA processors, respectively. 676 677 `-march=CPU' 678 Generate code for a particular MIPS cpu. 679 680 `-mtune=CPU' 681 Schedule and tune for a particular MIPS cpu. 682 683 `-mfix7000' 684 `-mno-fix7000' 685 Cause nops to be inserted if the read of the destination register 686 of an mfhi or mflo instruction occurs in the following two 687 instructions. 688 689 `-mdebug' 690 `-no-mdebug' 691 Cause stabs-style debugging output to go into an ECOFF-style 692 .mdebug section instead of the standard ELF .stabs sections. 693 694 `-mpdr' 695 `-mno-pdr' 696 Control generation of `.pdr' sections. 697 698 `-mgp32' 699 `-mfp32' 700 The register sizes are normally inferred from the ISA and ABI, but 701 these flags force a certain group of registers to be treated as 32 702 bits wide at all times. `-mgp32' controls the size of 703 general-purpose registers and `-mfp32' controls the size of 704 floating-point registers. 705 706 `-mips16' 707 `-no-mips16' 708 Generate code for the MIPS 16 processor. This is equivalent to 709 putting `.set mips16' at the start of the assembly file. 710 `-no-mips16' turns off this option. 711 712 `-mips3d' 713 `-no-mips3d' 714 Generate code for the MIPS-3D Application Specific Extension. 715 This tells the assembler to accept MIPS-3D instructions. 716 `-no-mips3d' turns off this option. 717 718 `-mdmx' 719 `-no-mdmx' 720 Generate code for the MDMX Application Specific Extension. This 721 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 722 off this option. 723 724 `-mdsp' 725 `-mno-dsp' 726 Generate code for the DSP Application Specific Extension. This 727 tells the assembler to accept DSP instructions. `-mno-dsp' turns 728 off this option. 729 730 `-mmt' 731 `-mno-mt' 732 Generate code for the MT Application Specific Extension. This 733 tells the assembler to accept MT instructions. `-mno-mt' turns 734 off this option. 735 736 `--construct-floats' 737 `--no-construct-floats' 738 The `--no-construct-floats' option disables the construction of 739 double width floating point constants by loading the two halves of 740 the value into the two single width floating point registers that 741 make up the double width register. By default 742 `--construct-floats' is selected, allowing construction of these 743 floating point constants. 744 745 `--emulation=NAME' 746 This option causes `as' to emulate `as' configured for some other 747 target, in all respects, including output format (choosing between 748 ELF and ECOFF only), handling of pseudo-opcodes which may generate 749 debugging information or store symbol table information, and 750 default endianness. The available configuration names are: 751 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf', 752 `mipsbelf'. The first two do not alter the default endianness 753 from that of the primary target for which the assembler was 754 configured; the others change the default to little- or big-endian 755 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL' 756 will override the endianness selection in any case. 757 758 This option is currently supported only when the primary target 759 `as' is configured for is a MIPS ELF or ECOFF target. 760 Furthermore, the primary target or others specified with 761 `--enable-targets=...' at configuration time must include support 762 for the other format, if both are to be available. For example, 763 the Irix 5 configuration includes support for both. 764 765 Eventually, this option will support more configurations, with more 766 fine-grained control over the assembler's behavior, and will be 767 supported for more processors. 768 769 `-nocpp' 770 `as' ignores this option. It is accepted for compatibility with 771 the native tools. 772 773 `--trap' 774 `--no-trap' 775 `--break' 776 `--no-break' 777 Control how to deal with multiplication overflow and division by 778 zero. `--trap' or `--no-break' (which are synonyms) take a trap 779 exception (and only work for Instruction Set Architecture level 2 780 and higher); `--break' or `--no-trap' (also synonyms, and the 781 default) take a break exception. 782 783 `-n' 784 When this option is used, `as' will issue a warning every time it 785 generates a nop instruction from a macro. 786 787 The following options are available when as is configured for an 788 MCore processor. 789 790 `-jsri2bsr' 791 `-nojsri2bsr' 792 Enable or disable the JSRI to BSR transformation. By default this 793 is enabled. The command line option `-nojsri2bsr' can be used to 794 disable it. 795 796 `-sifilter' 797 `-nosifilter' 798 Enable or disable the silicon filter behaviour. By default this 799 is disabled. The default can be overridden by the `-sifilter' 800 command line option. 801 802 `-relax' 803 Alter jump instructions for long displacements. 804 805 `-mcpu=[210|340]' 806 Select the cpu type on the target hardware. This controls which 807 instructions can be assembled. 808 809 `-EB' 810 Assemble for a big endian target. 811 812 `-EL' 813 Assemble for a little endian target. 814 815 816 See the info pages for documentation of the MMIX-specific options. 817 818 The following options are available when as is configured for an 819 Xtensa processor. 820 821 `--text-section-literals | --no-text-section-literals' 822 With `--text-section-literals', literal pools are interspersed in 823 the text section. The default is `--no-text-section-literals', 824 which places literals in a separate section in the output file. 825 These options only affect literals referenced via PC-relative 826 `L32R' instructions; literals for absolute mode `L32R' 827 instructions are handled separately. 828 829 `--absolute-literals | --no-absolute-literals' 830 Indicate to the assembler whether `L32R' instructions use absolute 831 or PC-relative addressing. The default is to assume absolute 832 addressing if the Xtensa processor includes the absolute `L32R' 833 addressing option. Otherwise, only the PC-relative `L32R' mode 834 can be used. 835 836 `--target-align | --no-target-align' 837 Enable or disable automatic alignment to reduce branch penalties 838 at the expense of some code density. The default is 839 `--target-align'. 840 841 `--longcalls | --no-longcalls' 842 Enable or disable transformation of call instructions to allow 843 calls across a greater range of addresses. The default is 844 `--no-longcalls'. 845 846 `--transform | --no-transform' 847 Enable or disable all assembler transformations of Xtensa 848 instructions. The default is `--transform'; `--no-transform' 849 should be used only in the rare cases when the instructions must 850 be exactly as specified in the assembly source. 851 852 The following options are available when as is configured for a Z80 853 family processor. 854 `-z80' 855 Assemble for Z80 processor. 856 857 `-r800' 858 Assemble for R800 processor. 859 860 `-ignore-undocumented-instructions' 861 `-Wnud' 862 Assemble undocumented Z80 instructions that also work on R800 863 without warning. 864 865 `-ignore-unportable-instructions' 866 `-Wnup' 867 Assemble all undocumented Z80 instructions without warning. 868 869 `-warn-undocumented-instructions' 870 `-Wud' 871 Issue a warning for undocumented Z80 instructions that also work 872 on R800. 873 874 `-warn-unportable-instructions' 875 `-Wup' 876 Issue a warning for undocumented Z80 instructions that do notwork 877 on R800. 878 879 `-forbid-undocumented-instructions' 880 `-Fud' 881 Treat all undocumented instructions as errors. 882 883 `-forbid-unportable-instructions' 884 `-Fup' 885 Treat undocumented Z80 intructions that do notwork on R800 as 886 errors. 887 888 * Menu: 889 890 * Manual:: Structure of this Manual 891 * GNU Assembler:: The GNU Assembler 892 * Object Formats:: Object File Formats 893 * Command Line:: Command Line 894 * Input Files:: Input Files 895 * Object:: Output (Object) File 896 * Errors:: Error and Warning Messages 897 898 899 File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview 900 901 1.1 Structure of this Manual 902 ============================ 903 904 This manual is intended to describe what you need to know to use GNU 905 `as'. We cover the syntax expected in source files, including notation 906 for symbols, constants, and expressions; the directives that `as' 907 understands; and of course how to invoke `as'. 908 909 This manual also describes some of the machine-dependent features of 910 various flavors of the assembler. 911 912 On the other hand, this manual is _not_ intended as an introduction 913 to programming in assembly language--let alone programming in general! 914 In a similar vein, we make no attempt to introduce the machine 915 architecture; we do _not_ describe the instruction set, standard 916 mnemonics, registers or addressing modes that are standard to a 917 particular architecture. You may want to consult the manufacturer's 918 machine architecture manual for this information. 919 920 921 File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview 922 923 1.2 The GNU Assembler 924 ===================== 925 926 GNU `as' is really a family of assemblers. If you use (or have used) 927 the GNU assembler on one architecture, you should find a fairly similar 928 environment when you use it on another architecture. Each version has 929 much in common with the others, including object file formats, most 930 assembler directives (often called "pseudo-ops") and assembler syntax. 931 932 `as' is primarily intended to assemble the output of the GNU C 933 compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried 934 to make `as' assemble correctly everything that other assemblers for 935 the same machine would assemble. Any exceptions are documented 936 explicitly (*note Machine Dependencies::). This doesn't mean `as' 937 always uses the same syntax as another assembler for the same 938 architecture; for example, we know of several incompatible versions of 939 680x0 assembly language syntax. 940 941 Unlike older assemblers, `as' is designed to assemble a source 942 program in one pass of the source file. This has a subtle impact on the 943 `.org' directive (*note `.org': Org.). 944 945 946 File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview 947 948 1.3 Object File Formats 949 ======================= 950 951 The GNU assembler can be configured to produce several alternative 952 object file formats. For the most part, this does not affect how you 953 write assembly language programs; but directives for debugging symbols 954 are typically different in different file formats. *Note Symbol 955 Attributes: Symbol Attributes. 956 957 958 File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview 959 960 1.4 Command Line 961 ================ 962 963 After the program name `as', the command line may contain options and 964 file names. Options may appear in any order, and may be before, after, 965 or between file names. The order of file names is significant. 966 967 `--' (two hyphens) by itself names the standard input file 968 explicitly, as one of the files for `as' to assemble. 969 970 Except for `--' any command line argument that begins with a hyphen 971 (`-') is an option. Each option changes the behavior of `as'. No 972 option changes the way another option works. An option is a `-' 973 followed by one or more letters; the case of the letter is important. 974 All options are optional. 975 976 Some options expect exactly one file name to follow them. The file 977 name may either immediately follow the option's letter (compatible with 978 older assemblers) or it may be the next command argument (GNU 979 standard). These two command lines are equivalent: 980 981 as -o my-object-file.o mumble.s 982 as -omy-object-file.o mumble.s 983 984 985 File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview 986 987 1.5 Input Files 988 =============== 989 990 We use the phrase "source program", abbreviated "source", to describe 991 the program input to one run of `as'. The program may be in one or 992 more files; how the source is partitioned into files doesn't change the 993 meaning of the source. 994 995 The source program is a concatenation of the text in all the files, 996 in the order specified. 997 998 Each time you run `as' it assembles exactly one source program. The 999 source program is made up of one or more files. (The standard input is 1000 also a file.) 1001 1002 You give `as' a command line that has zero or more input file names. 1003 The input files are read (from left file name to right). A command 1004 line argument (in any position) that has no special meaning is taken to 1005 be an input file name. 1006 1007 If you give `as' no file names it attempts to read one input file 1008 from the `as' standard input, which is normally your terminal. You may 1009 have to type <ctl-D> to tell `as' there is no more program to assemble. 1010 1011 Use `--' if you need to explicitly name the standard input file in 1012 your command line. 1013 1014 If the source is empty, `as' produces a small, empty object file. 1015 1016 Filenames and Line-numbers 1017 -------------------------- 1018 1019 There are two ways of locating a line in the input file (or files) and 1020 either may be used in reporting error messages. One way refers to a 1021 line number in a physical file; the other refers to a line number in a 1022 "logical" file. *Note Error and Warning Messages: Errors. 1023 1024 "Physical files" are those files named in the command line given to 1025 `as'. 1026 1027 "Logical files" are simply names declared explicitly by assembler 1028 directives; they bear no relation to physical files. Logical file 1029 names help error messages reflect the original source file, when `as' 1030 source is itself synthesized from other files. `as' understands the 1031 `#' directives emitted by the `gcc' preprocessor. See also *Note 1032 `.file': File. 1033 1034 1035 File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview 1036 1037 1.6 Output (Object) File 1038 ======================== 1039 1040 Every time you run `as' it produces an output file, which is your 1041 assembly language program translated into numbers. This file is the 1042 object file. Its default name is `a.out'. You can give it another 1043 name by using the `-o' option. Conventionally, object file names end 1044 with `.o'. The default name is used for historical reasons: older 1045 assemblers were capable of assembling self-contained programs directly 1046 into a runnable program. (For some formats, this isn't currently 1047 possible, but it can be done for the `a.out' format.) 1048 1049 The object file is meant for input to the linker `ld'. It contains 1050 assembled program code, information to help `ld' integrate the 1051 assembled program into a runnable file, and (optionally) symbolic 1052 information for the debugger. 1053 1054 1055 File: as.info, Node: Errors, Prev: Object, Up: Overview 1056 1057 1.7 Error and Warning Messages 1058 ============================== 1059 1060 `as' may write warnings and error messages to the standard error file 1061 (usually your terminal). This should not happen when a compiler runs 1062 `as' automatically. Warnings report an assumption made so that `as' 1063 could keep assembling a flawed program; errors report a grave problem 1064 that stops the assembly. 1065 1066 Warning messages have the format 1067 1068 file_name:NNN:Warning Message Text 1069 1070 (where NNN is a line number). If a logical file name has been given 1071 (*note `.file': File.) it is used for the filename, otherwise the name 1072 of the current input file is used. If a logical line number was given 1073 (*note `.line': Line.) then it is used to calculate the number printed, 1074 otherwise the actual line in the current source file is printed. The 1075 message text is intended to be self explanatory (in the grand Unix 1076 tradition). 1077 1078 Error messages have the format 1079 file_name:NNN:FATAL:Error Message Text 1080 The file name and line number are derived as for warning messages. 1081 The actual message text may be rather less explanatory because many of 1082 them aren't supposed to happen. 1083 1084 1085 File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top 1086 1087 2 Command-Line Options 1088 ********************** 1089 1090 This chapter describes command-line options available in _all_ versions 1091 of the GNU assembler; *note Machine Dependencies::, for options specific 1092 to particular machine architectures. 1093 1094 If you are invoking `as' via the GNU C compiler, you can use the 1095 `-Wa' option to pass arguments through to the assembler. The assembler 1096 arguments must be separated from each other (and the `-Wa') by commas. 1097 For example: 1098 1099 gcc -c -g -O -Wa,-alh,-L file.c 1100 1101 This passes two options to the assembler: `-alh' (emit a listing to 1102 standard output with high-level and assembly source) and `-L' (retain 1103 local symbols in the symbol table). 1104 1105 Usually you do not need to use this `-Wa' mechanism, since many 1106 compiler command-line options are automatically passed to the assembler 1107 by the compiler. (You can call the GNU compiler driver with the `-v' 1108 option to see precisely what options it passes to each compilation 1109 pass, including the assembler.) 1110 1111 * Menu: 1112 1113 * a:: -a[cdhlns] enable listings 1114 * alternate:: --alternate enable alternate macro syntax 1115 * D:: -D for compatibility 1116 * f:: -f to work faster 1117 * I:: -I for .include search path 1118 1119 * K:: -K for difference tables 1120 1121 * L:: -L to retain local labels 1122 * listing:: --listing-XXX to configure listing output 1123 * M:: -M or --mri to assemble in MRI compatibility mode 1124 * MD:: --MD for dependency tracking 1125 * o:: -o to name the object file 1126 * R:: -R to join data and text sections 1127 * statistics:: --statistics to see statistics about assembly 1128 * traditional-format:: --traditional-format for compatible output 1129 * v:: -v to announce version 1130 * W:: -W, --no-warn, --warn, --fatal-warnings to control warnings 1131 * Z:: -Z to make object file even after errors 1132 1133 1134 File: as.info, Node: a, Next: alternate, Up: Invoking 1135 1136 2.1 Enable Listings: `-a[cdhlns]' 1137 ================================= 1138 1139 These options enable listing output from the assembler. By itself, 1140 `-a' requests high-level, assembly, and symbols listing. You can use 1141 other letters to select specific options for the list: `-ah' requests a 1142 high-level language listing, `-al' requests an output-program assembly 1143 listing, and `-as' requests a symbol table listing. High-level 1144 listings require that a compiler debugging option like `-g' be used, 1145 and that assembly listings (`-al') be requested also. 1146 1147 Use the `-ac' option to omit false conditionals from a listing. Any 1148 lines which are not assembled because of a false `.if' (or `.ifdef', or 1149 any other conditional), or a true `.if' followed by an `.else', will be 1150 omitted from the listing. 1151 1152 Use the `-ad' option to omit debugging directives from the listing. 1153 1154 Once you have specified one of these options, you can further control 1155 listing output and its appearance using the directives `.list', 1156 `.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an' 1157 option turns off all forms processing. If you do not request listing 1158 output with one of the `-a' options, the listing-control directives 1159 have no effect. 1160 1161 The letters after `-a' may be combined into one option, _e.g._, 1162 `-aln'. 1163 1164 Note if the assembler source is coming from the standard input (eg 1165 because it is being created by `gcc' and the `-pipe' command line switch 1166 is being used) then the listing will not contain any comments or 1167 preprocessor directives. This is because the listing code buffers 1168 input source lines from stdin only after they have been preprocessed by 1169 the assembler. This reduces memory usage and makes the code more 1170 efficient. 1171 1172 1173 File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking 1174 1175 2.2 `--alternate' 1176 ================= 1177 1178 Begin in alternate macro mode, see *Note `.altmacro': Altmacro. 1179 1180 1181 File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking 1182 1183 2.3 `-D' 1184 ======== 1185 1186 This option has no effect whatsoever, but it is accepted to make it more 1187 likely that scripts written for other assemblers also work with `as'. 1188 1189 1190 File: as.info, Node: f, Next: I, Prev: D, Up: Invoking 1191 1192 2.4 Work Faster: `-f' 1193 ===================== 1194 1195 `-f' should only be used when assembling programs written by a 1196 (trusted) compiler. `-f' stops the assembler from doing whitespace and 1197 comment preprocessing on the input file(s) before assembling them. 1198 *Note Preprocessing: Preprocessing. 1199 1200 _Warning:_ if you use `-f' when the files actually need to be 1201 preprocessed (if they contain comments, for example), `as' does 1202 not work correctly. 1203 1204 1205 File: as.info, Node: I, Next: K, Prev: f, Up: Invoking 1206 1207 2.5 `.include' Search Path: `-I' PATH 1208 ===================================== 1209 1210 Use this option to add a PATH to the list of directories `as' searches 1211 for files specified in `.include' directives (*note `.include': 1212 Include.). You may use `-I' as many times as necessary to include a 1213 variety of paths. The current working directory is always searched 1214 first; after that, `as' searches any `-I' directories in the same order 1215 as they were specified (left to right) on the command line. 1216 1217 1218 File: as.info, Node: K, Next: L, Prev: I, Up: Invoking 1219 1220 2.6 Difference Tables: `-K' 1221 =========================== 1222 1223 `as' sometimes alters the code emitted for directives of the form 1224 `.word SYM1-SYM2'; *note `.word': Word. You can use the `-K' option if 1225 you want a warning issued when this is done. 1226 1227 1228 File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking 1229 1230 2.7 Include Local Labels: `-L' 1231 ============================== 1232 1233 Labels beginning with `L' (upper case only) are called "local labels". 1234 *Note Symbol Names::. Normally you do not see such labels when 1235 debugging, because they are intended for the use of programs (like 1236 compilers) that compose assembler programs, not for your notice. 1237 Normally both `as' and `ld' discard such labels, so you do not normally 1238 debug with them. 1239 1240 This option tells `as' to retain those `L...' symbols in the object 1241 file. Usually if you do this you also tell the linker `ld' to preserve 1242 symbols whose names begin with `L'. 1243 1244 By default, a local label is any label beginning with `L', but each 1245 target is allowed to redefine the local label prefix. On the HPPA 1246 local labels begin with `L$'. 1247 1248 1249 File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking 1250 1251 2.8 Configuring listing output: `--listing' 1252 =========================================== 1253 1254 The listing feature of the assembler can be enabled via the command 1255 line switch `-a' (*note a::). This feature combines the input source 1256 file(s) with a hex dump of the corresponding locations in the output 1257 object file, and displays them as a listing file. The format of this 1258 listing can be controlled by pseudo ops inside the assembler source 1259 (*note List:: *note Title:: *note Sbttl:: *note Psize:: *note Eject::) 1260 and also by the following switches: 1261 1262 `--listing-lhs-width=`number'' 1263 Sets the maximum width, in words, of the first line of the hex 1264 byte dump. This dump appears on the left hand side of the listing 1265 output. 1266 1267 `--listing-lhs-width2=`number'' 1268 Sets the maximum width, in words, of any further lines of the hex 1269 byte dump for a given input source line. If this value is not 1270 specified, it defaults to being the same as the value specified 1271 for `--listing-lhs-width'. If neither switch is used the default 1272 is to one. 1273 1274 `--listing-rhs-width=`number'' 1275 Sets the maximum width, in characters, of the source line that is 1276 displayed alongside the hex dump. The default value for this 1277 parameter is 100. The source line is displayed on the right hand 1278 side of the listing output. 1279 1280 `--listing-cont-lines=`number'' 1281 Sets the maximum number of continuation lines of hex dump that 1282 will be displayed for a given single line of source input. The 1283 default value is 4. 1284 1285 1286 File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking 1287 1288 2.9 Assemble in MRI Compatibility Mode: `-M' 1289 ============================================ 1290 1291 The `-M' or `--mri' option selects MRI compatibility mode. This 1292 changes the syntax and pseudo-op handling of `as' to make it compatible 1293 with the `ASM68K' or the `ASM960' (depending upon the configured 1294 target) assembler from Microtec Research. The exact nature of the MRI 1295 syntax will not be documented here; see the MRI manuals for more 1296 information. Note in particular that the handling of macros and macro 1297 arguments is somewhat different. The purpose of this option is to 1298 permit assembling existing MRI assembler code using `as'. 1299 1300 The MRI compatibility is not complete. Certain operations of the 1301 MRI assembler depend upon its object file format, and can not be 1302 supported using other object file formats. Supporting these would 1303 require enhancing each object file format individually. These are: 1304 1305 * global symbols in common section 1306 1307 The m68k MRI assembler supports common sections which are merged 1308 by the linker. Other object file formats do not support this. 1309 `as' handles common sections by treating them as a single common 1310 symbol. It permits local symbols to be defined within a common 1311 section, but it can not support global symbols, since it has no 1312 way to describe them. 1313 1314 * complex relocations 1315 1316 The MRI assemblers support relocations against a negated section 1317 address, and relocations which combine the start addresses of two 1318 or more sections. These are not support by other object file 1319 formats. 1320 1321 * `END' pseudo-op specifying start address 1322 1323 The MRI `END' pseudo-op permits the specification of a start 1324 address. This is not supported by other object file formats. The 1325 start address may instead be specified using the `-e' option to 1326 the linker, or in a linker script. 1327 1328 * `IDNT', `.ident' and `NAME' pseudo-ops 1329 1330 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module 1331 name to the output file. This is not supported by other object 1332 file formats. 1333 1334 * `ORG' pseudo-op 1335 1336 The m68k MRI `ORG' pseudo-op begins an absolute section at a given 1337 address. This differs from the usual `as' `.org' pseudo-op, which 1338 changes the location within the current section. Absolute 1339 sections are not supported by other object file formats. The 1340 address of a section may be assigned within a linker script. 1341 1342 There are some other features of the MRI assembler which are not 1343 supported by `as', typically either because they are difficult or 1344 because they seem of little consequence. Some of these may be 1345 supported in future releases. 1346 1347 * EBCDIC strings 1348 1349 EBCDIC strings are not supported. 1350 1351 * packed binary coded decimal 1352 1353 Packed binary coded decimal is not supported. This means that the 1354 `DC.P' and `DCB.P' pseudo-ops are not supported. 1355 1356 * `FEQU' pseudo-op 1357 1358 The m68k `FEQU' pseudo-op is not supported. 1359 1360 * `NOOBJ' pseudo-op 1361 1362 The m68k `NOOBJ' pseudo-op is not supported. 1363 1364 * `OPT' branch control options 1365 1366 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL', 1367 and `BRW'--are ignored. `as' automatically relaxes all branches, 1368 whether forward or backward, to an appropriate size, so these 1369 options serve no purpose. 1370 1371 * `OPT' list control options 1372 1373 The following m68k `OPT' list control options are ignored: `C', 1374 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'. 1375 1376 * other `OPT' options 1377 1378 The following m68k `OPT' options are ignored: `NEST', `O', `OLD', 1379 `OP', `P', `PCO', `PCR', `PCS', `R'. 1380 1381 * `OPT' `D' option is default 1382 1383 The m68k `OPT' `D' option is the default, unlike the MRI assembler. 1384 `OPT NOD' may be used to turn it off. 1385 1386 * `XREF' pseudo-op. 1387 1388 The m68k `XREF' pseudo-op is ignored. 1389 1390 * `.debug' pseudo-op 1391 1392 The i960 `.debug' pseudo-op is not supported. 1393 1394 * `.extended' pseudo-op 1395 1396 The i960 `.extended' pseudo-op is not supported. 1397 1398 * `.list' pseudo-op. 1399 1400 The various options of the i960 `.list' pseudo-op are not 1401 supported. 1402 1403 * `.optimize' pseudo-op 1404 1405 The i960 `.optimize' pseudo-op is not supported. 1406 1407 * `.output' pseudo-op 1408 1409 The i960 `.output' pseudo-op is not supported. 1410 1411 * `.setreal' pseudo-op 1412 1413 The i960 `.setreal' pseudo-op is not supported. 1414 1415 1416 1417 File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking 1418 1419 2.10 Dependency Tracking: `--MD' 1420 ================================ 1421 1422 `as' can generate a dependency file for the file it creates. This file 1423 consists of a single rule suitable for `make' describing the 1424 dependencies of the main source file. 1425 1426 The rule is written to the file named in its argument. 1427 1428 This feature is used in the automatic updating of makefiles. 1429 1430 1431 File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking 1432 1433 2.11 Name the Object File: `-o' 1434 =============================== 1435 1436 There is always one object file output when you run `as'. By default 1437 it has the name `a.out' (or `b.out', for Intel 960 targets only). You 1438 use this option (which takes exactly one filename) to give the object 1439 file a different name. 1440 1441 Whatever the object file is called, `as' overwrites any existing 1442 file of the same name. 1443 1444 1445 File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking 1446 1447 2.12 Join Data and Text Sections: `-R' 1448 ====================================== 1449 1450 `-R' tells `as' to write the object file as if all data-section data 1451 lives in the text section. This is only done at the very last moment: 1452 your binary data are the same, but data section parts are relocated 1453 differently. The data section part of your object file is zero bytes 1454 long because all its bytes are appended to the text section. (*Note 1455 Sections and Relocation: Sections.) 1456 1457 When you specify `-R' it would be possible to generate shorter 1458 address displacements (because we do not have to cross between text and 1459 data section). We refrain from doing this simply for compatibility with 1460 older versions of `as'. In future, `-R' may work this way. 1461 1462 When `as' is configured for COFF or ELF output, this option is only 1463 useful if you use sections named `.text' and `.data'. 1464 1465 `-R' is not supported for any of the HPPA targets. Using `-R' 1466 generates a warning from `as'. 1467 1468 1469 File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking 1470 1471 2.13 Display Assembly Statistics: `--statistics' 1472 ================================================ 1473 1474 Use `--statistics' to display two statistics about the resources used by 1475 `as': the maximum amount of space allocated during the assembly (in 1476 bytes), and the total execution time taken for the assembly (in CPU 1477 seconds). 1478 1479 1480 File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking 1481 1482 2.14 Compatible Output: `--traditional-format' 1483 ============================================== 1484 1485 For some targets, the output of `as' is different in some ways from the 1486 output of some existing assembler. This switch requests `as' to use 1487 the traditional format instead. 1488 1489 For example, it disables the exception frame optimizations which 1490 `as' normally does by default on `gcc' output. 1491 1492 1493 File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking 1494 1495 2.15 Announce Version: `-v' 1496 =========================== 1497 1498 You can find out what version of as is running by including the option 1499 `-v' (which you can also spell as `-version') on the command line. 1500 1501 1502 File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking 1503 1504 2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings' 1505 ====================================================================== 1506 1507 `as' should never give a warning or error message when assembling 1508 compiler output. But programs written by people often cause `as' to 1509 give a warning that a particular assumption was made. All such 1510 warnings are directed to the standard error file. 1511 1512 If you use the `-W' and `--no-warn' options, no warnings are issued. 1513 This only affects the warning messages: it does not change any 1514 particular of how `as' assembles your file. Errors, which stop the 1515 assembly, are still reported. 1516 1517 If you use the `--fatal-warnings' option, `as' considers files that 1518 generate warnings to be in error. 1519 1520 You can switch these options off again by specifying `--warn', which 1521 causes warnings to be output as usual. 1522 1523 1524 File: as.info, Node: Z, Prev: W, Up: Invoking 1525 1526 2.17 Generate Object File in Spite of Errors: `-Z' 1527 ================================================== 1528 1529 After an error message, `as' normally produces no output. If for some 1530 reason you are interested in object file output even after `as' gives 1531 an error message on your program, use the `-Z' option. If there are 1532 any errors, `as' continues anyways, and writes an object file after a 1533 final warning message of the form `N errors, M warnings, generating bad 1534 object file.' 1535 1536 1537 File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top 1538 1539 3 Syntax 1540 ******** 1541 1542 This chapter describes the machine-independent syntax allowed in a 1543 source file. `as' syntax is similar to what many other assemblers use; 1544 it is inspired by the BSD 4.2 assembler, except that `as' does not 1545 assemble Vax bit-fields. 1546 1547 * Menu: 1548 1549 * Preprocessing:: Preprocessing 1550 * Whitespace:: Whitespace 1551 * Comments:: Comments 1552 * Symbol Intro:: Symbols 1553 * Statements:: Statements 1554 * Constants:: Constants 1555 1556 1557 File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax 1558 1559 3.1 Preprocessing 1560 ================= 1561 1562 The `as' internal preprocessor: 1563 * adjusts and removes extra whitespace. It leaves one space or tab 1564 before the keywords on a line, and turns any other whitespace on 1565 the line into a single space. 1566 1567 * removes all comments, replacing them with a single space, or an 1568 appropriate number of newlines. 1569 1570 * converts character constants into the appropriate numeric values. 1571 1572 It does not do macro processing, include file handling, or anything 1573 else you may get from your C compiler's preprocessor. You can do 1574 include file processing with the `.include' directive (*note 1575 `.include': Include.). You can use the GNU C compiler driver to get 1576 other "CPP" style preprocessing by giving the input file a `.S' suffix. 1577 *Note Options Controlling the Kind of Output: (gcc.info)Overall 1578 Options. 1579 1580 Excess whitespace, comments, and character constants cannot be used 1581 in the portions of the input text that are not preprocessed. 1582 1583 If the first line of an input file is `#NO_APP' or if you use the 1584 `-f' option, whitespace and comments are not removed from the input 1585 file. Within an input file, you can ask for whitespace and comment 1586 removal in specific portions of the by putting a line that says `#APP' 1587 before the text that may contain whitespace or comments, and putting a 1588 line that says `#NO_APP' after this text. This feature is mainly 1589 intend to support `asm' statements in compilers whose output is 1590 otherwise free of comments and whitespace. 1591 1592 1593 File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax 1594 1595 3.2 Whitespace 1596 ============== 1597 1598 "Whitespace" is one or more blanks or tabs, in any order. Whitespace 1599 is used to separate symbols, and to make programs neater for people to 1600 read. Unless within character constants (*note Character Constants: 1601 Characters.), any whitespace means the same as exactly one space. 1602 1603 1604 File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax 1605 1606 3.3 Comments 1607 ============ 1608 1609 There are two ways of rendering comments to `as'. In both cases the 1610 comment is equivalent to one space. 1611 1612 Anything from `/*' through the next `*/' is a comment. This means 1613 you may not nest these comments. 1614 1615 /* 1616 The only way to include a newline ('\n') in a comment 1617 is to use this sort of comment. 1618 */ 1619 1620 /* This sort of comment does not nest. */ 1621 1622 Anything from the "line comment" character to the next newline is 1623 considered a comment and is ignored. The line comment character is `;' 1624 on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA; 1625 `#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' 1626 for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; 1627 `!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r; 1628 `|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for 1629 the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; 1630 see *Note Machine Dependencies::. 1631 1632 On some machines there are two different line comment characters. 1633 One character only begins a comment if it is the first non-whitespace 1634 character on a line, while the other always begins a comment. 1635 1636 The V850 assembler also supports a double dash as starting a comment 1637 that extends to the end of the line. 1638 1639 `--'; 1640 1641 To be compatible with past assemblers, lines that begin with `#' 1642 have a special interpretation. Following the `#' should be an absolute 1643 expression (*note Expressions::): the logical line number of the _next_ 1644 line. Then a string (*note Strings: Strings.) is allowed: if present 1645 it is a new logical file name. The rest of the line, if any, should be 1646 whitespace. 1647 1648 If the first non-whitespace characters on the line are not numeric, 1649 the line is ignored. (Just like a comment.) 1650 1651 # This is an ordinary comment. 1652 # 42-6 "new_file_name" # New logical file name 1653 # This is logical line # 36. 1654 This feature is deprecated, and may disappear from future versions 1655 of `as'. 1656 1657 1658 File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax 1659 1660 3.4 Symbols 1661 =========== 1662 1663 A "symbol" is one or more characters chosen from the set of all letters 1664 (both upper and lower case), digits and the three characters `_.$'. On 1665 most machines, you can also use `$' in symbol names; exceptions are 1666 noted in *Note Machine Dependencies::. No symbol may begin with a 1667 digit. Case is significant. There is no length limit: all characters 1668 are significant. Symbols are delimited by characters not in that set, 1669 or by the beginning of a file (since the source program must end with a 1670 newline, the end of a file is not a possible symbol delimiter). *Note 1671 Symbols::. 1672 1673 1674 File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax 1675 1676 3.5 Statements 1677 ============== 1678 1679 A "statement" ends at a newline character (`\n') or line separator 1680 character. (The line separator is usually `;', unless this conflicts 1681 with the comment character; *note Machine Dependencies::.) The newline 1682 or separator character is considered part of the preceding statement. 1683 Newlines and separators within character constants are an exception: 1684 they do not end statements. 1685 1686 It is an error to end any statement with end-of-file: the last 1687 character of any input file should be a newline. 1688 1689 An empty statement is allowed, and may include whitespace. It is 1690 ignored. 1691 1692 A statement begins with zero or more labels, optionally followed by a 1693 key symbol which determines what kind of statement it is. The key 1694 symbol determines the syntax of the rest of the statement. If the 1695 symbol begins with a dot `.' then the statement is an assembler 1696 directive: typically valid for any computer. If the symbol begins with 1697 a letter the statement is an assembly language "instruction": it 1698 assembles into a machine language instruction. Different versions of 1699 `as' for different computers recognize different instructions. In 1700 fact, the same symbol may represent a different instruction in a 1701 different computer's assembly language. 1702 1703 A label is a symbol immediately followed by a colon (`:'). 1704 Whitespace before a label or after a colon is permitted, but you may not 1705 have whitespace between a label's symbol and its colon. *Note Labels::. 1706 1707 For HPPA targets, labels need not be immediately followed by a 1708 colon, but the definition of a label must begin in column zero. This 1709 also implies that only one label may be defined on each line. 1710 1711 label: .directive followed by something 1712 another_label: # This is an empty statement. 1713 instruction operand_1, operand_2, ... 1714 1715 1716 File: as.info, Node: Constants, Prev: Statements, Up: Syntax 1717 1718 3.6 Constants 1719 ============= 1720 1721 A constant is a number, written so that its value is known by 1722 inspection, without knowing any context. Like this: 1723 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value. 1724 .ascii "Ring the bell\7" # A string constant. 1725 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum. 1726 .float 0f-314159265358979323846264338327\ 1727 95028841971.693993751E-40 # - pi, a flonum. 1728 1729 * Menu: 1730 1731 * Characters:: Character Constants 1732 * Numbers:: Number Constants 1733 1734 1735 File: as.info, Node: Characters, Next: Numbers, Up: Constants 1736 1737 3.6.1 Character Constants 1738 ------------------------- 1739 1740 There are two kinds of character constants. A "character" stands for 1741 one character in one byte and its value may be used in numeric 1742 expressions. String constants (properly called string _literals_) are 1743 potentially many bytes and their values may not be used in arithmetic 1744 expressions. 1745 1746 * Menu: 1747 1748 * Strings:: Strings 1749 * Chars:: Characters 1750 1751 1752 File: as.info, Node: Strings, Next: Chars, Up: Characters 1753 1754 3.6.1.1 Strings 1755 ............... 1756 1757 A "string" is written between double-quotes. It may contain 1758 double-quotes or null characters. The way to get special characters 1759 into a string is to "escape" these characters: precede them with a 1760 backslash `\' character. For example `\\' represents one backslash: 1761 the first `\' is an escape which tells `as' to interpret the second 1762 character literally as a backslash (which prevents `as' from 1763 recognizing the second `\' as an escape character). The complete list 1764 of escapes follows. 1765 1766 `\b' 1767 Mnemonic for backspace; for ASCII this is octal code 010. 1768 1769 `\f' 1770 Mnemonic for FormFeed; for ASCII this is octal code 014. 1771 1772 `\n' 1773 Mnemonic for newline; for ASCII this is octal code 012. 1774 1775 `\r' 1776 Mnemonic for carriage-Return; for ASCII this is octal code 015. 1777 1778 `\t' 1779 Mnemonic for horizontal Tab; for ASCII this is octal code 011. 1780 1781 `\ DIGIT DIGIT DIGIT' 1782 An octal character code. The numeric code is 3 octal digits. For 1783 compatibility with other Unix systems, 8 and 9 are accepted as 1784 digits: for example, `\008' has the value 010, and `\009' the 1785 value 011. 1786 1787 `\`x' HEX-DIGITS...' 1788 A hex character code. All trailing hex digits are combined. 1789 Either upper or lower case `x' works. 1790 1791 `\\' 1792 Represents one `\' character. 1793 1794 `\"' 1795 Represents one `"' character. Needed in strings to represent this 1796 character, because an unescaped `"' would end the string. 1797 1798 `\ ANYTHING-ELSE' 1799 Any other character when escaped by `\' gives a warning, but 1800 assembles as if the `\' was not present. The idea is that if you 1801 used an escape sequence you clearly didn't want the literal 1802 interpretation of the following character. However `as' has no 1803 other interpretation, so `as' knows it is giving you the wrong 1804 code and warns you of the fact. 1805 1806 Which characters are escapable, and what those escapes represent, 1807 varies widely among assemblers. The current set is what we think the 1808 BSD 4.2 assembler recognizes, and is a subset of what most C compilers 1809 recognize. If you are in doubt, do not use an escape sequence. 1810 1811 1812 File: as.info, Node: Chars, Prev: Strings, Up: Characters 1813 1814 3.6.1.2 Characters 1815 .................. 1816 1817 A single character may be written as a single quote immediately 1818 followed by that character. The same escapes apply to characters as to 1819 strings. So if you want to write the character backslash, you must 1820 write `'\\' where the first `\' escapes the second `\'. As you can 1821 see, the quote is an acute accent, not a grave accent. A newline 1822 immediately following an acute accent is taken as a literal character 1823 and does not count as the end of a statement. The value of a character 1824 constant in a numeric expression is the machine's byte-wide code for 1825 that character. `as' assumes your character code is ASCII: `'A' means 1826 65, `'B' means 66, and so on. 1827 1828 1829 File: as.info, Node: Numbers, Prev: Characters, Up: Constants 1830 1831 3.6.2 Number Constants 1832 ---------------------- 1833 1834 `as' distinguishes three kinds of numbers according to how they are 1835 stored in the target machine. _Integers_ are numbers that would fit 1836 into an `int' in the C language. _Bignums_ are integers, but they are 1837 stored in more than 32 bits. _Flonums_ are floating point numbers, 1838 described below. 1839 1840 * Menu: 1841 1842 * Integers:: Integers 1843 * Bignums:: Bignums 1844 * Flonums:: Flonums 1845 1846 1847 File: as.info, Node: Integers, Next: Bignums, Up: Numbers 1848 1849 3.6.2.1 Integers 1850 ................ 1851 1852 A binary integer is `0b' or `0B' followed by zero or more of the binary 1853 digits `01'. 1854 1855 An octal integer is `0' followed by zero or more of the octal digits 1856 (`01234567'). 1857 1858 A decimal integer starts with a non-zero digit followed by zero or 1859 more digits (`0123456789'). 1860 1861 A hexadecimal integer is `0x' or `0X' followed by one or more 1862 hexadecimal digits chosen from `0123456789abcdefABCDEF'. 1863 1864 Integers have the usual values. To denote a negative integer, use 1865 the prefix operator `-' discussed under expressions (*note Prefix 1866 Operators: Prefix Ops.). 1867 1868 1869 File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers 1870 1871 3.6.2.2 Bignums 1872 ............... 1873 1874 A "bignum" has the same syntax and semantics as an integer except that 1875 the number (or its negative) takes more than 32 bits to represent in 1876 binary. The distinction is made because in some places integers are 1877 permitted while bignums are not. 1878 1879 1880 File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers 1881 1882 3.6.2.3 Flonums 1883 ............... 1884 1885 A "flonum" represents a floating point number. The translation is 1886 indirect: a decimal floating point number from the text is converted by 1887 `as' to a generic binary floating point number of more than sufficient 1888 precision. This generic floating point number is converted to a 1889 particular computer's floating point format (or formats) by a portion 1890 of `as' specialized to that computer. 1891 1892 A flonum is written by writing (in order) 1893 * The digit `0'. (`0' is optional on the HPPA.) 1894 1895 * A letter, to tell `as' the rest of the number is a flonum. `e' is 1896 recommended. Case is not important. 1897 1898 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the 1899 letter must be one of the letters `DFPRSX' (in upper or lower 1900 case). 1901 1902 On the ARC, the letter must be one of the letters `DFRS' (in upper 1903 or lower case). 1904 1905 On the Intel 960 architecture, the letter must be one of the 1906 letters `DFT' (in upper or lower case). 1907 1908 On the HPPA architecture, the letter must be `E' (upper case only). 1909 1910 * An optional sign: either `+' or `-'. 1911 1912 * An optional "integer part": zero or more decimal digits. 1913 1914 * An optional "fractional part": `.' followed by zero or more 1915 decimal digits. 1916 1917 * An optional exponent, consisting of: 1918 1919 * An `E' or `e'. 1920 1921 * Optional sign: either `+' or `-'. 1922 1923 * One or more decimal digits. 1924 1925 1926 At least one of the integer part or the fractional part must be 1927 present. The floating point number has the usual base-10 value. 1928 1929 `as' does all processing using integers. Flonums are computed 1930 independently of any floating point hardware in the computer running 1931 `as'. 1932 1933 1934 File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top 1935 1936 4 Sections and Relocation 1937 ************************* 1938 1939 * Menu: 1940 1941 * Secs Background:: Background 1942 * Ld Sections:: Linker Sections 1943 * As Sections:: Assembler Internal Sections 1944 * Sub-Sections:: Sub-Sections 1945 * bss:: bss Section 1946 1947 1948 File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections 1949 1950 4.1 Background 1951 ============== 1952 1953 Roughly, a section is a range of addresses, with no gaps; all data "in" 1954 those addresses is treated the same for some particular purpose. For 1955 example there may be a "read only" section. 1956 1957 The linker `ld' reads many object files (partial programs) and 1958 combines their contents to form a runnable program. When `as' emits an 1959 object file, the partial program is assumed to start at address 0. 1960 `ld' assigns the final addresses for the partial program, so that 1961 different partial programs do not overlap. This is actually an 1962 oversimplification, but it suffices to explain how `as' uses sections. 1963 1964 `ld' moves blocks of bytes of your program to their run-time 1965 addresses. These blocks slide to their run-time addresses as rigid 1966 units; their length does not change and neither does the order of bytes 1967 within them. Such a rigid unit is called a _section_. Assigning 1968 run-time addresses to sections is called "relocation". It includes the 1969 task of adjusting mentions of object-file addresses so they refer to 1970 the proper run-time addresses. For the H8/300, and for the Renesas / 1971 SuperH SH, `as' pads sections if needed to ensure they end on a word 1972 (sixteen bit) boundary. 1973 1974 An object file written by `as' has at least three sections, any of 1975 which may be empty. These are named "text", "data" and "bss" sections. 1976 1977 When it generates COFF or ELF output, `as' can also generate 1978 whatever other named sections you specify using the `.section' 1979 directive (*note `.section': Section.). If you do not use any 1980 directives that place output in the `.text' or `.data' sections, these 1981 sections still exist, but are empty. 1982 1983 When `as' generates SOM or ELF output for the HPPA, `as' can also 1984 generate whatever other named sections you specify using the `.space' 1985 and `.subspace' directives. See `HP9000 Series 800 Assembly Language 1986 Reference Manual' (HP 92432-90001) for details on the `.space' and 1987 `.subspace' assembler directives. 1988 1989 Additionally, `as' uses different names for the standard text, data, 1990 and bss sections when generating SOM output. Program text is placed 1991 into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'. 1992 1993 Within the object file, the text section starts at address `0', the 1994 data section follows, and the bss section follows the data section. 1995 1996 When generating either SOM or ELF output files on the HPPA, the text 1997 section starts at address `0', the data section at address `0x4000000', 1998 and the bss section follows the data section. 1999 2000 To let `ld' know which data changes when the sections are relocated, 2001 and how to change that data, `as' also writes to the object file 2002 details of the relocation needed. To perform relocation `ld' must 2003 know, each time an address in the object file is mentioned: 2004 * Where in the object file is the beginning of this reference to an 2005 address? 2006 2007 * How long (in bytes) is this reference? 2008 2009 * Which section does the address refer to? What is the numeric 2010 value of 2011 (ADDRESS) - (START-ADDRESS OF SECTION)? 2012 2013 * Is the reference to an address "Program-Counter relative"? 2014 2015 In fact, every address `as' ever uses is expressed as 2016 (SECTION) + (OFFSET INTO SECTION) 2017 Further, most expressions `as' computes have this section-relative 2018 nature. (For some object formats, such as SOM for the HPPA, some 2019 expressions are symbol-relative instead.) 2020 2021 In this manual we use the notation {SECNAME N} to mean "offset N 2022 into section SECNAME." 2023 2024 Apart from text, data and bss sections you need to know about the 2025 "absolute" section. When `ld' mixes partial programs, addresses in the 2026 absolute section remain unchanged. For example, address `{absolute 0}' 2027 is "relocated" to run-time address 0 by `ld'. Although the linker 2028 never arranges two partial programs' data sections with overlapping 2029 addresses after linking, _by definition_ their absolute sections must 2030 overlap. Address `{absolute 239}' in one part of a program is always 2031 the same address when the program is running as address `{absolute 2032 239}' in any other part of the program. 2033 2034 The idea of sections is extended to the "undefined" section. Any 2035 address whose section is unknown at assembly time is by definition 2036 rendered {undefined U}--where U is filled in later. Since numbers are 2037 always defined, the only way to generate an undefined address is to 2038 mention an undefined symbol. A reference to a named common block would 2039 be such a symbol: its value is unknown at assembly time so it has 2040 section _undefined_. 2041 2042 By analogy the word _section_ is used to describe groups of sections 2043 in the linked program. `ld' puts all partial programs' text sections 2044 in contiguous addresses in the linked program. It is customary to 2045 refer to the _text section_ of a program, meaning all the addresses of 2046 all partial programs' text sections. Likewise for data and bss 2047 sections. 2048 2049 Some sections are manipulated by `ld'; others are invented for use 2050 of `as' and have no meaning except during assembly. 2051 2052 2053 File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections 2054 2055 4.2 Linker Sections 2056 =================== 2057 2058 `ld' deals with just four kinds of sections, summarized below. 2059 2060 *named sections* 2061 *text section* 2062 *data section* 2063 These sections hold your program. `as' and `ld' treat them as 2064 separate but equal sections. Anything you can say of one section 2065 is true of another. When the program is running, however, it is 2066 customary for the text section to be unalterable. The text 2067 section is often shared among processes: it contains instructions, 2068 constants and the like. The data section of a running program is 2069 usually alterable: for example, C variables would be stored in the 2070 data section. 2071 2072 *bss section* 2073 This section contains zeroed bytes when your program begins 2074 running. It is used to hold uninitialized variables or common 2075 storage. The length of each partial program's bss section is 2076 important, but because it starts out containing zeroed bytes there 2077 is no need to store explicit zero bytes in the object file. The 2078 bss section was invented to eliminate those explicit zeros from 2079 object files. 2080 2081 *absolute section* 2082 Address 0 of this section is always "relocated" to runtime address 2083 0. This is useful if you want to refer to an address that `ld' 2084 must not change when relocating. In this sense we speak of 2085 absolute addresses being "unrelocatable": they do not change 2086 during relocation. 2087 2088 *undefined section* 2089 This "section" is a catch-all for address references to objects 2090 not in the preceding sections. 2091 2092 An idealized example of three relocatable sections follows. The 2093 example uses the traditional section names `.text' and `.data'. Memory 2094 addresses are on the horizontal axis. 2095 2096 +-----+----+--+ 2097 partial program # 1: |ttttt|dddd|00| 2098 +-----+----+--+ 2099 2100 text data bss 2101 seg. seg. seg. 2102 2103 +---+---+---+ 2104 partial program # 2: |TTT|DDD|000| 2105 +---+---+---+ 2106 2107 +--+---+-----+--+----+---+-----+~~ 2108 linked program: | |TTT|ttttt| |dddd|DDD|00000| 2109 +--+---+-----+--+----+---+-----+~~ 2110 2111 addresses: 0 ... 2112 2113 2114 File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections 2115 2116 4.3 Assembler Internal Sections 2117 =============================== 2118 2119 These sections are meant only for the internal use of `as'. They have 2120 no meaning at run-time. You do not really need to know about these 2121 sections for most purposes; but they can be mentioned in `as' warning 2122 messages, so it might be helpful to have an idea of their meanings to 2123 `as'. These sections are used to permit the value of every expression 2124 in your assembly language program to be a section-relative address. 2125 2126 ASSEMBLER-INTERNAL-LOGIC-ERROR! 2127 An internal assembler logic error has been found. This means 2128 there is a bug in the assembler. 2129 2130 expr section 2131 The assembler stores complex expression internally as combinations 2132 of symbols. When it needs to represent an expression as a symbol, 2133 it puts it in the expr section. 2134 2135 2136 File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections 2137 2138 4.4 Sub-Sections 2139 ================ 2140 2141 Assembled bytes conventionally fall into two sections: text and data. 2142 You may have separate groups of data in named sections that you want to 2143 end up near to each other in the object file, even though they are not 2144 contiguous in the assembler source. `as' allows you to use 2145 "subsections" for this purpose. Within each section, there can be 2146 numbered subsections with values from 0 to 8192. Objects assembled 2147 into the same subsection go into the object file together with other 2148 objects in the same subsection. For example, a compiler might want to 2149 store constants in the text section, but might not want to have them 2150 interspersed with the program being assembled. In this case, the 2151 compiler could issue a `.text 0' before each section of code being 2152 output, and a `.text 1' before each group of constants being output. 2153 2154 Subsections are optional. If you do not use subsections, everything 2155 goes in subsection number zero. 2156 2157 Each subsection is zero-padded up to a multiple of four bytes. 2158 (Subsections may be padded a different amount on different flavors of 2159 `as'.) 2160 2161 Subsections appear in your object file in numeric order, lowest 2162 numbered to highest. (All this to be compatible with other people's 2163 assemblers.) The object file contains no representation of 2164 subsections; `ld' and other programs that manipulate object files see 2165 no trace of them. They just see all your text subsections as a text 2166 section, and all your data subsections as a data section. 2167 2168 To specify which subsection you want subsequent statements assembled 2169 into, use a numeric argument to specify it, in a `.text EXPRESSION' or 2170 a `.data EXPRESSION' statement. When generating COFF output, you can 2171 also use an extra subsection argument with arbitrary named sections: 2172 `.section NAME, EXPRESSION'. When generating ELF output, you can also 2173 use the `.subsection' directive (*note SubSection::) to specify a 2174 subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute 2175 expression. (*Note Expressions::.) If you just say `.text' then 2176 `.text 0' is assumed. Likewise `.data' means `.data 0'. Assembly 2177 begins in `text 0'. For instance: 2178 .text 0 # The default subsection is text 0 anyway. 2179 .ascii "This lives in the first text subsection. *" 2180 .text 1 2181 .ascii "But this lives in the second text subsection." 2182 .data 0 2183 .ascii "This lives in the data section," 2184 .ascii "in the first data subsection." 2185 .text 0 2186 .ascii "This lives in the first text section," 2187 .ascii "immediately following the asterisk (*)." 2188 2189 Each section has a "location counter" incremented by one for every 2190 byte assembled into that section. Because subsections are merely a 2191 convenience restricted to `as' there is no concept of a subsection 2192 location counter. There is no way to directly manipulate a location 2193 counter--but the `.align' directive changes it, and any label 2194 definition captures its current value. The location counter of the 2195 section where statements are being assembled is said to be the "active" 2196 location counter. 2197 2198 2199 File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections 2200 2201 4.5 bss Section 2202 =============== 2203 2204 The bss section is used for local common variable storage. You may 2205 allocate address space in the bss section, but you may not dictate data 2206 to load into it before your program executes. When your program starts 2207 running, all the contents of the bss section are zeroed bytes. 2208 2209 The `.lcomm' pseudo-op defines a symbol in the bss section; see 2210 *Note `.lcomm': Lcomm. 2211 2212 The `.comm' pseudo-op may be used to declare a common symbol, which 2213 is another form of uninitialized symbol; see *Note `.comm': Comm. 2214 2215 When assembling for a target which supports multiple sections, such 2216 as ELF or COFF, you may switch into the `.bss' section and define 2217 symbols as usual; see *Note `.section': Section. You may only assemble 2218 zero values into the section. Typically the section will only contain 2219 symbol definitions and `.skip' directives (*note `.skip': Skip.). 2220 2221 2222 File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top 2223 2224 5 Symbols 2225 ********* 2226 2227 Symbols are a central concept: the programmer uses symbols to name 2228 things, the linker uses symbols to link, and the debugger uses symbols 2229 to debug. 2230 2231 _Warning:_ `as' does not place symbols in the object file in the 2232 same order they were declared. This may break some debuggers. 2233 2234 * Menu: 2235 2236 * Labels:: Labels 2237 * Setting Symbols:: Giving Symbols Other Values 2238 * Symbol Names:: Symbol Names 2239 * Dot:: The Special Dot Symbol 2240 * Symbol Attributes:: Symbol Attributes 2241 2242 2243 File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols 2244 2245 5.1 Labels 2246 ========== 2247 2248 A "label" is written as a symbol immediately followed by a colon `:'. 2249 The symbol then represents the current value of the active location 2250 counter, and is, for example, a suitable instruction operand. You are 2251 warned if you use the same symbol to represent two different locations: 2252 the first definition overrides any other definitions. 2253 2254 On the HPPA, the usual form for a label need not be immediately 2255 followed by a colon, but instead must start in column zero. Only one 2256 label may be defined on a single line. To work around this, the HPPA 2257 version of `as' also provides a special directive `.label' for defining 2258 labels more flexibly. 2259 2260 2261 File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols 2262 2263 5.2 Giving Symbols Other Values 2264 =============================== 2265 2266 A symbol can be given an arbitrary value by writing a symbol, followed 2267 by an equals sign `=', followed by an expression (*note Expressions::). 2268 This is equivalent to using the `.set' directive. *Note `.set': Set. 2269 In the same way, using a double equals sign `='`=' here represents an 2270 equivalent of the `.eqv' directive. *Note `.eqv': Eqv. 2271 2272 2273 File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols 2274 2275 5.3 Symbol Names 2276 ================ 2277 2278 Symbol names begin with a letter or with one of `._'. On most 2279 machines, you can also use `$' in symbol names; exceptions are noted in 2280 *Note Machine Dependencies::. That character may be followed by any 2281 string of digits, letters, dollar signs (unless otherwise noted in 2282 *Note Machine Dependencies::), and underscores. 2283 2284 Case of letters is significant: `foo' is a different symbol name than 2285 `Foo'. 2286 2287 Each symbol has exactly one name. Each name in an assembly language 2288 program refers to exactly one symbol. You may use that symbol name any 2289 number of times in a program. 2290 2291 Local Symbol Names 2292 ------------------ 2293 2294 Local symbols help compilers and programmers use names temporarily. 2295 They create symbols which are guaranteed to be unique over the entire 2296 scope of the input source code and which can be referred to by a simple 2297 notation. To define a local symbol, write a label of the form `N:' 2298 (where N represents any positive integer). To refer to the most recent 2299 previous definition of that symbol write `Nb', using the same number as 2300 when you defined the label. To refer to the next definition of a local 2301 label, write `Nf'-- The `b' stands for"backwards" and the `f' stands 2302 for "forwards". 2303 2304 There is no restriction on how you can use these labels, and you can 2305 reuse them too. So that it is possible to repeatedly define the same 2306 local label (using the same number `N'), although you can only refer to 2307 the most recently defined local label of that number (for a backwards 2308 reference) or the next definition of a specific local label for a 2309 forward reference. It is also worth noting that the first 10 local 2310 labels (`0:'...`9:') are implemented in a slightly more efficient 2311 manner than the others. 2312 2313 Here is an example: 2314 2315 1: branch 1f 2316 2: branch 1b 2317 1: branch 2f 2318 2: branch 1b 2319 2320 Which is the equivalent of: 2321 2322 label_1: branch label_3 2323 label_2: branch label_1 2324 label_3: branch label_4 2325 label_4: branch label_3 2326 2327 Local symbol names are only a notational device. They are 2328 immediately transformed into more conventional symbol names before the 2329 assembler uses them. The symbol names stored in the symbol table, 2330 appearing in error messages and optionally emitted to the object file. 2331 The names are constructed using these parts: 2332 2333 `L' 2334 All local labels begin with `L'. Normally both `as' and `ld' 2335 forget symbols that start with `L'. These labels are used for 2336 symbols you are never intended to see. If you use the `-L' option 2337 then `as' retains these symbols in the object file. If you also 2338 instruct `ld' to retain these symbols, you may use them in 2339 debugging. 2340 2341 `NUMBER' 2342 This is the number that was used in the local label definition. 2343 So if the label is written `55:' then the number is `55'. 2344 2345 `C-B' 2346 This unusual character is included so you do not accidentally 2347 invent a symbol of the same name. The character has ASCII value 2348 of `\002' (control-B). 2349 2350 `_ordinal number_' 2351 This is a serial number to keep the labels distinct. The first 2352 definition of `0:' gets the number `1'. The 15th definition of 2353 `0:' gets the number `15', and so on. Likewise the first 2354 definition of `1:' gets the number `1' and its 15th defintion gets 2355 `15' as well. 2356 2357 So for example, the first `1:' is named `L1C-B1', the 44th `3:' is 2358 named `L3C-B44'. 2359 2360 Dollar Local Labels 2361 ------------------- 2362 2363 `as' also supports an even more local form of local labels called 2364 dollar labels. These labels go out of scope (ie they become undefined) 2365 as soon as a non-local label is defined. Thus they remain valid for 2366 only a small region of the input source code. Normal local labels, by 2367 contrast, remain in scope for the entire file, or until they are 2368 redefined by another occurrence of the same local label. 2369 2370 Dollar labels are defined in exactly the same way as ordinary local 2371 labels, except that instead of being terminated by a colon, they are 2372 terminated by a dollar sign. eg `55$'. 2373 2374 They can also be distinguished from ordinary local labels by their 2375 transformed name which uses ASCII character `\001' (control-A) as the 2376 magic character to distinguish them from ordinary labels. Thus the 5th 2377 defintion of `6$' is named `L6C-A5'. 2378 2379 2380 File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols 2381 2382 5.4 The Special Dot Symbol 2383 ========================== 2384 2385 The special symbol `.' refers to the current address that `as' is 2386 assembling into. Thus, the expression `melvin: .long .' defines 2387 `melvin' to contain its own address. Assigning a value to `.' is 2388 treated the same as a `.org' directive. Thus, the expression `.=.+4' 2389 is the same as saying `.space 4'. 2390 2391 2392 File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols 2393 2394 5.5 Symbol Attributes 2395 ===================== 2396 2397 Every symbol has, as well as its name, the attributes "Value" and 2398 "Type". Depending on output format, symbols can also have auxiliary 2399 attributes. 2400 2401 If you use a symbol without defining it, `as' assumes zero for all 2402 these attributes, and probably won't warn you. This makes the symbol 2403 an externally defined symbol, which is generally what you would want. 2404 2405 * Menu: 2406 2407 * Symbol Value:: Value 2408 * Symbol Type:: Type 2409 2410 2411 * a.out Symbols:: Symbol Attributes: `a.out' 2412 2413 * COFF Symbols:: Symbol Attributes for COFF 2414 2415 * SOM Symbols:: Symbol Attributes for SOM 2416 2417 2418 File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes 2419 2420 5.5.1 Value 2421 ----------- 2422 2423 The value of a symbol is (usually) 32 bits. For a symbol which labels a 2424 location in the text, data, bss or absolute sections the value is the 2425 number of addresses from the start of that section to the label. 2426 Naturally for text, data and bss sections the value of a symbol changes 2427 as `ld' changes section base addresses during linking. Absolute 2428 symbols' values do not change during linking: that is why they are 2429 called absolute. 2430 2431 The value of an undefined symbol is treated in a special way. If it 2432 is 0 then the symbol is not defined in this assembler source file, and 2433 `ld' tries to determine its value from other files linked into the same 2434 program. You make this kind of symbol simply by mentioning a symbol 2435 name without defining it. A non-zero value represents a `.comm' common 2436 declaration. The value is how much common storage to reserve, in bytes 2437 (addresses). The symbol refers to the first address of the allocated 2438 storage. 2439 2440 2441 File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes 2442 2443 5.5.2 Type 2444 ---------- 2445 2446 The type attribute of a symbol contains relocation (section) 2447 information, any flag settings indicating that a symbol is external, and 2448 (optionally), other information for linkers and debuggers. The exact 2449 format depends on the object-code output format in use. 2450 2451 2452 File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes 2453 2454 5.5.3 Symbol Attributes: `a.out' 2455 -------------------------------- 2456 2457 * Menu: 2458 2459 * Symbol Desc:: Descriptor 2460 * Symbol Other:: Other 2461 2462 2463 File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols 2464 2465 5.5.3.1 Descriptor 2466 .................. 2467 2468 This is an arbitrary 16-bit value. You may establish a symbol's 2469 descriptor value by using a `.desc' statement (*note `.desc': Desc.). 2470 A descriptor value means nothing to `as'. 2471 2472 2473 File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols 2474 2475 5.5.3.2 Other 2476 ............. 2477 2478 This is an arbitrary 8-bit value. It means nothing to `as'. 2479 2480 2481 File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes 2482 2483 5.5.4 Symbol Attributes for COFF 2484 -------------------------------- 2485 2486 The COFF format supports a multitude of auxiliary symbol attributes; 2487 like the primary symbol attributes, they are set between `.def' and 2488 `.endef' directives. 2489 2490 5.5.4.1 Primary Attributes 2491 .......................... 2492 2493 The symbol name is set with `.def'; the value and type, respectively, 2494 with `.val' and `.type'. 2495 2496 5.5.4.2 Auxiliary Attributes 2497 ............................ 2498 2499 The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and 2500 `.weak' can generate auxiliary symbol table information for COFF. 2501 2502 2503 File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes 2504 2505 5.5.5 Symbol Attributes for SOM 2506 ------------------------------- 2507 2508 The SOM format for the HPPA supports a multitude of symbol attributes 2509 set with the `.EXPORT' and `.IMPORT' directives. 2510 2511 The attributes are described in `HP9000 Series 800 Assembly Language 2512 Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT' 2513 assembler directive documentation. 2514 2515 2516 File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top 2517 2518 6 Expressions 2519 ************* 2520 2521 An "expression" specifies an address or numeric value. Whitespace may 2522 precede and/or follow an expression. 2523 2524 The result of an expression must be an absolute number, or else an 2525 offset into a particular section. If an expression is not absolute, 2526 and there is not enough information when `as' sees the expression to 2527 know its section, a second pass over the source program might be 2528 necessary to interpret the expression--but the second pass is currently 2529 not implemented. `as' aborts with an error message in this situation. 2530 2531 * Menu: 2532 2533 * Empty Exprs:: Empty Expressions 2534 * Integer Exprs:: Integer Expressions 2535 2536 2537 File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions 2538 2539 6.1 Empty Expressions 2540 ===================== 2541 2542 An empty expression has no value: it is just whitespace or null. 2543 Wherever an absolute expression is required, you may omit the 2544 expression, and `as' assumes a value of (absolute) 0. This is 2545 compatible with other assemblers. 2546 2547 2548 File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions 2549 2550 6.2 Integer Expressions 2551 ======================= 2552 2553 An "integer expression" is one or more _arguments_ delimited by 2554 _operators_. 2555 2556 * Menu: 2557 2558 * Arguments:: Arguments 2559 * Operators:: Operators 2560 * Prefix Ops:: Prefix Operators 2561 * Infix Ops:: Infix Operators 2562 2563 2564 File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs 2565 2566 6.2.1 Arguments 2567 --------------- 2568 2569 "Arguments" are symbols, numbers or subexpressions. In other contexts 2570 arguments are sometimes called "arithmetic operands". In this manual, 2571 to avoid confusing them with the "instruction operands" of the machine 2572 language, we use the term "argument" to refer to parts of expressions 2573 only, reserving the word "operand" to refer only to machine instruction 2574 operands. 2575 2576 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of 2577 text, data, bss, absolute, or undefined. NNN is a signed, 2's 2578 complement 32 bit integer. 2579 2580 Numbers are usually integers. 2581 2582 A number can be a flonum or bignum. In this case, you are warned 2583 that only the low order 32 bits are used, and `as' pretends these 32 2584 bits are an integer. You may write integer-manipulating instructions 2585 that act on exotic constants, compatible with other assemblers. 2586 2587 Subexpressions are a left parenthesis `(' followed by an integer 2588 expression, followed by a right parenthesis `)'; or a prefix operator 2589 followed by an argument. 2590 2591 2592 File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs 2593 2594 6.2.2 Operators 2595 --------------- 2596 2597 "Operators" are arithmetic functions, like `+' or `%'. Prefix 2598 operators are followed by an argument. Infix operators appear between 2599 their arguments. Operators may be preceded and/or followed by 2600 whitespace. 2601 2602 2603 File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs 2604 2605 6.2.3 Prefix Operator 2606 --------------------- 2607 2608 `as' has the following "prefix operators". They each take one 2609 argument, which must be absolute. 2610 2611 `-' 2612 "Negation". Two's complement negation. 2613 2614 `~' 2615 "Complementation". Bitwise not. 2616 2617 2618 File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs 2619 2620 6.2.4 Infix Operators 2621 --------------------- 2622 2623 "Infix operators" take two arguments, one on either side. Operators 2624 have precedence, but operations with equal precedence are performed left 2625 to right. Apart from `+' or `-', both arguments must be absolute, and 2626 the result is absolute. 2627 2628 1. Highest Precedence 2629 2630 `*' 2631 "Multiplication". 2632 2633 `/' 2634 "Division". Truncation is the same as the C operator `/' 2635 2636 `%' 2637 "Remainder". 2638 2639 `<<' 2640 "Shift Left". Same as the C operator `<<'. 2641 2642 `>>' 2643 "Shift Right". Same as the C operator `>>'. 2644 2645 2. Intermediate precedence 2646 2647 `|' 2648 "Bitwise Inclusive Or". 2649 2650 `&' 2651 "Bitwise And". 2652 2653 `^' 2654 "Bitwise Exclusive Or". 2655 2656 `!' 2657 "Bitwise Or Not". 2658 2659 3. Low Precedence 2660 2661 `+' 2662 "Addition". If either argument is absolute, the result has 2663 the section of the other argument. You may not add together 2664 arguments from different sections. 2665 2666 `-' 2667 "Subtraction". If the right argument is absolute, the result 2668 has the section of the left argument. If both arguments are 2669 in the same section, the result is absolute. You may not 2670 subtract arguments from different sections. 2671 2672 `==' 2673 "Is Equal To" 2674 2675 `<>' 2676 `!=' 2677 "Is Not Equal To" 2678 2679 `<' 2680 "Is Less Than" 2681 2682 `>' 2683 "Is Greater Than" 2684 2685 `>=' 2686 "Is Greater Than Or Equal To" 2687 2688 `<=' 2689 "Is Less Than Or Equal To" 2690 2691 The comparison operators can be used as infix operators. A 2692 true results has a value of -1 whereas a false result has a 2693 value of 0. Note, these operators perform signed 2694 comparisons. 2695 2696 4. Lowest Precedence 2697 2698 `&&' 2699 "Logical And". 2700 2701 `||' 2702 "Logical Or". 2703 2704 These two logical operations can be used to combine the 2705 results of sub expressions. Note, unlike the comparison 2706 operators a true result returns a value of 1 but a false 2707 results does still return 0. Also note that the logical or 2708 operator has a slightly lower precedence than logical and. 2709 2710 2711 In short, it's only meaningful to add or subtract the _offsets_ in an 2712 address; you can only have a defined section in one of the two 2713 arguments. 2714 2715 2716 File: as.info, Node: Pseudo Ops, Next: Machine Dependencies, Prev: Expressions, Up: Top 2717 2718 7 Assembler Directives 2719 ********************** 2720 2721 All assembler directives have names that begin with a period (`.'). 2722 The rest of the name is letters, usually in lower case. 2723 2724 This chapter discusses directives that are available regardless of 2725 the target machine configuration for the GNU assembler. Some machine 2726 configurations provide additional directives. *Note Machine 2727 Dependencies::. 2728 2729 * Menu: 2730 2731 * Abort:: `.abort' 2732 2733 * ABORT:: `.ABORT' 2734 2735 * Align:: `.align ABS-EXPR , ABS-EXPR' 2736 * Altmacro:: `.altmacro' 2737 * Ascii:: `.ascii "STRING"'... 2738 * Asciz:: `.asciz "STRING"'... 2739 * Balign:: `.balign ABS-EXPR , ABS-EXPR' 2740 * Byte:: `.byte EXPRESSIONS' 2741 * Comm:: `.comm SYMBOL , LENGTH ' 2742 2743 * CFI directives:: `.cfi_startproc', `.cfi_endproc', etc. 2744 2745 * Data:: `.data SUBSECTION' 2746 2747 * Def:: `.def NAME' 2748 2749 * Desc:: `.desc SYMBOL, ABS-EXPRESSION' 2750 2751 * Dim:: `.dim' 2752 2753 * Double:: `.double FLONUMS' 2754 * Eject:: `.eject' 2755 * Else:: `.else' 2756 * Elseif:: `.elseif' 2757 * End:: `.end' 2758 2759 * Endef:: `.endef' 2760 2761 * Endfunc:: `.endfunc' 2762 * Endif:: `.endif' 2763 * Equ:: `.equ SYMBOL, EXPRESSION' 2764 * Equiv:: `.equiv SYMBOL, EXPRESSION' 2765 * Eqv:: `.eqv SYMBOL, EXPRESSION' 2766 * Err:: `.err' 2767 * Error:: `.error STRING' 2768 * Exitm:: `.exitm' 2769 * Extern:: `.extern' 2770 * Fail:: `.fail' 2771 2772 * File:: `.file STRING' 2773 2774 * Fill:: `.fill REPEAT , SIZE , VALUE' 2775 * Float:: `.float FLONUMS' 2776 * Func:: `.func' 2777 * Global:: `.global SYMBOL', `.globl SYMBOL' 2778 2779 * Hidden:: `.hidden NAMES' 2780 2781 * hword:: `.hword EXPRESSIONS' 2782 * Ident:: `.ident' 2783 * If:: `.if ABSOLUTE EXPRESSION' 2784 * Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]' 2785 * Include:: `.include "FILE"' 2786 * Int:: `.int EXPRESSIONS' 2787 2788 * Internal:: `.internal NAMES' 2789 2790 * Irp:: `.irp SYMBOL,VALUES'... 2791 * Irpc:: `.irpc SYMBOL,VALUES'... 2792 * Lcomm:: `.lcomm SYMBOL , LENGTH' 2793 * Lflags:: `.lflags' 2794 2795 * Line:: `.line LINE-NUMBER' 2796 2797 * Linkonce:: `.linkonce [TYPE]' 2798 * List:: `.list' 2799 * Ln:: `.ln LINE-NUMBER' 2800 2801 * LNS directives:: `.file', `.loc', etc. 2802 2803 * Long:: `.long EXPRESSIONS' 2804 2805 * Macro:: `.macro NAME ARGS'... 2806 * MRI:: `.mri VAL' 2807 * Noaltmacro:: `.noaltmacro' 2808 * Nolist:: `.nolist' 2809 * Octa:: `.octa BIGNUMS' 2810 * Org:: `.org NEW-LC , FILL' 2811 * P2align:: `.p2align ABS-EXPR , ABS-EXPR' 2812 2813 * PopSection:: `.popsection' 2814 * Previous:: `.previous' 2815 2816 * Print:: `.print STRING' 2817 2818 * Protected:: `.protected NAMES' 2819 2820 * Psize:: `.psize LINES, COLUMNS' 2821 * Purgem:: `.purgem NAME' 2822 2823 * PushSection:: `.pushsection NAME' 2824 2825 * Quad:: `.quad BIGNUMS' 2826 * Rept:: `.rept COUNT' 2827 * Sbttl:: `.sbttl "SUBHEADING"' 2828 2829 * Scl:: `.scl CLASS' 2830 2831 * Section:: `.section NAME' 2832 2833 * Set:: `.set SYMBOL, EXPRESSION' 2834 * Short:: `.short EXPRESSIONS' 2835 * Single:: `.single FLONUMS' 2836 2837 * Size:: `.size [NAME , EXPRESSION]' 2838 2839 * Skip:: `.skip SIZE , FILL' 2840 * Sleb128:: `.sleb128 EXPRESSIONS' 2841 * Space:: `.space SIZE , FILL' 2842 2843 * Stab:: `.stabd, .stabn, .stabs' 2844 2845 * String:: `.string "STR"' 2846 * Struct:: `.struct EXPRESSION' 2847 2848 * SubSection:: `.subsection' 2849 * Symver:: `.symver NAME,NAME2@NODENAME' 2850 2851 2852 * Tag:: `.tag STRUCTNAME' 2853 2854 * Text:: `.text SUBSECTION' 2855 * Title:: `.title "HEADING"' 2856 2857 * Type:: `.type <INT | NAME , TYPE DESCRIPTION>' 2858 2859 * Uleb128:: `.uleb128 EXPRESSIONS' 2860 2861 * Val:: `.val ADDR' 2862 2863 2864 * Version:: `.version "STRING"' 2865 * VTableEntry:: `.vtable_entry TABLE, OFFSET' 2866 * VTableInherit:: `.vtable_inherit CHILD, PARENT' 2867 2868 * Warning:: `.warning STRING' 2869 * Weak:: `.weak NAMES' 2870 * Weakref:: `.weakref ALIAS, SYMBOL' 2871 * Word:: `.word EXPRESSIONS' 2872 * Deprecated:: Deprecated Directives 2873 2874 2875 File: as.info, Node: Abort, Next: ABORT, Up: Pseudo Ops 2876 2877 7.1 `.abort' 2878 ============ 2879 2880 This directive stops the assembly immediately. It is for compatibility 2881 with other assemblers. The original idea was that the assembly 2882 language source would be piped into the assembler. If the sender of 2883 the source quit, it could use this directive tells `as' to quit also. 2884 One day `.abort' will not be supported. 2885 2886 2887 File: as.info, Node: ABORT, Next: Align, Prev: Abort, Up: Pseudo Ops 2888 2889 7.2 `.ABORT' 2890 ============ 2891 2892 When producing COFF output, `as' accepts this directive as a synonym 2893 for `.abort'. 2894 2895 2896 File: as.info, Node: Align, Next: Altmacro, Prev: ABORT, Up: Pseudo Ops 2897 2898 7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2899 ========================================= 2900 2901 Pad the location counter (in the current subsection) to a particular 2902 storage boundary. The first expression (which must be absolute) is the 2903 alignment required, as described below. 2904 2905 The second expression (also absolute) gives the fill value to be 2906 stored in the padding bytes. It (and the comma) may be omitted. If it 2907 is omitted, the padding bytes are normally zero. However, on some 2908 systems, if the section is marked as containing code and the fill value 2909 is omitted, the space is filled with no-op instructions. 2910 2911 The third expression is also absolute, and is also optional. If it 2912 is present, it is the maximum number of bytes that should be skipped by 2913 this alignment directive. If doing the alignment would require 2914 skipping more bytes than the specified maximum, then the alignment is 2915 not done at all. You can omit the fill value (the second argument) 2916 entirely by simply using two commas after the required alignment; this 2917 can be useful if you want the alignment to be filled with no-op 2918 instructions when appropriate. 2919 2920 The way the required alignment is specified varies from system to 2921 system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32, 2922 s390, sparc, tic4x, tic80 and xtensa, the first expression is the 2923 alignment request in bytes. For example `.align 8' advances the 2924 location counter until it is a multiple of 8. If the location counter 2925 is already a multiple of 8, no change is needed. For the tic54x, the 2926 first expression is the alignment request in words. 2927 2928 For other systems, including the i386 using a.out format, and the 2929 arm and strongarm, it is the number of low-order zero bits the location 2930 counter must have after advancement. For example `.align 3' advances 2931 the location counter until it a multiple of 8. If the location counter 2932 is already a multiple of 8, no change is needed. 2933 2934 This inconsistency is due to the different behaviors of the various 2935 native assemblers for these systems which GAS must emulate. GAS also 2936 provides `.balign' and `.p2align' directives, described later, which 2937 have a consistent behavior across all architectures (but are specific 2938 to GAS). 2939 2940 2941 File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops 2942 2943 7.4 `.ascii "STRING"'... 2944 ======================== 2945 2946 `.ascii' expects zero or more string literals (*note Strings::) 2947 separated by commas. It assembles each string (with no automatic 2948 trailing zero byte) into consecutive addresses. 2949 2950 2951 File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops 2952 2953 7.5 `.asciz "STRING"'... 2954 ======================== 2955 2956 `.asciz' is just like `.ascii', but each string is followed by a zero 2957 byte. The "z" in `.asciz' stands for "zero". 2958 2959 2960 File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops 2961 2962 7.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 2963 ============================================== 2964 2965 Pad the location counter (in the current subsection) to a particular 2966 storage boundary. The first expression (which must be absolute) is the 2967 alignment request in bytes. For example `.balign 8' advances the 2968 location counter until it is a multiple of 8. If the location counter 2969 is already a multiple of 8, no change is needed. 2970 2971 The second expression (also absolute) gives the fill value to be 2972 stored in the padding bytes. It (and the comma) may be omitted. If it 2973 is omitted, the padding bytes are normally zero. However, on some 2974 systems, if the section is marked as containing code and the fill value 2975 is omitted, the space is filled with no-op instructions. 2976 2977 The third expression is also absolute, and is also optional. If it 2978 is present, it is the maximum number of bytes that should be skipped by 2979 this alignment directive. If doing the alignment would require 2980 skipping more bytes than the specified maximum, then the alignment is 2981 not done at all. You can omit the fill value (the second argument) 2982 entirely by simply using two commas after the required alignment; this 2983 can be useful if you want the alignment to be filled with no-op 2984 instructions when appropriate. 2985 2986 The `.balignw' and `.balignl' directives are variants of the 2987 `.balign' directive. The `.balignw' directive treats the fill pattern 2988 as a two byte word value. The `.balignl' directives treats the fill 2989 pattern as a four byte longword value. For example, `.balignw 2990 4,0x368d' will align to a multiple of 4. If it skips two bytes, they 2991 will be filled in with the value 0x368d (the exact placement of the 2992 bytes depends upon the endianness of the processor). If it skips 1 or 2993 3 bytes, the fill value is undefined. 2994 2995 2996 File: as.info, Node: Byte, Next: Comm, Prev: Balign, Up: Pseudo Ops 2997 2998 7.7 `.byte EXPRESSIONS' 2999 ======================= 3000 3001 `.byte' expects zero or more expressions, separated by commas. Each 3002 expression is assembled into the next byte. 3003 3004 3005 File: as.info, Node: Comm, Next: CFI directives, Prev: Byte, Up: Pseudo Ops 3006 3007 7.8 `.comm SYMBOL , LENGTH ' 3008 ============================ 3009 3010 `.comm' declares a common symbol named SYMBOL. When linking, a common 3011 symbol in one object file may be merged with a defined or common symbol 3012 of the same name in another object file. If `ld' does not see a 3013 definition for the symbol-just one or more common symbols-then it will 3014 allocate LENGTH bytes of uninitialized memory. LENGTH must be an 3015 absolute expression. If `ld' sees multiple common symbols with the 3016 same name, and they do not all have the same size, it will allocate 3017 space using the largest size. 3018 3019 When using ELF, the `.comm' directive takes an optional third 3020 argument. This is the desired alignment of the symbol, specified as a 3021 byte boundary (for example, an alignment of 16 means that the least 3022 significant 4 bits of the address should be zero). The alignment must 3023 be an absolute expression, and it must be a power of two. If `ld' 3024 allocates uninitialized memory for the common symbol, it will use the 3025 alignment when placing the symbol. If no alignment is specified, `as' 3026 will set the alignment to the largest power of two less than or equal 3027 to the size of the symbol, up to a maximum of 16. 3028 3029 The syntax for `.comm' differs slightly on the HPPA. The syntax is 3030 `SYMBOL .comm, LENGTH'; SYMBOL is optional. 3031 3032 3033 File: as.info, Node: CFI directives, Next: Data, Prev: Comm, Up: Pseudo Ops 3034 3035 7.9 `.cfi_startproc' 3036 ==================== 3037 3038 `.cfi_startproc' is used at the beginning of each function that should 3039 have an entry in `.eh_frame'. It initializes some internal data 3040 structures and emits architecture dependent initial CFI instructions. 3041 Don't forget to close the function by `.cfi_endproc'. 3042 3043 7.10 `.cfi_endproc' 3044 =================== 3045 3046 `.cfi_endproc' is used at the end of a function where it closes its 3047 unwind entry previously opened by `.cfi_startproc'. and emits it to 3048 `.eh_frame'. 3049 3050 7.11 `.cfi_def_cfa REGISTER, OFFSET' 3051 ==================================== 3052 3053 `.cfi_def_cfa' defines a rule for computing CFA as: take address from 3054 REGISTER and add OFFSET to it. 3055 3056 7.12 `.cfi_def_cfa_register REGISTER' 3057 ===================================== 3058 3059 `.cfi_def_cfa_register' modifies a rule for computing CFA. From now on 3060 REGISTER will be used instead of the old one. Offset remains the same. 3061 3062 7.13 `.cfi_def_cfa_offset OFFSET' 3063 ================================= 3064 3065 `.cfi_def_cfa_offset' modifies a rule for computing CFA. Register 3066 remains the same, but OFFSET is new. Note that it is the absolute 3067 offset that will be added to a defined register to compute CFA address. 3068 3069 7.14 `.cfi_adjust_cfa_offset OFFSET' 3070 ==================================== 3071 3072 Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is 3073 added/substracted from the previous offset. 3074 3075 7.15 `.cfi_offset REGISTER, OFFSET' 3076 =================================== 3077 3078 Previous value of REGISTER is saved at offset OFFSET from CFA. 3079 3080 7.16 `.cfi_rel_offset REGISTER, OFFSET' 3081 ======================================= 3082 3083 Previous value of REGISTER is saved at offset OFFSET from the current 3084 CFA register. This is transformed to `.cfi_offset' using the known 3085 displacement of the CFA register from the CFA. This is often easier to 3086 use, because the number will match the code it's annotating. 3087 3088 7.17 `.cfi_signal_frame' 3089 ======================== 3090 3091 Mark current function as signal trampoline. 3092 3093 7.18 `.cfi_window_save' 3094 ======================= 3095 3096 SPARC register window has been saved. 3097 3098 7.19 `.cfi_escape' EXPRESSION[, ...] 3099 ==================================== 3100 3101 Allows the user to add arbitrary bytes to the unwind info. One might 3102 use this to add OS-specific CFI opcodes, or generic CFI opcodes that 3103 GAS does not yet support. 3104 3105 3106 File: as.info, Node: LNS directives, Next: Long, Prev: Ln, Up: Pseudo Ops 3107 3108 7.20 `.file FILENO FILENAME' 3109 ============================ 3110 3111 When emitting dwarf2 line number information `.file' assigns filenames 3112 to the `.debug_line' file name table. The FILENO operand should be a 3113 unique positive integer to use as the index of the entry in the table. 3114 The FILENAME operand is a C string literal. 3115 3116 The detail of filename indicies is exposed to the user because the 3117 filename table is shared with the `.debug_info' section of the dwarf2 3118 debugging information, and thus the user must know the exact indicies 3119 that table entries will have. 3120 3121 7.21 `.loc FILENO LINENO [COLUMN] [OPTIONS]' 3122 ============================================ 3123 3124 The `.loc' directive will add row to the `.debug_line' line number 3125 matrix corresponding to the immediately following assembly instruction. 3126 The FILENO, LINENO, and optional COLUMN arguments will be applied to 3127 the `.debug_line' state machine before the row is added. 3128 3129 The OPTIONS are a sequence of the following tokens in any order: 3130 3131 `basic_block' 3132 This option will set the `basic_block' register in the 3133 `.debug_line' state machine to `true'. 3134 3135 `prologue_end' 3136 This option will set the `prologue_end' register in the 3137 `.debug_line' state machine to `true'. 3138 3139 `epilogue_begin' 3140 This option will set the `epilogue_begin' register in the 3141 `.debug_line' state machine to `true'. 3142 3143 `is_stmt VALUE' 3144 This option will set the `is_stmt' register in the `.debug_line' 3145 state machine to `value', which must be either 0 or 1. 3146 3147 `isa VALUE' 3148 This directive will set the `isa' register in the `.debug_line' 3149 state machine to VALUE, which must be an unsigned integer. 3150 3151 3152 7.22 `.loc_mark_blocks ENABLE' 3153 ============================== 3154 3155 The `.loc_mark_blocks' directive makes the assembler emit an entry to 3156 the `.debug_line' line number matrix with the `basic_block' register in 3157 the state machine set whenever a code label is seen. The ENABLE 3158 argument should be either 1 or 0, to enable or disable this function 3159 respectively. 3160 3161 3162 File: as.info, Node: Data, Next: Def, Prev: CFI directives, Up: Pseudo Ops 3163 3164 7.23 `.data SUBSECTION' 3165 ======================= 3166 3167 `.data' tells `as' to assemble the following statements onto the end of 3168 the data subsection numbered SUBSECTION (which is an absolute 3169 expression). If SUBSECTION is omitted, it defaults to zero. 3170 3171 3172 File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops 3173 3174 7.24 `.def NAME' 3175 ================ 3176 3177 Begin defining debugging information for a symbol NAME; the definition 3178 extends until the `.endef' directive is encountered. 3179 3180 3181 File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops 3182 3183 7.25 `.desc SYMBOL, ABS-EXPRESSION' 3184 =================================== 3185 3186 This directive sets the descriptor of the symbol (*note Symbol 3187 Attributes::) to the low 16 bits of an absolute expression. 3188 3189 The `.desc' directive is not available when `as' is configured for 3190 COFF output; it is only for `a.out' or `b.out' object format. For the 3191 sake of compatibility, `as' accepts it, but produces no output, when 3192 configured for COFF. 3193 3194 3195 File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops 3196 3197 7.26 `.dim' 3198 =========== 3199 3200 This directive is generated by compilers to include auxiliary debugging 3201 information in the symbol table. It is only permitted inside 3202 `.def'/`.endef' pairs. 3203 3204 3205 File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops 3206 3207 7.27 `.double FLONUMS' 3208 ====================== 3209 3210 `.double' expects zero or more flonums, separated by commas. It 3211 assembles floating point numbers. The exact kind of floating point 3212 numbers emitted depends on how `as' is configured. *Note Machine 3213 Dependencies::. 3214 3215 3216 File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops 3217 3218 7.28 `.eject' 3219 ============= 3220 3221 Force a page break at this point, when generating assembly listings. 3222 3223 3224 File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops 3225 3226 7.29 `.else' 3227 ============ 3228 3229 `.else' is part of the `as' support for conditional assembly; *note 3230 `.if': If. It marks the beginning of a section of code to be assembled 3231 if the condition for the preceding `.if' was false. 3232 3233 3234 File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops 3235 3236 7.30 `.elseif' 3237 ============== 3238 3239 `.elseif' is part of the `as' support for conditional assembly; *note 3240 `.if': If. It is shorthand for beginning a new `.if' block that would 3241 otherwise fill the entire `.else' section. 3242 3243 3244 File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops 3245 3246 7.31 `.end' 3247 =========== 3248 3249 `.end' marks the end of the assembly file. `as' does not process 3250 anything in the file past the `.end' directive. 3251 3252 3253 File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops 3254 3255 7.32 `.endef' 3256 ============= 3257 3258 This directive flags the end of a symbol definition begun with `.def'. 3259 3260 3261 File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops 3262 3263 7.33 `.endfunc' 3264 =============== 3265 3266 `.endfunc' marks the end of a function specified with `.func'. 3267 3268 3269 File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops 3270 3271 7.34 `.endif' 3272 ============= 3273 3274 `.endif' is part of the `as' support for conditional assembly; it marks 3275 the end of a block of code that is only assembled conditionally. *Note 3276 `.if': If. 3277 3278 3279 File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops 3280 3281 7.35 `.equ SYMBOL, EXPRESSION' 3282 ============================== 3283 3284 This directive sets the value of SYMBOL to EXPRESSION. It is 3285 synonymous with `.set'; *note `.set': Set. 3286 3287 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'. 3288 3289 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the 3290 Z80 it is an eror if SYMBOL is already defined, but the symbol is not 3291 protected from later redefinition, compare *Note Equiv::. 3292 3293 3294 File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops 3295 3296 7.36 `.equiv SYMBOL, EXPRESSION' 3297 ================================ 3298 3299 The `.equiv' directive is like `.equ' and `.set', except that the 3300 assembler will signal an error if SYMBOL is already defined. Note a 3301 symbol which has been referenced but not actually defined is considered 3302 to be undefined. 3303 3304 Except for the contents of the error message, this is roughly 3305 equivalent to 3306 .ifdef SYM 3307 .err 3308 .endif 3309 .equ SYM,VAL 3310 plus it protects the symbol from later redefinition. 3311 3312 3313 File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops 3314 3315 7.37 `.eqv SYMBOL, EXPRESSION' 3316 ============================== 3317 3318 The `.eqv' directive is like `.equiv', but no attempt is made to 3319 evaluate the expression or any part of it immediately. Instead each 3320 time the resulting symbol is used in an expression, a snapshot of its 3321 current value is taken. 3322 3323 3324 File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops 3325 3326 7.38 `.err' 3327 =========== 3328 3329 If `as' assembles a `.err' directive, it will print an error message 3330 and, unless the `-Z' option was used, it will not generate an object 3331 file. This can be used to signal an error in conditionally compiled 3332 code. 3333 3334 3335 File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops 3336 3337 7.39 `.error "STRING"' 3338 ====================== 3339 3340 Similarly to `.err', this directive emits an error, but you can specify 3341 a string that will be emitted as the error message. If you don't 3342 specify the message, it defaults to `".error directive invoked in 3343 source file"'. *Note Error and Warning Messages: Errors. 3344 3345 .error "This code has not been assembled and tested." 3346 3347 3348 File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops 3349 3350 7.40 `.exitm' 3351 ============= 3352 3353 Exit early from the current macro definition. *Note Macro::. 3354 3355 3356 File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops 3357 3358 7.41 `.extern' 3359 ============== 3360 3361 `.extern' is accepted in the source program--for compatibility with 3362 other assemblers--but it is ignored. `as' treats all undefined symbols 3363 as external. 3364 3365 3366 File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops 3367 3368 7.42 `.fail EXPRESSION' 3369 ======================= 3370 3371 Generates an error or a warning. If the value of the EXPRESSION is 500 3372 or more, `as' will print a warning message. If the value is less than 3373 500, `as' will print an error message. The message will include the 3374 value of EXPRESSION. This can occasionally be useful inside complex 3375 nested macros or conditional assembly. 3376 3377 3378 File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops 3379 3380 7.43 `.file STRING' 3381 =================== 3382 3383 `.file' tells `as' that we are about to start a new logical file. 3384 STRING is the new file name. In general, the filename is recognized 3385 whether or not it is surrounded by quotes `"'; but if you wish to 3386 specify an empty file name, you must give the quotes-`""'. This 3387 statement may go away in future: it is only recognized to be compatible 3388 with old `as' programs. 3389 3390 3391 File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops 3392 3393 7.44 `.fill REPEAT , SIZE , VALUE' 3394 ================================== 3395 3396 REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT 3397 copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or 3398 more, but if it is more than 8, then it is deemed to have the value 8, 3399 compatible with other people's assemblers. The contents of each REPEAT 3400 bytes is taken from an 8-byte number. The highest order 4 bytes are 3401 zero. The lowest order 4 bytes are VALUE rendered in the byte-order of 3402 an integer on the computer `as' is assembling for. Each SIZE bytes in 3403 a repetition is taken from the lowest order SIZE bytes of this number. 3404 Again, this bizarre behavior is compatible with other people's 3405 assemblers. 3406 3407 SIZE and VALUE are optional. If the second comma and VALUE are 3408 absent, VALUE is assumed zero. If the first comma and following tokens 3409 are absent, SIZE is assumed to be 1. 3410 3411 3412 File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops 3413 3414 7.45 `.float FLONUMS' 3415 ===================== 3416 3417 This directive assembles zero or more flonums, separated by commas. It 3418 has the same effect as `.single'. The exact kind of floating point 3419 numbers emitted depends on how `as' is configured. *Note Machine 3420 Dependencies::. 3421 3422 3423 File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops 3424 3425 7.46 `.func NAME[,LABEL]' 3426 ========================= 3427 3428 `.func' emits debugging information to denote function NAME, and is 3429 ignored unless the file is assembled with debugging enabled. Only 3430 `--gstabs[+]' is currently supported. LABEL is the entry point of the 3431 function and if omitted NAME prepended with the `leading char' is used. 3432 `leading char' is usually `_' or nothing, depending on the target. All 3433 functions are currently defined to have `void' return type. The 3434 function must be terminated with `.endfunc'. 3435 3436 3437 File: as.info, Node: Global, Next: Hidden, Prev: Func, Up: Pseudo Ops 3438 3439 7.47 `.global SYMBOL', `.globl SYMBOL' 3440 ====================================== 3441 3442 `.global' makes the symbol visible to `ld'. If you define SYMBOL in 3443 your partial program, its value is made available to other partial 3444 programs that are linked with it. Otherwise, SYMBOL takes its 3445 attributes from a symbol of the same name from another file linked into 3446 the same program. 3447 3448 Both spellings (`.globl' and `.global') are accepted, for 3449 compatibility with other assemblers. 3450 3451 On the HPPA, `.global' is not always enough to make it accessible to 3452 other partial programs. You may need the HPPA-only `.EXPORT' directive 3453 as well. *Note HPPA Assembler Directives: HPPA Directives. 3454 3455 3456 File: as.info, Node: Hidden, Next: hword, Prev: Global, Up: Pseudo Ops 3457 3458 7.48 `.hidden NAMES' 3459 ==================== 3460 3461 This is one of the ELF visibility directives. The other two are 3462 `.internal' (*note `.internal': Internal.) and `.protected' (*note 3463 `.protected': Protected.). 3464 3465 This directive overrides the named symbols default visibility (which 3466 is set by their binding: local, global or weak). The directive sets 3467 the visibility to `hidden' which means that the symbols are not visible 3468 to other components. Such symbols are always considered to be 3469 `protected' as well. 3470 3471 3472 File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops 3473 3474 7.49 `.hword EXPRESSIONS' 3475 ========================= 3476 3477 This expects zero or more EXPRESSIONS, and emits a 16 bit number for 3478 each. 3479 3480 This directive is a synonym for `.short'; depending on the target 3481 architecture, it may also be a synonym for `.word'. 3482 3483 3484 File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops 3485 3486 7.50 `.ident' 3487 ============= 3488 3489 This directive is used by some assemblers to place tags in object 3490 files. The behavior of this directive varies depending on the target. 3491 When using the a.out object file format, `as' simply accepts the 3492 directive for source-file compatibility with existing assemblers, but 3493 does not emit anything for it. When using COFF, comments are emitted 3494 to the `.comment' or `.rdata' section, depending on the target. When 3495 using ELF, comments are emitted to the `.comment' section. 3496 3497 3498 File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops 3499 3500 7.51 `.if ABSOLUTE EXPRESSION' 3501 ============================== 3502 3503 `.if' marks the beginning of a section of code which is only considered 3504 part of the source program being assembled if the argument (which must 3505 be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional 3506 section of code must be marked by `.endif' (*note `.endif': Endif.); 3507 optionally, you may include code for the alternative condition, flagged 3508 by `.else' (*note `.else': Else.). If you have several conditions to 3509 check, `.elseif' may be used to avoid nesting blocks if/else within 3510 each subsequent `.else' block. 3511 3512 The following variants of `.if' are also supported: 3513 `.ifdef SYMBOL' 3514 Assembles the following section of code if the specified SYMBOL 3515 has been defined. Note a symbol which has been referenced but not 3516 yet defined is considered to be undefined. 3517 3518 `.ifb TEXT' 3519 Assembles the following section of code if the operand is blank 3520 (empty). 3521 3522 `.ifc STRING1,STRING2' 3523 Assembles the following section of code if the two strings are the 3524 same. The strings may be optionally quoted with single quotes. 3525 If they are not quoted, the first string stops at the first comma, 3526 and the second string stops at the end of the line. Strings which 3527 contain whitespace should be quoted. The string comparison is 3528 case sensitive. 3529 3530 `.ifeq ABSOLUTE EXPRESSION' 3531 Assembles the following section of code if the argument is zero. 3532 3533 `.ifeqs STRING1,STRING2' 3534 Another form of `.ifc'. The strings must be quoted using double 3535 quotes. 3536 3537 `.ifge ABSOLUTE EXPRESSION' 3538 Assembles the following section of code if the argument is greater 3539 than or equal to zero. 3540 3541 `.ifgt ABSOLUTE EXPRESSION' 3542 Assembles the following section of code if the argument is greater 3543 than zero. 3544 3545 `.ifle ABSOLUTE EXPRESSION' 3546 Assembles the following section of code if the argument is less 3547 than or equal to zero. 3548 3549 `.iflt ABSOLUTE EXPRESSION' 3550 Assembles the following section of code if the argument is less 3551 than zero. 3552 3553 `.ifnb TEXT' 3554 Like `.ifb', but the sense of the test is reversed: this assembles 3555 the following section of code if the operand is non-blank 3556 (non-empty). 3557 3558 `.ifnc STRING1,STRING2.' 3559 Like `.ifc', but the sense of the test is reversed: this assembles 3560 the following section of code if the two strings are not the same. 3561 3562 `.ifndef SYMBOL' 3563 `.ifnotdef SYMBOL' 3564 Assembles the following section of code if the specified SYMBOL 3565 has not been defined. Both spelling variants are equivalent. 3566 Note a symbol which has been referenced but not yet defined is 3567 considered to be undefined. 3568 3569 `.ifne ABSOLUTE EXPRESSION' 3570 Assembles the following section of code if the argument is not 3571 equal to zero (in other words, this is equivalent to `.if'). 3572 3573 `.ifnes STRING1,STRING2' 3574 Like `.ifeqs', but the sense of the test is reversed: this 3575 assembles the following section of code if the two strings are not 3576 the same. 3577 3578 3579 File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops 3580 3581 7.52 `.incbin "FILE"[,SKIP[,COUNT]]' 3582 ==================================== 3583 3584 The `incbin' directive includes FILE verbatim at the current location. 3585 You can control the search paths used with the `-I' command-line option 3586 (*note Command-Line Options: Invoking.). Quotation marks are required 3587 around FILE. 3588 3589 The SKIP argument skips a number of bytes from the start of the 3590 FILE. The COUNT argument indicates the maximum number of bytes to 3591 read. Note that the data is not aligned in any way, so it is the user's 3592 responsibility to make sure that proper alignment is provided both 3593 before and after the `incbin' directive. 3594 3595 3596 File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops 3597 3598 7.53 `.include "FILE"' 3599 ====================== 3600 3601 This directive provides a way to include supporting files at specified 3602 points in your source program. The code from FILE is assembled as if 3603 it followed the point of the `.include'; when the end of the included 3604 file is reached, assembly of the original file continues. You can 3605 control the search paths used with the `-I' command-line option (*note 3606 Command-Line Options: Invoking.). Quotation marks are required around 3607 FILE. 3608 3609 3610 File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops 3611 3612 7.54 `.int EXPRESSIONS' 3613 ======================= 3614 3615 Expect zero or more EXPRESSIONS, of any section, separated by commas. 3616 For each expression, emit a number that, at run time, is the value of 3617 that expression. The byte order and bit size of the number depends on 3618 what kind of target the assembly is for. 3619 3620 3621 File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops 3622 3623 7.55 `.internal NAMES' 3624 ====================== 3625 3626 This is one of the ELF visibility directives. The other two are 3627 `.hidden' (*note `.hidden': Hidden.) and `.protected' (*note 3628 `.protected': Protected.). 3629 3630 This directive overrides the named symbols default visibility (which 3631 is set by their binding: local, global or weak). The directive sets 3632 the visibility to `internal' which means that the symbols are 3633 considered to be `hidden' (i.e., not visible to other components), and 3634 that some extra, processor specific processing must also be performed 3635 upon the symbols as well. 3636 3637 3638 File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops 3639 3640 7.56 `.irp SYMBOL,VALUES'... 3641 ============================ 3642 3643 Evaluate a sequence of statements assigning different values to SYMBOL. 3644 The sequence of statements starts at the `.irp' directive, and is 3645 terminated by an `.endr' directive. For each VALUE, SYMBOL is set to 3646 VALUE, and the sequence of statements is assembled. If no VALUE is 3647 listed, the sequence of statements is assembled once, with SYMBOL set 3648 to the null string. To refer to SYMBOL within the sequence of 3649 statements, use \SYMBOL. 3650 3651 For example, assembling 3652 3653 .irp param,1,2,3 3654 move d\param,sp@- 3655 .endr 3656 3657 is equivalent to assembling 3658 3659 move d1,sp@- 3660 move d2,sp@- 3661 move d3,sp@- 3662 3663 For some caveats with the spelling of SYMBOL, see also the discussion 3664 at *Note Macro::. 3665 3666 3667 File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops 3668 3669 7.57 `.irpc SYMBOL,VALUES'... 3670 ============================= 3671 3672 Evaluate a sequence of statements assigning different values to SYMBOL. 3673 The sequence of statements starts at the `.irpc' directive, and is 3674 terminated by an `.endr' directive. For each character in VALUE, 3675 SYMBOL is set to the character, and the sequence of statements is 3676 assembled. If no VALUE is listed, the sequence of statements is 3677 assembled once, with SYMBOL set to the null string. To refer to SYMBOL 3678 within the sequence of statements, use \SYMBOL. 3679 3680 For example, assembling 3681 3682 .irpc param,123 3683 move d\param,sp@- 3684 .endr 3685 3686 is equivalent to assembling 3687 3688 move d1,sp@- 3689 move d2,sp@- 3690 move d3,sp@- 3691 3692 For some caveats with the spelling of SYMBOL, see also the discussion 3693 at *Note Macro::. 3694 3695 3696 File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops 3697 3698 7.58 `.lcomm SYMBOL , LENGTH' 3699 ============================= 3700 3701 Reserve LENGTH (an absolute expression) bytes for a local common 3702 denoted by SYMBOL. The section and value of SYMBOL are those of the 3703 new local common. The addresses are allocated in the bss section, so 3704 that at run-time the bytes start off zeroed. SYMBOL is not declared 3705 global (*note `.global': Global.), so is normally not visible to `ld'. 3706 3707 Some targets permit a third argument to be used with `.lcomm'. This 3708 argument specifies the desired alignment of the symbol in the bss 3709 section. 3710 3711 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is 3712 `SYMBOL .lcomm, LENGTH'; SYMBOL is optional. 3713 3714 3715 File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops 3716 3717 7.59 `.lflags' 3718 ============== 3719 3720 `as' accepts this directive, for compatibility with other assemblers, 3721 but ignores it. 3722 3723 3724 File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops 3725 3726 7.60 `.line LINE-NUMBER' 3727 ======================== 3728 3729 Change the logical line number. LINE-NUMBER must be an absolute 3730 expression. The next line has that logical line number. Therefore any 3731 other statements on the current line (after a statement separator 3732 character) are reported as on logical line number LINE-NUMBER - 1. One 3733 day `as' will no longer support this directive: it is recognized only 3734 for compatibility with existing assembler programs. 3735 3736 Even though this is a directive associated with the `a.out' or 3737 `b.out' object-code formats, `as' still recognizes it when producing 3738 COFF output, and treats `.line' as though it were the COFF `.ln' _if_ 3739 it is found outside a `.def'/`.endef' pair. 3740 3741 Inside a `.def', `.line' is, instead, one of the directives used by 3742 compilers to generate auxiliary symbol information for debugging. 3743 3744 3745 File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops 3746 3747 7.61 `.linkonce [TYPE]' 3748 ======================= 3749 3750 Mark the current section so that the linker only includes a single copy 3751 of it. This may be used to include the same section in several 3752 different object files, but ensure that the linker will only include it 3753 once in the final output file. The `.linkonce' pseudo-op must be used 3754 for each instance of the section. Duplicate sections are detected 3755 based on the section name, so it should be unique. 3756 3757 This directive is only supported by a few object file formats; as of 3758 this writing, the only object file format which supports it is the 3759 Portable Executable format used on Windows NT. 3760 3761 The TYPE argument is optional. If specified, it must be one of the 3762 following strings. For example: 3763 .linkonce same_size 3764 Not all types may be supported on all object file formats. 3765 3766 `discard' 3767 Silently discard duplicate sections. This is the default. 3768 3769 `one_only' 3770 Warn if there are duplicate sections, but still keep only one copy. 3771 3772 `same_size' 3773 Warn if any of the duplicates have different sizes. 3774 3775 `same_contents' 3776 Warn if any of the duplicates do not have exactly the same 3777 contents. 3778 3779 3780 File: as.info, Node: Ln, Next: LNS directives, Prev: List, Up: Pseudo Ops 3781 3782 7.62 `.ln LINE-NUMBER' 3783 ====================== 3784 3785 `.ln' is a synonym for `.line'. 3786 3787 3788 File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops 3789 3790 7.63 `.mri VAL' 3791 =============== 3792 3793 If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero, 3794 this tells `as' to exit MRI mode. This change affects code assembled 3795 until the next `.mri' directive, or until the end of the file. *Note 3796 MRI mode: M. 3797 3798 3799 File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops 3800 3801 7.64 `.list' 3802 ============ 3803 3804 Control (in conjunction with the `.nolist' directive) whether or not 3805 assembly listings are generated. These two directives maintain an 3806 internal counter (which is zero initially). `.list' increments the 3807 counter, and `.nolist' decrements it. Assembly listings are generated 3808 whenever the counter is greater than zero. 3809 3810 By default, listings are disabled. When you enable them (with the 3811 `-a' command line option; *note Command-Line Options: Invoking.), the 3812 initial value of the listing counter is one. 3813 3814 3815 File: as.info, Node: Long, Next: Macro, Prev: LNS directives, Up: Pseudo Ops 3816 3817 7.65 `.long EXPRESSIONS' 3818 ======================== 3819 3820 `.long' is the same as `.int', *note `.int': Int. 3821 3822 3823 File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops 3824 3825 7.66 `.macro' 3826 ============= 3827 3828 The commands `.macro' and `.endm' allow you to define macros that 3829 generate assembly output. For example, this definition specifies a 3830 macro `sum' that puts a sequence of numbers into memory: 3831 3832 .macro sum from=0, to=5 3833 .long \from 3834 .if \to-\from 3835 sum "(\from+1)",\to 3836 .endif 3837 .endm 3838 3839 With that definition, `SUM 0,5' is equivalent to this assembly input: 3840 3841 .long 0 3842 .long 1 3843 .long 2 3844 .long 3 3845 .long 4 3846 .long 5 3847 3848 `.macro MACNAME' 3849 `.macro MACNAME MACARGS ...' 3850 Begin the definition of a macro called MACNAME. If your macro 3851 definition requires arguments, specify their names after the macro 3852 name, separated by commas or spaces. You can qualify the macro 3853 argument to indicate whether all invocations must specify a 3854 non-blank value (through `:`req''), or whether it takes all of the 3855 remaining arguments (through `:`vararg''). You can supply a 3856 default value for any macro argument by following the name with 3857 `=DEFLT'. You cannot define two macros with the same MACNAME 3858 unless it has been subject to the `.purgem' directive (*Note 3859 Purgem::.) between the two definitions. For example, these are 3860 all valid `.macro' statements: 3861 3862 `.macro comm' 3863 Begin the definition of a macro called `comm', which takes no 3864 arguments. 3865 3866 `.macro plus1 p, p1' 3867 `.macro plus1 p p1' 3868 Either statement begins the definition of a macro called 3869 `plus1', which takes two arguments; within the macro 3870 definition, write `\p' or `\p1' to evaluate the arguments. 3871 3872 `.macro reserve_str p1=0 p2' 3873 Begin the definition of a macro called `reserve_str', with two 3874 arguments. The first argument has a default value, but not 3875 the second. After the definition is complete, you can call 3876 the macro either as `reserve_str A,B' (with `\p1' evaluating 3877 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with 3878 `\p1' evaluating as the default, in this case `0', and `\p2' 3879 evaluating to B). 3880 3881 `.macro m p1:req, p2=0, p3:vararg' 3882 Begin the definition of a macro called `m', with at least three 3883 arguments. The first argument must always have a value specified, 3884 but not the second, which instead has a default value. The third 3885 formal will get assigned all remaining arguments specified at 3886 invocation time. 3887 3888 When you call a macro, you can specify the argument values either 3889 by position, or by keyword. For example, `sum 9,17' is equivalent 3890 to `sum to=17, from=9'. 3891 3892 Note that since each of the MACARGS can be an identifier exactly 3893 as any other one permitted by the target architecture, there may be 3894 occasional problems if the target hand-crafts special meanings to 3895 certain characters when they occur in a special position. For 3896 example, if colon (`:') is generally permitted to be part of a 3897 symbol name, but the architecture specific code special-cases it 3898 when occuring as the final character of a symbol (to denote a 3899 label), then the macro parameter replacement code will have no way 3900 of knowing that and consider the whole construct (including the 3901 colon) an identifier, and check only this identifier for being the 3902 subject to parameter substitution. In this example, besides the 3903 potential of just separating identifier and colon by white space, 3904 using alternate macro syntax (*Note Altmacro::.) and ampersand 3905 (`&') as the character to separate literal text from macro 3906 parameters (or macro parameters from one another) would provide a 3907 way to achieve the same effect: 3908 3909 .altmacro 3910 .macro label l 3911 l&: 3912 .endm 3913 3914 This applies identically to the identifiers used in `.irp' (*Note 3915 Irp::.) and `.irpc' (*Note Irpc::.). 3916 3917 `.endm' 3918 Mark the end of a macro definition. 3919 3920 `.exitm' 3921 Exit early from the current macro definition. 3922 3923 `\@' 3924 `as' maintains a counter of how many macros it has executed in 3925 this pseudo-variable; you can copy that number to your output with 3926 `\@', but _only within a macro definition_. 3927 3928 `LOCAL NAME [ , ... ]' 3929 _Warning: `LOCAL' is only available if you select "alternate macro 3930 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro': 3931 Altmacro. 3932 3933 3934 File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops 3935 3936 7.67 `.altmacro' 3937 ================ 3938 3939 Enable alternate macro mode, enabling: 3940 3941 `LOCAL NAME [ , ... ]' 3942 One additional directive, `LOCAL', is available. It is used to 3943 generate a string replacement for each of the NAME arguments, and 3944 replace any instances of NAME in each macro expansion. The 3945 replacement string is unique in the assembly, and different for 3946 each separate macro expansion. `LOCAL' allows you to write macros 3947 that define symbols, without fear of conflict between separate 3948 macro expansions. 3949 3950 `String delimiters' 3951 You can write strings delimited in these other ways besides 3952 `"STRING"': 3953 3954 `'STRING'' 3955 You can delimit strings with single-quote charaters. 3956 3957 `<STRING>' 3958 You can delimit strings with matching angle brackets. 3959 3960 `single-character string escape' 3961 To include any single character literally in a string (even if the 3962 character would otherwise have some special meaning), you can 3963 prefix the character with `!' (an exclamation mark). For example, 3964 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 > 3965 5.4!'. 3966 3967 `Expression results as strings' 3968 You can write `%EXPR' to evaluate the expression EXPR and use the 3969 result as a string. 3970 3971 3972 File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops 3973 3974 7.68 `.noaltmacro' 3975 ================== 3976 3977 Disable alternate macro mode. *Note Altmacro:: 3978 3979 3980 File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops 3981 3982 7.69 `.nolist' 3983 ============== 3984 3985 Control (in conjunction with the `.list' directive) whether or not 3986 assembly listings are generated. These two directives maintain an 3987 internal counter (which is zero initially). `.list' increments the 3988 counter, and `.nolist' decrements it. Assembly listings are generated 3989 whenever the counter is greater than zero. 3990 3991 3992 File: as.info, Node: Octa, Next: Org, Prev: Nolist, Up: Pseudo Ops 3993 3994 7.70 `.octa BIGNUMS' 3995 ==================== 3996 3997 This directive expects zero or more bignums, separated by commas. For 3998 each bignum, it emits a 16-byte integer. 3999 4000 The term "octa" comes from contexts in which a "word" is two bytes; 4001 hence _octa_-word for 16 bytes. 4002 4003 4004 File: as.info, Node: Org, Next: P2align, Prev: Octa, Up: Pseudo Ops 4005 4006 7.71 `.org NEW-LC , FILL' 4007 ========================= 4008 4009 Advance the location counter of the current section to NEW-LC. NEW-LC 4010 is either an absolute expression or an expression with the same section 4011 as the current subsection. That is, you can't use `.org' to cross 4012 sections: if NEW-LC has the wrong section, the `.org' directive is 4013 ignored. To be compatible with former assemblers, if the section of 4014 NEW-LC is absolute, `as' issues a warning, then pretends the section of 4015 NEW-LC is the same as the current subsection. 4016 4017 `.org' may only increase the location counter, or leave it 4018 unchanged; you cannot use `.org' to move the location counter backwards. 4019 4020 Because `as' tries to assemble programs in one pass, NEW-LC may not 4021 be undefined. If you really detest this restriction we eagerly await a 4022 chance to share your improved assembler. 4023 4024 Beware that the origin is relative to the start of the section, not 4025 to the start of the subsection. This is compatible with other people's 4026 assemblers. 4027 4028 When the location counter (of the current subsection) is advanced, 4029 the intervening bytes are filled with FILL which should be an absolute 4030 expression. If the comma and FILL are omitted, FILL defaults to zero. 4031 4032 4033 File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops 4034 4035 7.72 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 4036 ================================================ 4037 4038 Pad the location counter (in the current subsection) to a particular 4039 storage boundary. The first expression (which must be absolute) is the 4040 number of low-order zero bits the location counter must have after 4041 advancement. For example `.p2align 3' advances the location counter 4042 until it a multiple of 8. If the location counter is already a 4043 multiple of 8, no change is needed. 4044 4045 The second expression (also absolute) gives the fill value to be 4046 stored in the padding bytes. It (and the comma) may be omitted. If it 4047 is omitted, the padding bytes are normally zero. However, on some 4048 systems, if the section is marked as containing code and the fill value 4049 is omitted, the space is filled with no-op instructions. 4050 4051 The third expression is also absolute, and is also optional. If it 4052 is present, it is the maximum number of bytes that should be skipped by 4053 this alignment directive. If doing the alignment would require 4054 skipping more bytes than the specified maximum, then the alignment is 4055 not done at all. You can omit the fill value (the second argument) 4056 entirely by simply using two commas after the required alignment; this 4057 can be useful if you want the alignment to be filled with no-op 4058 instructions when appropriate. 4059 4060 The `.p2alignw' and `.p2alignl' directives are variants of the 4061 `.p2align' directive. The `.p2alignw' directive treats the fill 4062 pattern as a two byte word value. The `.p2alignl' directives treats the 4063 fill pattern as a four byte longword value. For example, `.p2alignw 4064 2,0x368d' will align to a multiple of 4. If it skips two bytes, they 4065 will be filled in with the value 0x368d (the exact placement of the 4066 bytes depends upon the endianness of the processor). If it skips 1 or 4067 3 bytes, the fill value is undefined. 4068 4069 4070 File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops 4071 4072 7.73 `.previous' 4073 ================ 4074 4075 This is one of the ELF section stack manipulation directives. The 4076 others are `.section' (*note Section::), `.subsection' (*note 4077 SubSection::), `.pushsection' (*note PushSection::), and `.popsection' 4078 (*note PopSection::). 4079 4080 This directive swaps the current section (and subsection) with most 4081 recently referenced section (and subsection) prior to this one. 4082 Multiple `.previous' directives in a row will flip between two sections 4083 (and their subsections). 4084 4085 In terms of the section stack, this directive swaps the current 4086 section with the top section on the section stack. 4087 4088 4089 File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops 4090 4091 7.74 `.popsection' 4092 ================== 4093 4094 This is one of the ELF section stack manipulation directives. The 4095 others are `.section' (*note Section::), `.subsection' (*note 4096 SubSection::), `.pushsection' (*note PushSection::), and `.previous' 4097 (*note Previous::). 4098 4099 This directive replaces the current section (and subsection) with 4100 the top section (and subsection) on the section stack. This section is 4101 popped off the stack. 4102 4103 4104 File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops 4105 4106 7.75 `.print STRING' 4107 ==================== 4108 4109 `as' will print STRING on the standard output during assembly. You 4110 must put STRING in double quotes. 4111 4112 4113 File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops 4114 4115 7.76 `.protected NAMES' 4116 ======================= 4117 4118 This is one of the ELF visibility directives. The other two are 4119 `.hidden' (*note Hidden::) and `.internal' (*note Internal::). 4120 4121 This directive overrides the named symbols default visibility (which 4122 is set by their binding: local, global or weak). The directive sets 4123 the visibility to `protected' which means that any references to the 4124 symbols from within the components that defines them must be resolved 4125 to the definition in that component, even if a definition in another 4126 component would normally preempt this. 4127 4128 4129 File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops 4130 4131 7.77 `.psize LINES , COLUMNS' 4132 ============================= 4133 4134 Use this directive to declare the number of lines--and, optionally, the 4135 number of columns--to use for each page, when generating listings. 4136 4137 If you do not use `.psize', listings use a default line-count of 60. 4138 You may omit the comma and COLUMNS specification; the default width is 4139 200 columns. 4140 4141 `as' generates formfeeds whenever the specified number of lines is 4142 exceeded (or whenever you explicitly request one, using `.eject'). 4143 4144 If you specify LINES as `0', no formfeeds are generated save those 4145 explicitly specified with `.eject'. 4146 4147 4148 File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops 4149 4150 7.78 `.purgem NAME' 4151 =================== 4152 4153 Undefine the macro NAME, so that later uses of the string will not be 4154 expanded. *Note Macro::. 4155 4156 4157 File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops 4158 4159 7.79 `.pushsection NAME , SUBSECTION' 4160 ===================================== 4161 4162 This is one of the ELF section stack manipulation directives. The 4163 others are `.section' (*note Section::), `.subsection' (*note 4164 SubSection::), `.popsection' (*note PopSection::), and `.previous' 4165 (*note Previous::). 4166 4167 This directive pushes the current section (and subsection) onto the 4168 top of the section stack, and then replaces the current section and 4169 subsection with `name' and `subsection'. 4170 4171 4172 File: as.info, Node: Quad, Next: Rept, Prev: PushSection, Up: Pseudo Ops 4173 4174 7.80 `.quad BIGNUMS' 4175 ==================== 4176 4177 `.quad' expects zero or more bignums, separated by commas. For each 4178 bignum, it emits an 8-byte integer. If the bignum won't fit in 8 4179 bytes, it prints a warning message; and just takes the lowest order 8 4180 bytes of the bignum. 4181 4182 The term "quad" comes from contexts in which a "word" is two bytes; 4183 hence _quad_-word for 8 bytes. 4184 4185 4186 File: as.info, Node: Rept, Next: Sbttl, Prev: Quad, Up: Pseudo Ops 4187 4188 7.81 `.rept COUNT' 4189 ================== 4190 4191 Repeat the sequence of lines between the `.rept' directive and the next 4192 `.endr' directive COUNT times. 4193 4194 For example, assembling 4195 4196 .rept 3 4197 .long 0 4198 .endr 4199 4200 is equivalent to assembling 4201 4202 .long 0 4203 .long 0 4204 .long 0 4205 4206 4207 File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops 4208 4209 7.82 `.sbttl "SUBHEADING"' 4210 ========================== 4211 4212 Use SUBHEADING as the title (third line, immediately after the title 4213 line) when generating assembly listings. 4214 4215 This directive affects subsequent pages, as well as the current page 4216 if it appears within ten lines of the top of a page. 4217 4218 4219 File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops 4220 4221 7.83 `.scl CLASS' 4222 ================= 4223 4224 Set the storage-class value for a symbol. This directive may only be 4225 used inside a `.def'/`.endef' pair. Storage class may flag whether a 4226 symbol is static or external, or it may record further symbolic 4227 debugging information. 4228 4229 4230 File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops 4231 4232 7.84 `.section NAME' 4233 ==================== 4234 4235 Use the `.section' directive to assemble the following code into a 4236 section named NAME. 4237 4238 This directive is only supported for targets that actually support 4239 arbitrarily named sections; on `a.out' targets, for example, it is not 4240 accepted, even with a standard `a.out' section name. 4241 4242 COFF Version 4243 ------------ 4244 4245 For COFF targets, the `.section' directive is used in one of the 4246 following ways: 4247 4248 .section NAME[, "FLAGS"] 4249 .section NAME[, SUBSEGMENT] 4250 4251 If the optional argument is quoted, it is taken as flags to use for 4252 the section. Each flag is a single character. The following flags are 4253 recognized: 4254 `b' 4255 bss section (uninitialized data) 4256 4257 `n' 4258 section is not loaded 4259 4260 `w' 4261 writable section 4262 4263 `d' 4264 data section 4265 4266 `r' 4267 read-only section 4268 4269 `x' 4270 executable section 4271 4272 `s' 4273 shared section (meaningful for PE targets) 4274 4275 `a' 4276 ignored. (For compatibility with the ELF version) 4277 4278 If no flags are specified, the default flags depend upon the section 4279 name. If the section name is not recognized, the default will be for 4280 the section to be loaded and writable. Note the `n' and `w' flags 4281 remove attributes from the section, rather than adding them, so if they 4282 are used on their own it will be as if no flags had been specified at 4283 all. 4284 4285 If the optional argument to the `.section' directive is not quoted, 4286 it is taken as a subsegment number (*note Sub-Sections::). 4287 4288 ELF Version 4289 ----------- 4290 4291 This is one of the ELF section stack manipulation directives. The 4292 others are `.subsection' (*note SubSection::), `.pushsection' (*note 4293 PushSection::), `.popsection' (*note PopSection::), and `.previous' 4294 (*note Previous::). 4295 4296 For ELF targets, the `.section' directive is used like this: 4297 4298 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]] 4299 4300 The optional FLAGS argument is a quoted string which may contain any 4301 combination of the following characters: 4302 `a' 4303 section is allocatable 4304 4305 `w' 4306 section is writable 4307 4308 `x' 4309 section is executable 4310 4311 `M' 4312 section is mergeable 4313 4314 `S' 4315 section contains zero terminated strings 4316 4317 `G' 4318 section is a member of a section group 4319 4320 `T' 4321 section is used for thread-local-storage 4322 4323 The optional TYPE argument may contain one of the following 4324 constants: 4325 `@progbits' 4326 section contains data 4327 4328 `@nobits' 4329 section does not contain data (i.e., section only occupies space) 4330 4331 `@note' 4332 section contains data which is used by things other than the 4333 program 4334 4335 `@init_array' 4336 section contains an array of pointers to init functions 4337 4338 `@fini_array' 4339 section contains an array of pointers to finish functions 4340 4341 `@preinit_array' 4342 section contains an array of pointers to pre-init functions 4343 4344 Many targets only support the first three section types. 4345 4346 Note on targets where the `@' character is the start of a comment (eg 4347 ARM) then another character is used instead. For example the ARM port 4348 uses the `%' character. 4349 4350 If FLAGS contains the `M' symbol then the TYPE argument must be 4351 specified as well as an extra argument - ENTSIZE - like this: 4352 4353 .section NAME , "FLAGS"M, @TYPE, ENTSIZE 4354 4355 Sections with the `M' flag but not `S' flag must contain fixed size 4356 constants, each ENTSIZE octets long. Sections with both `M' and `S' 4357 must contain zero terminated strings where each character is ENTSIZE 4358 bytes long. The linker may remove duplicates within sections with the 4359 same name, same entity size and same flags. ENTSIZE must be an 4360 absolute expression. 4361 4362 If FLAGS contains the `G' symbol then the TYPE argument must be 4363 present along with an additional field like this: 4364 4365 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE] 4366 4367 The GROUPNAME field specifies the name of the section group to which 4368 this particular section belongs. The optional linkage field can 4369 contain: 4370 `comdat' 4371 indicates that only one copy of this section should be retained 4372 4373 `.gnu.linkonce' 4374 an alias for comdat 4375 4376 Note - if both the M and G flags are present then the fields for the 4377 Merge flag should come first, like this: 4378 4379 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE] 4380 4381 If no flags are specified, the default flags depend upon the section 4382 name. If the section name is not recognized, the default will be for 4383 the section to have none of the above flags: it will not be allocated 4384 in memory, nor writable, nor executable. The section will contain data. 4385 4386 For ELF targets, the assembler supports another type of `.section' 4387 directive for compatibility with the Solaris assembler: 4388 4389 .section "NAME"[, FLAGS...] 4390 4391 Note that the section name is quoted. There may be a sequence of 4392 comma separated flags: 4393 `#alloc' 4394 section is allocatable 4395 4396 `#write' 4397 section is writable 4398 4399 `#execinstr' 4400 section is executable 4401 4402 `#tls' 4403 section is used for thread local storage 4404 4405 This directive replaces the current section and subsection. See the 4406 contents of the gas testsuite directory `gas/testsuite/gas/elf' for 4407 some examples of how this directive and the other section stack 4408 directives work. 4409 4410 4411 File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops 4412 4413 7.85 `.set SYMBOL, EXPRESSION' 4414 ============================== 4415 4416 Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and 4417 type to conform to EXPRESSION. If SYMBOL was flagged as external, it 4418 remains flagged (*note Symbol Attributes::). 4419 4420 You may `.set' a symbol many times in the same assembly. 4421 4422 If you `.set' a global symbol, the value stored in the object file 4423 is the last value stored into it. 4424 4425 The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'. 4426 4427 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION' 4428 instead. 4429 4430 4431 File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops 4432 4433 7.86 `.short EXPRESSIONS' 4434 ========================= 4435 4436 `.short' is normally the same as `.word'. *Note `.word': Word. 4437 4438 In some configurations, however, `.short' and `.word' generate 4439 numbers of different lengths; *note Machine Dependencies::. 4440 4441 4442 File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops 4443 4444 7.87 `.single FLONUMS' 4445 ====================== 4446 4447 This directive assembles zero or more flonums, separated by commas. It 4448 has the same effect as `.float'. The exact kind of floating point 4449 numbers emitted depends on how `as' is configured. *Note Machine 4450 Dependencies::. 4451 4452 4453 File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops 4454 4455 7.88 `.size' 4456 ============ 4457 4458 This directive is used to set the size associated with a symbol. 4459 4460 COFF Version 4461 ------------ 4462 4463 For COFF targets, the `.size' directive is only permitted inside 4464 `.def'/`.endef' pairs. It is used like this: 4465 4466 .size EXPRESSION 4467 4468 ELF Version 4469 ----------- 4470 4471 For ELF targets, the `.size' directive is used like this: 4472 4473 .size NAME , EXPRESSION 4474 4475 This directive sets the size associated with a symbol NAME. The 4476 size in bytes is computed from EXPRESSION which can make use of label 4477 arithmetic. This directive is typically used to set the size of 4478 function symbols. 4479 4480 4481 File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops 4482 4483 7.89 `.sleb128 EXPRESSIONS' 4484 =========================== 4485 4486 SLEB128 stands for "signed little endian base 128." This is a compact, 4487 variable length representation of numbers used by the DWARF symbolic 4488 debugging format. *Note `.uleb128': Uleb128. 4489 4490 4491 File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops 4492 4493 7.90 `.skip SIZE , FILL' 4494 ======================== 4495 4496 This directive emits SIZE bytes, each of value FILL. Both SIZE and 4497 FILL are absolute expressions. If the comma and FILL are omitted, FILL 4498 is assumed to be zero. This is the same as `.space'. 4499 4500 4501 File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops 4502 4503 7.91 `.space SIZE , FILL' 4504 ========================= 4505 4506 This directive emits SIZE bytes, each of value FILL. Both SIZE and 4507 FILL are absolute expressions. If the comma and FILL are omitted, FILL 4508 is assumed to be zero. This is the same as `.skip'. 4509 4510 _Warning:_ `.space' has a completely different meaning for HPPA 4511 targets; use `.block' as a substitute. See `HP9000 Series 800 4512 Assembly Language Reference Manual' (HP 92432-90001) for the 4513 meaning of the `.space' directive. *Note HPPA Assembler 4514 Directives: HPPA Directives, for a summary. 4515 4516 4517 File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops 4518 4519 7.92 `.stabd, .stabn, .stabs' 4520 ============================= 4521 4522 There are three directives that begin `.stab'. All emit symbols (*note 4523 Symbols::), for use by symbolic debuggers. The symbols are not entered 4524 in the `as' hash table: they cannot be referenced elsewhere in the 4525 source file. Up to five fields are required: 4526 4527 STRING 4528 This is the symbol's name. It may contain any character except 4529 `\000', so is more general than ordinary symbol names. Some 4530 debuggers used to code arbitrarily complex structures into symbol 4531 names using this field. 4532 4533 TYPE 4534 An absolute expression. The symbol's type is set to the low 8 4535 bits of this expression. Any bit pattern is permitted, but `ld' 4536 and debuggers choke on silly bit patterns. 4537 4538 OTHER 4539 An absolute expression. The symbol's "other" attribute is set to 4540 the low 8 bits of this expression. 4541 4542 DESC 4543 An absolute expression. The symbol's descriptor is set to the low 4544 16 bits of this expression. 4545 4546 VALUE 4547 An absolute expression which becomes the symbol's value. 4548 4549 If a warning is detected while reading a `.stabd', `.stabn', or 4550 `.stabs' statement, the symbol has probably already been created; you 4551 get a half-formed symbol in your object file. This is compatible with 4552 earlier assemblers! 4553 4554 `.stabd TYPE , OTHER , DESC' 4555 The "name" of the symbol generated is not even an empty string. 4556 It is a null pointer, for compatibility. Older assemblers used a 4557 null pointer so they didn't waste space in object files with empty 4558 strings. 4559 4560 The symbol's value is set to the location counter, relocatably. 4561 When your program is linked, the value of this symbol is the 4562 address of the location counter when the `.stabd' was assembled. 4563 4564 `.stabn TYPE , OTHER , DESC , VALUE' 4565 The name of the symbol is set to the empty string `""'. 4566 4567 `.stabs STRING , TYPE , OTHER , DESC , VALUE' 4568 All five fields are specified. 4569 4570 4571 File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops 4572 4573 7.93 `.string' "STR" 4574 ==================== 4575 4576 Copy the characters in STR to the object file. You may specify more 4577 than one string to copy, separated by commas. Unless otherwise 4578 specified for a particular machine, the assembler marks the end of each 4579 string with a 0 byte. You can use any of the escape sequences 4580 described in *Note Strings: Strings. 4581 4582 4583 File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops 4584 4585 7.94 `.struct EXPRESSION' 4586 ========================= 4587 4588 Switch to the absolute section, and set the section offset to 4589 EXPRESSION, which must be an absolute expression. You might use this 4590 as follows: 4591 .struct 0 4592 field1: 4593 .struct field1 + 4 4594 field2: 4595 .struct field2 + 4 4596 field3: 4597 This would define the symbol `field1' to have the value 0, the symbol 4598 `field2' to have the value 4, and the symbol `field3' to have the value 4599 8. Assembly would be left in the absolute section, and you would need 4600 to use a `.section' directive of some sort to change to some other 4601 section before further assembly. 4602 4603 4604 File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops 4605 4606 7.95 `.subsection NAME' 4607 ======================= 4608 4609 This is one of the ELF section stack manipulation directives. The 4610 others are `.section' (*note Section::), `.pushsection' (*note 4611 PushSection::), `.popsection' (*note PopSection::), and `.previous' 4612 (*note Previous::). 4613 4614 This directive replaces the current subsection with `name'. The 4615 current section is not changed. The replaced subsection is put onto 4616 the section stack in place of the then current top of stack subsection. 4617 4618 4619 File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops 4620 4621 7.96 `.symver' 4622 ============== 4623 4624 Use the `.symver' directive to bind symbols to specific version nodes 4625 within a source file. This is only supported on ELF platforms, and is 4626 typically used when assembling files to be linked into a shared library. 4627 There are cases where it may make sense to use this in objects to be 4628 bound into an application itself so as to override a versioned symbol 4629 from a shared library. 4630 4631 For ELF targets, the `.symver' directive can be used like this: 4632 .symver NAME, NAME2@NODENAME 4633 If the symbol NAME is defined within the file being assembled, the 4634 `.symver' directive effectively creates a symbol alias with the name 4635 NAME2@NODENAME, and in fact the main reason that we just don't try and 4636 create a regular alias is that the @ character isn't permitted in 4637 symbol names. The NAME2 part of the name is the actual name of the 4638 symbol by which it will be externally referenced. The name NAME itself 4639 is merely a name of convenience that is used so that it is possible to 4640 have definitions for multiple versions of a function within a single 4641 source file, and so that the compiler can unambiguously know which 4642 version of a function is being mentioned. The NODENAME portion of the 4643 alias should be the name of a node specified in the version script 4644 supplied to the linker when building a shared library. If you are 4645 attempting to override a versioned symbol from a shared library, then 4646 NODENAME should correspond to the nodename of the symbol you are trying 4647 to override. 4648 4649 If the symbol NAME is not defined within the file being assembled, 4650 all references to NAME will be changed to NAME2@NODENAME. If no 4651 reference to NAME is made, NAME2@NODENAME will be removed from the 4652 symbol table. 4653 4654 Another usage of the `.symver' directive is: 4655 .symver NAME, NAME2@@NODENAME 4656 In this case, the symbol NAME must exist and be defined within the 4657 file being assembled. It is similar to NAME2@NODENAME. The difference 4658 is NAME2@@NODENAME will also be used to resolve references to NAME2 by 4659 the linker. 4660 4661 The third usage of the `.symver' directive is: 4662 .symver NAME, NAME2@@@NODENAME 4663 When NAME is not defined within the file being assembled, it is 4664 treated as NAME2@NODENAME. When NAME is defined within the file being 4665 assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME. 4666 4667 4668 File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops 4669 4670 7.97 `.tag STRUCTNAME' 4671 ====================== 4672 4673 This directive is generated by compilers to include auxiliary debugging 4674 information in the symbol table. It is only permitted inside 4675 `.def'/`.endef' pairs. Tags are used to link structure definitions in 4676 the symbol table with instances of those structures. 4677 4678 4679 File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops 4680 4681 7.98 `.text SUBSECTION' 4682 ======================= 4683 4684 Tells `as' to assemble the following statements onto the end of the 4685 text subsection numbered SUBSECTION, which is an absolute expression. 4686 If SUBSECTION is omitted, subsection number zero is used. 4687 4688 4689 File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops 4690 4691 7.99 `.title "HEADING"' 4692 ======================= 4693 4694 Use HEADING as the title (second line, immediately after the source 4695 file name and pagenumber) when generating assembly listings. 4696 4697 This directive affects subsequent pages, as well as the current page 4698 if it appears within ten lines of the top of a page. 4699 4700 4701 File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops 4702 4703 7.100 `.type' 4704 ============= 4705 4706 This directive is used to set the type of a symbol. 4707 4708 COFF Version 4709 ------------ 4710 4711 For COFF targets, this directive is permitted only within 4712 `.def'/`.endef' pairs. It is used like this: 4713 4714 .type INT 4715 4716 This records the integer INT as the type attribute of a symbol table 4717 entry. 4718 4719 ELF Version 4720 ----------- 4721 4722 For ELF targets, the `.type' directive is used like this: 4723 4724 .type NAME , TYPE DESCRIPTION 4725 4726 This sets the type of symbol NAME to be either a function symbol or 4727 an object symbol. There are five different syntaxes supported for the 4728 TYPE DESCRIPTION field, in order to provide compatibility with various 4729 other assemblers. The syntaxes supported are: 4730 4731 .type <name>,#function 4732 .type <name>,#object 4733 4734 .type <name>,@function 4735 .type <name>,@object 4736 4737 .type <name>,%function 4738 .type <name>,%object 4739 4740 .type <name>,"function" 4741 .type <name>,"object" 4742 4743 .type <name> STT_FUNCTION 4744 .type <name> STT_OBJECT 4745 4746 4747 File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops 4748 4749 7.101 `.uleb128 EXPRESSIONS' 4750 ============================ 4751 4752 ULEB128 stands for "unsigned little endian base 128." This is a 4753 compact, variable length representation of numbers used by the DWARF 4754 symbolic debugging format. *Note `.sleb128': Sleb128. 4755 4756 4757 File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops 4758 4759 7.102 `.val ADDR' 4760 ================= 4761 4762 This directive, permitted only within `.def'/`.endef' pairs, records 4763 the address ADDR as the value attribute of a symbol table entry. 4764 4765 4766 File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops 4767 4768 7.103 `.version "STRING"' 4769 ========================= 4770 4771 This directive creates a `.note' section and places into it an ELF 4772 formatted note of type NT_VERSION. The note's name is set to `string'. 4773 4774 4775 File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops 4776 4777 7.104 `.vtable_entry TABLE, OFFSET' 4778 =================================== 4779 4780 This directive finds or creates a symbol `table' and creates a 4781 `VTABLE_ENTRY' relocation for it with an addend of `offset'. 4782 4783 4784 File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops 4785 4786 7.105 `.vtable_inherit CHILD, PARENT' 4787 ===================================== 4788 4789 This directive finds the symbol `child' and finds or creates the symbol 4790 `parent' and then creates a `VTABLE_INHERIT' relocation for the parent 4791 whose addend is the value of the child symbol. As a special case the 4792 parent name of `0' is treated as refering the `*ABS*' section. 4793 4794 4795 File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops 4796 4797 7.106 `.warning "STRING"' 4798 ========================= 4799 4800 Similar to the directive `.error' (*note `.error "STRING"': Error.), 4801 but just emits a warning. 4802 4803 4804 File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops 4805 4806 7.107 `.weak NAMES' 4807 =================== 4808 4809 This directive sets the weak attribute on the comma separated list of 4810 symbol `names'. If the symbols do not already exist, they will be 4811 created. 4812 4813 On COFF targets other than PE, weak symbols are a GNU extension. 4814 This directive sets the weak attribute on the comma separated list of 4815 symbol `names'. If the symbols do not already exist, they will be 4816 created. 4817 4818 On the PE target, weak symbols are supported natively as weak 4819 aliases. When a weak symbol is created that is not an alias, GAS 4820 creates an alternate symbol to hold the default value. 4821 4822 4823 File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops 4824 4825 7.108 `.weakref ALIAS, TARGET' 4826 ============================== 4827 4828 This directive creates an alias to the target symbol that enables the 4829 symbol to be referenced with weak-symbol semantics, but without 4830 actually making it weak. If direct references or definitions of the 4831 symbol are present, then the symbol will not be weak, but if all 4832 references to it are through weak references, the symbol will be marked 4833 as weak in the symbol table. 4834 4835 The effect is equivalent to moving all references to the alias to a 4836 separate assembly source file, renaming the alias to the symbol in it, 4837 declaring the symbol as weak there, and running a reloadable link to 4838 merge the object files resulting from the assembly of the new source 4839 file and the old source file that had the references to the alias 4840 removed. 4841 4842 The alias itself never makes to the symbol table, and is entirely 4843 handled within the assembler. 4844 4845 4846 File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops 4847 4848 7.109 `.word EXPRESSIONS' 4849 ========================= 4850 4851 This directive expects zero or more EXPRESSIONS, of any section, 4852 separated by commas. 4853 4854 The size of the number emitted, and its byte order, depend on what 4855 target computer the assembly is for. 4856 4857 _Warning: Special Treatment to support Compilers_ 4858 4859 Machines with a 32-bit address space, but that do less than 32-bit 4860 addressing, require the following special treatment. If the machine of 4861 interest to you does 32-bit addressing (or doesn't require it; *note 4862 Machine Dependencies::), you can ignore this issue. 4863 4864 In order to assemble compiler output into something that works, `as' 4865 occasionally does strange things to `.word' directives. Directives of 4866 the form `.word sym1-sym2' are often emitted by compilers as part of 4867 jump tables. Therefore, when `as' assembles a directive of the form 4868 `.word sym1-sym2', and the difference between `sym1' and `sym2' does 4869 not fit in 16 bits, `as' creates a "secondary jump table", immediately 4870 before the next label. This secondary jump table is preceded by a 4871 short-jump to the first byte after the secondary table. This 4872 short-jump prevents the flow of control from accidentally falling into 4873 the new table. Inside the table is a long-jump to `sym2'. The 4874 original `.word' contains `sym1' minus the address of the long-jump to 4875 `sym2'. 4876 4877 If there were several occurrences of `.word sym1-sym2' before the 4878 secondary jump table, all of them are adjusted. If there was a `.word 4879 sym3-sym4', that also did not fit in sixteen bits, a long-jump to 4880 `sym4' is included in the secondary jump table, and the `.word' 4881 directives are adjusted to contain `sym3' minus the address of the 4882 long-jump to `sym4'; and so on, for as many entries in the original 4883 jump table as necessary. 4884 4885 4886 File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops 4887 4888 7.110 Deprecated Directives 4889 =========================== 4890 4891 One day these directives won't work. They are included for 4892 compatibility with older assemblers. 4893 .abort 4894 4895 .line 4896 4897 4898 File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Pseudo Ops, Up: Top 4899 4900 8 Machine Dependent Features 4901 **************************** 4902 4903 The machine instruction sets are (almost by definition) different on 4904 each machine where `as' runs. Floating point representations vary as 4905 well, and `as' often supports a few additional directives or 4906 command-line options for compatibility with other assemblers on a 4907 particular platform. Finally, some versions of `as' support special 4908 pseudo-instructions for branch optimization. 4909 4910 This chapter discusses most of these differences, though it does not 4911 include details on any machine's instruction set. For details on that 4912 subject, see the hardware manufacturer's manual. 4913 4914 * Menu: 4915 4916 4917 * Alpha-Dependent:: Alpha Dependent Features 4918 4919 * ARC-Dependent:: ARC Dependent Features 4920 4921 * ARM-Dependent:: ARM Dependent Features 4922 4923 * BFIN-Dependent:: BFIN Dependent Features 4924 4925 * CRIS-Dependent:: CRIS Dependent Features 4926 4927 * D10V-Dependent:: D10V Dependent Features 4928 4929 * D30V-Dependent:: D30V Dependent Features 4930 4931 * H8/300-Dependent:: Renesas H8/300 Dependent Features 4932 4933 * HPPA-Dependent:: HPPA Dependent Features 4934 4935 * ESA/390-Dependent:: IBM ESA/390 Dependent Features 4936 4937 * i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features 4938 4939 * i860-Dependent:: Intel 80860 Dependent Features 4940 4941 * i960-Dependent:: Intel 80960 Dependent Features 4942 4943 * IA-64-Dependent:: Intel IA-64 Dependent Features 4944 4945 * IP2K-Dependent:: IP2K Dependent Features 4946 4947 * M32C-Dependent:: M32C Dependent Features 4948 4949 * M32R-Dependent:: M32R Dependent Features 4950 4951 * M68K-Dependent:: M680x0 Dependent Features 4952 4953 * M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features 4954 4955 * MIPS-Dependent:: MIPS Dependent Features 4956 4957 * MMIX-Dependent:: MMIX Dependent Features 4958 4959 * MSP430-Dependent:: MSP430 Dependent Features 4960 4961 * SH-Dependent:: Renesas / SuperH SH Dependent Features 4962 * SH64-Dependent:: SuperH SH64 Dependent Features 4963 4964 * PDP-11-Dependent:: PDP-11 Dependent Features 4965 4966 * PJ-Dependent:: picoJava Dependent Features 4967 4968 * PPC-Dependent:: PowerPC Dependent Features 4969 4970 * Sparc-Dependent:: SPARC Dependent Features 4971 4972 * TIC54X-Dependent:: TI TMS320C54x Dependent Features 4973 4974 * V850-Dependent:: V850 Dependent Features 4975 4976 * Xtensa-Dependent:: Xtensa Dependent Features 4977 4978 * Z80-Dependent:: Z80 Dependent Features 4979 4980 * Z8000-Dependent:: Z8000 Dependent Features 4981 4982 * Vax-Dependent:: VAX Dependent Features 4983 4984 4985 File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Up: Machine Dependencies 4986 4987 8.1 Alpha Dependent Features 4988 ============================ 4989 4990 * Menu: 4991 4992 * Alpha Notes:: Notes 4993 * Alpha Options:: Options 4994 * Alpha Syntax:: Syntax 4995 * Alpha Floating Point:: Floating Point 4996 * Alpha Directives:: Alpha Machine Directives 4997 * Alpha Opcodes:: Opcodes 4998 4999 5000 File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent 5001 5002 8.1.1 Notes 5003 ----------- 5004 5005 The documentation here is primarily for the ELF object format. `as' 5006 also supports the ECOFF and EVAX formats, but features specific to 5007 these formats are not yet documented. 5008 5009 5010 File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent 5011 5012 8.1.2 Options 5013 ------------- 5014 5015 `-mCPU' 5016 This option specifies the target processor. If an attempt is made 5017 to assemble an instruction which will not execute on the target 5018 processor, the assembler may either expand the instruction as a 5019 macro or issue an error message. This option is equivalent to the 5020 `.arch' directive. 5021 5022 The following processor names are recognized: `21064', `21064a', 5023 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a', 5024 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6', 5025 `ev67', `ev68'. The special name `all' may be used to allow the 5026 assembler to accept instructions valid for any Alpha processor. 5027 5028 In order to support existing practice in OSF/1 with respect to 5029 `.arch', and existing practice within `MILO' (the Linux ARC 5030 bootloader), the numbered processor names (e.g. 21064) enable the 5031 processor-specific PALcode instructions, while the 5032 "electro-vlasic" names (e.g. `ev4') do not. 5033 5034 `-mdebug' 5035 `-no-mdebug' 5036 Enables or disables the generation of `.mdebug' encapsulation for 5037 stabs directives and procedure descriptors. The default is to 5038 automatically enable `.mdebug' when the first stabs directive is 5039 seen. 5040 5041 `-relax' 5042 This option forces all relocations to be put into the object file, 5043 instead of saving space and resolving some relocations at assembly 5044 time. Note that this option does not propagate all symbol 5045 arithmetic into the object file, because not all symbol arithmetic 5046 can be represented. However, the option can still be useful in 5047 specific applications. 5048 5049 `-g' 5050 This option is used when the compiler generates debug information. 5051 When `gcc' is using `mips-tfile' to generate debug information 5052 for ECOFF, local labels must be passed through to the object file. 5053 Otherwise this option has no effect. 5054 5055 `-GSIZE' 5056 A local common symbol larger than SIZE is placed in `.bss', while 5057 smaller symbols are placed in `.sbss'. 5058 5059 `-F' 5060 `-32addr' 5061 These options are ignored for backward compatibility. 5062 5063 5064 File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent 5065 5066 8.1.3 Syntax 5067 ------------ 5068 5069 The assembler syntax closely follow the Alpha Reference Manual; 5070 assembler directives and general syntax closely follow the OSF/1 and 5071 OpenVMS syntax, with a few differences for ELF. 5072 5073 * Menu: 5074 5075 * Alpha-Chars:: Special Characters 5076 * Alpha-Regs:: Register Names 5077 * Alpha-Relocs:: Relocations 5078 5079 5080 File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax 5081 5082 8.1.3.1 Special Characters 5083 .......................... 5084 5085 `#' is the line comment character. 5086 5087 `;' can be used instead of a newline to separate statements. 5088 5089 5090 File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax 5091 5092 8.1.3.2 Register Names 5093 ...................... 5094 5095 The 32 integer registers are referred to as `$N' or `$rN'. In 5096 addition, registers 15, 28, 29, and 30 may be referred to by the 5097 symbols `$fp', `$at', `$gp', and `$sp' respectively. 5098 5099 The 32 floating-point registers are referred to as `$fN'. 5100 5101 5102 File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax 5103 5104 8.1.3.3 Relocations 5105 ................... 5106 5107 Some of these relocations are available for ECOFF, but mostly only for 5108 ELF. They are modeled after the relocation format introduced in 5109 Digital Unix 4.0, but there are additions. 5110 5111 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the 5112 relocation. In some cases NUMBER is used to relate specific 5113 instructions. 5114 5115 The relocation is placed at the end of the instruction like so: 5116 5117 ldah $0,a($29) !gprelhigh 5118 lda $0,a($0) !gprellow 5119 ldq $1,b($29) !literal!100 5120 ldl $2,0($1) !lituse_base!100 5121 5122 `!literal' 5123 `!literal!N' 5124 Used with an `ldq' instruction to load the address of a symbol 5125 from the GOT. 5126 5127 A sequence number N is optional, and if present is used to pair 5128 `lituse' relocations with this `literal' relocation. The `lituse' 5129 relocations are used by the linker to optimize the code based on 5130 the final location of the symbol. 5131 5132 Note that these optimizations are dependent on the data flow of the 5133 program. Therefore, if _any_ `lituse' is paired with a `literal' 5134 relocation, then _all_ uses of the register set by the `literal' 5135 instruction must also be marked with `lituse' relocations. This 5136 is because the original `literal' instruction may be deleted or 5137 transformed into another instruction. 5138 5139 Also note that there may be a one-to-many relationship between 5140 `literal' and `lituse', but not a many-to-one. That is, if there 5141 are two code paths that load up the same address and feed the 5142 value to a single use, then the use may not use a `lituse' 5143 relocation. 5144 5145 `!lituse_base!N' 5146 Used with any memory format instruction (e.g. `ldl') to indicate 5147 that the literal is used for an address load. The offset field of 5148 the instruction must be zero. During relaxation, the code may be 5149 altered to use a gp-relative load. 5150 5151 `!lituse_jsr!N' 5152 Used with a register branch format instruction (e.g. `jsr') to 5153 indicate that the literal is used for a call. During relaxation, 5154 the code may be altered to use a direct branch (e.g. `bsr'). 5155 5156 `!lituse_jsrdirect!N' 5157 Similar to `lituse_jsr', but also that this call cannot be vectored 5158 through a PLT entry. This is useful for functions with special 5159 calling conventions which do not allow the normal call-clobbered 5160 registers to be clobbered. 5161 5162 `!lituse_bytoff!N' 5163 Used with a byte mask instruction (e.g. `extbl') to indicate that 5164 only the low 3 bits of the address are relevant. During 5165 relaxation, the code may be altered to use an immediate instead of 5166 a register shift. 5167 5168 `!lituse_addr!N' 5169 Used with any other instruction to indicate that the original 5170 address is in fact used, and the original `ldq' instruction may 5171 not be altered or deleted. This is useful in conjunction with 5172 `lituse_jsr' to test whether a weak symbol is defined. 5173 5174 ldq $27,foo($29) !literal!1 5175 beq $27,is_undef !lituse_addr!1 5176 jsr $26,($27),foo !lituse_jsr!1 5177 5178 `!lituse_tlsgd!N' 5179 Used with a register branch format instruction to indicate that the 5180 literal is the call to `__tls_get_addr' used to compute the 5181 address of the thread-local storage variable whose descriptor was 5182 loaded with `!tlsgd!N'. 5183 5184 `!lituse_tlsldm!N' 5185 Used with a register branch format instruction to indicate that the 5186 literal is the call to `__tls_get_addr' used to compute the 5187 address of the base of the thread-local storage block for the 5188 current module. The descriptor for the module must have been 5189 loaded with `!tlsldm!N'. 5190 5191 `!gpdisp!N' 5192 Used with `ldah' and `lda' to load the GP from the current 5193 address, a-la the `ldgp' macro. The source register for the 5194 `ldah' instruction must contain the address of the `ldah' 5195 instruction. There must be exactly one `lda' instruction paired 5196 with the `ldah' instruction, though it may appear anywhere in the 5197 instruction stream. The immediate operands must be zero. 5198 5199 bsr $26,foo 5200 ldah $29,0($26) !gpdisp!1 5201 lda $29,0($29) !gpdisp!1 5202 5203 `!gprelhigh' 5204 Used with an `ldah' instruction to add the high 16 bits of a 5205 32-bit displacement from the GP. 5206 5207 `!gprellow' 5208 Used with any memory format instruction to add the low 16 bits of a 5209 32-bit displacement from the GP. 5210 5211 `!gprel' 5212 Used with any memory format instruction to add a 16-bit 5213 displacement from the GP. 5214 5215 `!samegp' 5216 Used with any branch format instruction to skip the GP load at the 5217 target address. The referenced symbol must have the same GP as the 5218 source object file, and it must be declared to either not use `$27' 5219 or perform a standard GP load in the first two instructions via the 5220 `.prologue' directive. 5221 5222 `!tlsgd' 5223 `!tlsgd!N' 5224 Used with an `lda' instruction to load the address of a TLS 5225 descriptor for a symbol in the GOT. 5226 5227 The sequence number N is optional, and if present it used to pair 5228 the descriptor load with both the `literal' loading the address of 5229 the `__tls_get_addr' function and the `lituse_tlsgd' marking the 5230 call to that function. 5231 5232 For proper relaxation, both the `tlsgd', `literal' and `lituse' 5233 relocations must be in the same extended basic block. That is, 5234 the relocation with the lowest address must be executed first at 5235 runtime. 5236 5237 `!tlsldm' 5238 `!tlsldm!N' 5239 Used with an `lda' instruction to load the address of a TLS 5240 descriptor for the current module in the GOT. 5241 5242 Similar in other respects to `tlsgd'. 5243 5244 `!gotdtprel' 5245 Used with an `ldq' instruction to load the offset of the TLS 5246 symbol within its module's thread-local storage block. Also known 5247 as the dynamic thread pointer offset or dtp-relative offset. 5248 5249 `!dtprelhi' 5250 `!dtprello' 5251 `!dtprel' 5252 Like `gprel' relocations except they compute dtp-relative offsets. 5253 5254 `!gottprel' 5255 Used with an `ldq' instruction to load the offset of the TLS 5256 symbol from the thread pointer. Also known as the tp-relative 5257 offset. 5258 5259 `!tprelhi' 5260 `!tprello' 5261 `!tprel' 5262 Like `gprel' relocations except they compute tp-relative offsets. 5263 5264 5265 File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent 5266 5267 8.1.4 Floating Point 5268 -------------------- 5269 5270 The Alpha family uses both IEEE and VAX floating-point numbers. 5271 5272 5273 File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent 5274 5275 8.1.5 Alpha Assembler Directives 5276 -------------------------------- 5277 5278 `as' for the Alpha supports many additional directives for 5279 compatibility with the native assembler. This section describes them 5280 only briefly. 5281 5282 These are the additional directives in `as' for the Alpha: 5283 5284 `.arch CPU' 5285 Specifies the target processor. This is equivalent to the `-mCPU' 5286 command-line option. *Note Options: Alpha Options, for a list of 5287 values for CPU. 5288 5289 `.ent FUNCTION[, N]' 5290 Mark the beginning of FUNCTION. An optional number may follow for 5291 compatibility with the OSF/1 assembler, but is ignored. When 5292 generating `.mdebug' information, this will create a procedure 5293 descriptor for the function. In ELF, it will mark the symbol as a 5294 function a-la the generic `.type' directive. 5295 5296 `.end FUNCTION' 5297 Mark the end of FUNCTION. In ELF, it will set the size of the 5298 symbol a-la the generic `.size' directive. 5299 5300 `.mask MASK, OFFSET' 5301 Indicate which of the integer registers are saved in the current 5302 function's stack frame. MASK is interpreted a bit mask in which 5303 bit N set indicates that register N is saved. The registers are 5304 saved in a block located OFFSET bytes from the "canonical frame 5305 address" (CFA) which is the value of the stack pointer on entry to 5306 the function. The registers are saved sequentially, except that 5307 the return address register (normally `$26') is saved first. 5308 5309 This and the other directives that describe the stack frame are 5310 currently only used when generating `.mdebug' information. They 5311 may in the future be used to generate DWARF2 `.debug_frame' unwind 5312 information for hand written assembly. 5313 5314 `.fmask MASK, OFFSET' 5315 Indicate which of the floating-point registers are saved in the 5316 current stack frame. The MASK and OFFSET parameters are 5317 interpreted as with `.mask'. 5318 5319 `.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]' 5320 Describes the shape of the stack frame. The frame pointer in use 5321 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame 5322 pointer is FRAMEOFFSET bytes below the CFA. The return address is 5323 initially located in RETREG until it is saved as indicated in 5324 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET 5325 parameter is accepted and ignored. It is believed to indicate the 5326 offset from the CFA to the saved argument registers. 5327 5328 `.prologue N' 5329 Indicate that the stack frame is set up and all registers have been 5330 spilled. The argument N indicates whether and how the function 5331 uses the incoming "procedure vector" (the address of the called 5332 function) in `$27'. 0 indicates that `$27' is not used; 1 5333 indicates that the first two instructions of the function use `$27' 5334 to perform a load of the GP register; 2 indicates that `$27' is 5335 used in some non-standard way and so the linker cannot elide the 5336 load of the procedure vector during relaxation. 5337 5338 `.usepv FUNCTION, WHICH' 5339 Used to indicate the use of the `$27' register, similar to 5340 `.prologue', but without the other semantics of needing to be 5341 inside an open `.ent'/`.end' block. 5342 5343 The WHICH argument should be either `no', indicating that `$27' is 5344 not used, or `std', indicating that the first two instructions of 5345 the function perform a GP load. 5346 5347 One might use this directive instead of `.prologue' if you are 5348 also using dwarf2 CFI directives. 5349 5350 `.gprel32 EXPRESSION' 5351 Computes the difference between the address in EXPRESSION and the 5352 GP for the current object file, and stores it in 4 bytes. In 5353 addition to being smaller than a full 8 byte address, this also 5354 does not require a dynamic relocation when used in a shared 5355 library. 5356 5357 `.t_floating EXPRESSION' 5358 Stores EXPRESSION as an IEEE double precision value. 5359 5360 `.s_floating EXPRESSION' 5361 Stores EXPRESSION as an IEEE single precision value. 5362 5363 `.f_floating EXPRESSION' 5364 Stores EXPRESSION as a VAX F format value. 5365 5366 `.g_floating EXPRESSION' 5367 Stores EXPRESSION as a VAX G format value. 5368 5369 `.d_floating EXPRESSION' 5370 Stores EXPRESSION as a VAX D format value. 5371 5372 `.set FEATURE' 5373 Enables or disables various assembler features. Using the positive 5374 name of the feature enables while using `noFEATURE' disables. 5375 5376 `at' 5377 Indicates that macro expansions may clobber the "assembler 5378 temporary" (`$at' or `$28') register. Some macros may not be 5379 expanded without this and will generate an error message if 5380 `noat' is in effect. When `at' is in effect, a warning will 5381 be generated if `$at' is used by the programmer. 5382 5383 `macro' 5384 Enables the expansion of macro instructions. Note that 5385 variants of real instructions, such as `br label' vs `br 5386 $31,label' are considered alternate forms and not macros. 5387 5388 `move' 5389 `reorder' 5390 `volatile' 5391 These control whether and how the assembler may re-order 5392 instructions. Accepted for compatibility with the OSF/1 5393 assembler, but `as' does not do instruction scheduling, so 5394 these features are ignored. 5395 5396 The following directives are recognized for compatibility with the 5397 OSF/1 assembler but are ignored. 5398 5399 .proc .aproc 5400 .reguse .livereg 5401 .option .aent 5402 .ugen .eflag 5403 .alias .noalias 5404 5405 5406 File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent 5407 5408 8.1.6 Opcodes 5409 ------------- 5410 5411 For detailed information on the Alpha machine instruction set, see the 5412 Alpha Architecture Handbook 5413 (ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf). 5414 5415 5416 File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies 5417 5418 8.2 ARC Dependent Features 5419 ========================== 5420 5421 * Menu: 5422 5423 * ARC Options:: Options 5424 * ARC Syntax:: Syntax 5425 * ARC Floating Point:: Floating Point 5426 * ARC Directives:: ARC Machine Directives 5427 * ARC Opcodes:: Opcodes 5428 5429 5430 File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent 5431 5432 8.2.1 Options 5433 ------------- 5434 5435 `-marc[5|6|7|8]' 5436 This option selects the core processor variant. Using `-marc' is 5437 the same as `-marc6', which is also the default. 5438 5439 `arc5' 5440 Base instruction set. 5441 5442 `arc6' 5443 Jump-and-link (jl) instruction. No requirement of an 5444 instruction between setting flags and conditional jump. For 5445 example: 5446 5447 mov.f r0,r1 5448 beq foo 5449 5450 `arc7' 5451 Break (brk) and sleep (sleep) instructions. 5452 5453 `arc8' 5454 Software interrupt (swi) instruction. 5455 5456 5457 Note: the `.option' directive can to be used to select a core 5458 variant from within assembly code. 5459 5460 `-EB' 5461 This option specifies that the output generated by the assembler 5462 should be marked as being encoded for a big-endian processor. 5463 5464 `-EL' 5465 This option specifies that the output generated by the assembler 5466 should be marked as being encoded for a little-endian processor - 5467 this is the default. 5468 5469 5470 5471 File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent 5472 5473 8.2.2 Syntax 5474 ------------ 5475 5476 * Menu: 5477 5478 * ARC-Chars:: Special Characters 5479 * ARC-Regs:: Register Names 5480 5481 5482 File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax 5483 5484 8.2.2.1 Special Characters 5485 .......................... 5486 5487 *TODO* 5488 5489 5490 File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax 5491 5492 8.2.2.2 Register Names 5493 ...................... 5494 5495 *TODO* 5496 5497 5498 File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent 5499 5500 8.2.3 Floating Point 5501 -------------------- 5502 5503 The ARC core does not currently have hardware floating point support. 5504 Software floating point support is provided by `GCC' and uses IEEE 5505 floating-point numbers. 5506 5507 5508 File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent 5509 5510 8.2.4 ARC Machine Directives 5511 ---------------------------- 5512 5513 The ARC version of `as' supports the following additional machine 5514 directives: 5515 5516 `.2byte EXPRESSIONS' 5517 *TODO* 5518 5519 `.3byte EXPRESSIONS' 5520 *TODO* 5521 5522 `.4byte EXPRESSIONS' 5523 *TODO* 5524 5525 `.extAuxRegister NAME,ADDRESS,MODE' 5526 The ARCtangent A4 has extensible auxiliary register space. The 5527 auxiliary registers can be defined in the assembler source code by 5528 using this directive. The first parameter is the NAME of the new 5529 auxiallry register. The second parameter is the ADDRESS of the 5530 register in the auxiliary register memory map for the variant of 5531 the ARC. The third parameter specifies the MODE in which the 5532 register can be operated is and it can be one of: 5533 5534 `r (readonly)' 5535 5536 `w (write only)' 5537 5538 `r|w (read or write)' 5539 5540 For example: 5541 5542 .extAuxRegister mulhi,0x12,w 5543 5544 This specifies an extension auxiliary register called _mulhi_ 5545 which is at address 0x12 in the memory space and which is only 5546 writable. 5547 5548 `.extCondCode SUFFIX,VALUE' 5549 The condition codes on the ARCtangent A4 are extensible and can be 5550 specified by means of this assembler directive. They are specified 5551 by the suffix and the value for the condition code. They can be 5552 used to specify extra condition codes with any values. For 5553 example: 5554 5555 .extCondCode is_busy,0x14 5556 5557 add.is_busy r1,r2,r3 5558 bis_busy _main 5559 5560 `.extCoreRegister NAME,REGNUM,MODE,SHORTCUT' 5561 Specifies an extension core register NAME for the application. 5562 This allows a register NAME with a valid REGNUM between 0 and 60, 5563 with the following as valid values for MODE 5564 5565 `_r_ (readonly)' 5566 5567 `_w_ (write only)' 5568 5569 `_r|w_ (read or write)' 5570 5571 The other parameter gives a description of the register having a 5572 SHORTCUT in the pipeline. The valid values are: 5573 5574 `can_shortcut' 5575 5576 `cannot_shortcut' 5577 5578 For example: 5579 5580 .extCoreRegister mlo,57,r,can_shortcut 5581 5582 This defines an extension core register mlo with the value 57 which 5583 can shortcut the pipeline. 5584 5585 `.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS' 5586 The ARCtangent A4 allows the user to specify extension 5587 instructions. The extension instructions are not macros. The 5588 assembler creates encodings for use of these instructions 5589 according to the specification by the user. The parameters are: 5590 5591 *NAME 5592 Name of the extension instruction 5593 5594 *OPCODE 5595 Opcode to be used. (Bits 27:31 in the encoding). Valid values 5596 0x10-0x1f or 0x03 5597 5598 *SUBOPCODE 5599 Subopcode to be used. Valid values are from 0x09-0x3f. 5600 However the correct value also depends on SYNTAXCLASS 5601 5602 *SUFFIXCLASS 5603 Determines the kinds of suffixes to be allowed. Valid values 5604 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which 5605 indicates the absence or presence of conditional suffixes and 5606 flag setting by the extension instruction. It is also 5607 possible to specify that an instruction sets the flags and is 5608 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'. 5609 5610 *SYNTAXCLASS 5611 Determines the syntax class for the instruction. It can have 5612 the following values: 5613 5614 ``SYNTAX_2OP':' 5615 2 Operand Instruction 5616 5617 ``SYNTAX_3OP':' 5618 3 Operand Instruction 5619 5620 In addition there could be modifiers for the syntax class as 5621 described below: 5622 5623 Syntax Class Modifiers are: 5624 5625 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP, 5626 specifying that the first operand of a three-operand 5627 instruction must be an immediate (i.e. the result is 5628 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it 5629 with SYNTAX_3OP as given in the example below. This 5630 could usually be used to set the flags using specific 5631 instructions and not retain results. 5632 5633 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it 5634 specifies that there is an implied immediate destination 5635 operand which does not appear in the syntax. For 5636 example, if the source code contains an instruction like: 5637 5638 inst r1,r2 5639 5640 it really means that the first argument is an implied 5641 immediate (that is, the result is discarded). This is 5642 the same as though the source code were: inst 0,r1,r2. 5643 You use OP1_IMM_IMPLIED by bitwise ORing it with 5644 SYNTAX_20P. 5645 5646 5647 For example, defining 64-bit multiplier with immediate operands: 5648 5649 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG , 5650 SYNTAX_3OP|OP1_MUST_BE_IMM 5651 5652 The above specifies an extension instruction called mp64 which has 5653 3 operands, sets the flags, can be used with a condition code, for 5654 which the first operand is an immediate. (Equivalent to 5655 discarding the result of the operation). 5656 5657 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED 5658 5659 This describes a 2 operand instruction with an implicit first 5660 immediate operand. The result of this operation would be 5661 discarded. 5662 5663 `.half EXPRESSIONS' 5664 *TODO* 5665 5666 `.long EXPRESSIONS' 5667 *TODO* 5668 5669 `.option ARC|ARC5|ARC6|ARC7|ARC8' 5670 The `.option' directive must be followed by the desired core 5671 version. Again `arc' is an alias for `arc6'. 5672 5673 Note: the `.option' directive overrides the command line option 5674 `-marc'; a warning is emitted when the version is not consistent 5675 between the two - even for the implicit default core version 5676 (arc6). 5677 5678 `.short EXPRESSIONS' 5679 *TODO* 5680 5681 `.word EXPRESSIONS' 5682 *TODO* 5683 5684 5685 5686 File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent 5687 5688 8.2.5 Opcodes 5689 ------------- 5690 5691 For information on the ARC instruction set, see `ARC Programmers 5692 Reference Manual', ARC International (www.arc.com) 5693 5694 5695 File: as.info, Node: ARM-Dependent, Next: BFIN-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies 5696 5697 8.3 ARM Dependent Features 5698 ========================== 5699 5700 * Menu: 5701 5702 * ARM Options:: Options 5703 * ARM Syntax:: Syntax 5704 * ARM Floating Point:: Floating Point 5705 * ARM Directives:: ARM Machine Directives 5706 * ARM Opcodes:: Opcodes 5707 * ARM Mapping Symbols:: Mapping Symbols 5708 5709 5710 File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent 5711 5712 8.3.1 Options 5713 ------------- 5714 5715 `-mcpu=PROCESSOR[+EXTENSION...]' 5716 This option specifies the target processor. The assembler will 5717 issue an error message if an attempt is made to assemble an 5718 instruction which will not execute on the target processor. The 5719 following processor names are recognized: `arm1', `arm2', `arm250', 5720 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7', 5721 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700', 5722 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t', 5723 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi', 5724 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1', 5725 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920', 5726 `arm920t', `arm922t', `arm940t', `arm9tdmi', `arm9e', `arm926e', 5727 `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s', `arm966e-r0', 5728 `arm966e', `arm966e-s', `arm968e-s', `arm10t', `arm10tdmi', 5729 `arm10e', `arm1020', `arm1020t', `arm1020e', `arm1022e', 5730 `arm1026ej-s', `arm1136j-s', `arm1136jf-s', `arm1156t2-s', 5731 `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', `mpcore', 5732 `mpcorenovfp', `cortex-a8', `cortex-r4', `cortex-m3', `ep9312' 5733 (ARM920 with Cirrus Maverick coprocessor), `i80200' (Intel XScale 5734 processor) `iwmmxt' (Intel(r) XScale processor with Wireless 5735 MMX(tm) technology coprocessor) and `xscale'. The special name 5736 `all' may be used to allow the assembler to accept instructions 5737 valid for any ARM processor. 5738 5739 In addition to the basic instruction set, the assembler can be 5740 told to accept various extension mnemonics that extend the 5741 processor using the co-processor instruction space. For example, 5742 `-mcpu=arm920+maverick' is equivalent to specifying 5743 `-mcpu=ep9312'. The following extensions are currently supported: 5744 `+maverick' `+iwmmxt' and `+xscale'. 5745 5746 `-march=ARCHITECTURE[+EXTENSION...]' 5747 This option specifies the target architecture. The assembler will 5748 issue an error message if an attempt is made to assemble an 5749 instruction which will not execute on the target architecture. 5750 The following architecture names are recognized: `armv1', `armv2', 5751 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm', 5752 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te', 5753 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk', 5754 `armv7', `armv7a', `armv7r', `armv7m', `iwmmxt' and `xscale'. If 5755 both `-mcpu' and `-march' are specified, the assembler will use 5756 the setting for `-mcpu'. 5757 5758 The architecture option can be extended with the same instruction 5759 set extension options as the `-mcpu' option. 5760 5761 `-mfpu=FLOATING-POINT-FORMAT' 5762 This option specifies the floating point format to assemble for. 5763 The assembler will issue an error message if an attempt is made to 5764 assemble an instruction which will not execute on the target 5765 floating point unit. The following format options are recognized: 5766 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11', 5767 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0', 5768 `vfp9', `vfpxd', `arm1020t', `arm1020e', `arm1136jf-s' and 5769 `maverick'. 5770 5771 In addition to determining which instructions are assembled, this 5772 option also affects the way in which the `.double' assembler 5773 directive behaves when assembling little-endian code. 5774 5775 The default is dependent on the processor selected. For 5776 Architecture 5 or later, the default is to assembler for VFP 5777 instructions; for earlier architectures the default is to assemble 5778 for FPA instructions. 5779 5780 `-mthumb' 5781 This option specifies that the assembler should start assembling 5782 Thumb instructions; that is, it should behave as though the file 5783 starts with a `.code 16' directive. 5784 5785 `-mthumb-interwork' 5786 This option specifies that the output generated by the assembler 5787 should be marked as supporting interworking. 5788 5789 `-mapcs `[26|32]'' 5790 This option specifies that the output generated by the assembler 5791 should be marked as supporting the indicated version of the Arm 5792 Procedure. Calling Standard. 5793 5794 `-matpcs' 5795 This option specifies that the output generated by the assembler 5796 should be marked as supporting the Arm/Thumb Procedure Calling 5797 Standard. If enabled this option will cause the assembler to 5798 create an empty debugging section in the object file called 5799 .arm.atpcs. Debuggers can use this to determine the ABI being 5800 used by. 5801 5802 `-mapcs-float' 5803 This indicates the floating point variant of the APCS should be 5804 used. In this variant floating point arguments are passed in FP 5805 registers rather than integer registers. 5806 5807 `-mapcs-reentrant' 5808 This indicates that the reentrant variant of the APCS should be 5809 used. This variant supports position independent code. 5810 5811 `-mfloat-abi=ABI' 5812 This option specifies that the output generated by the assembler 5813 should be marked as using specified floating point ABI. The 5814 following values are recognized: `soft', `softfp' and `hard'. 5815 5816 `-meabi=VER' 5817 This option specifies which EABI version the produced object files 5818 should conform to. The following values are recognised: `gnu', `4' 5819 and `5'. 5820 5821 `-EB' 5822 This option specifies that the output generated by the assembler 5823 should be marked as being encoded for a big-endian processor. 5824 5825 `-EL' 5826 This option specifies that the output generated by the assembler 5827 should be marked as being encoded for a little-endian processor. 5828 5829 `-k' 5830 This option specifies that the output of the assembler should be 5831 marked as position-independent code (PIC). 5832 5833 5834 5835 File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent 5836 5837 8.3.2 Syntax 5838 ------------ 5839 5840 * Menu: 5841 5842 * ARM-Chars:: Special Characters 5843 * ARM-Regs:: Register Names 5844 5845 5846 File: as.info, Node: ARM-Chars, Next: ARM-Regs, Up: ARM Syntax 5847 5848 8.3.2.1 Special Characters 5849 .......................... 5850 5851 The presence of a `@' on a line indicates the start of a comment that 5852 extends to the end of the current line. If a `#' appears as the first 5853 character of a line, the whole line is treated as a comment. 5854 5855 The `;' character can be used instead of a newline to separate 5856 statements. 5857 5858 Either `#' or `$' can be used to indicate immediate operands. 5859 5860 *TODO* Explain about /data modifier on symbols. 5861 5862 5863 File: as.info, Node: ARM-Regs, Prev: ARM-Chars, Up: ARM Syntax 5864 5865 8.3.2.2 Register Names 5866 ...................... 5867 5868 *TODO* Explain about ARM register naming, and the predefined names. 5869 5870 5871 File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent 5872 5873 8.3.3 Floating Point 5874 -------------------- 5875 5876 The ARM family uses IEEE floating-point numbers. 5877 5878 5879 File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent 5880 5881 8.3.4 ARM Machine Directives 5882 ---------------------------- 5883 5884 `.align EXPRESSION [, EXPRESSION]' 5885 This is the generic .ALIGN directive. For the ARM however if the 5886 first argument is zero (ie no alignment is needed) the assembler 5887 will behave as if the argument had been 2 (ie pad to the next four 5888 byte boundary). This is for compatibility with ARM's own 5889 assembler. 5890 5891 `NAME .req REGISTER NAME' 5892 This creates an alias for REGISTER NAME called NAME. For example: 5893 5894 foo .req r0 5895 5896 `.unreq ALIAS-NAME' 5897 This undefines a register alias which was previously defined using 5898 the `req' directive. For example: 5899 5900 foo .req r0 5901 .unreq foo 5902 5903 An error occurs if the name is undefined. Note - this pseudo op 5904 can be used to delete builtin in register name aliases (eg 'r0'). 5905 This should only be done if it is really necessary. 5906 5907 `.code `[16|32]'' 5908 This directive selects the instruction set being generated. The 5909 value 16 selects Thumb, with the value 32 selecting ARM. 5910 5911 `.thumb' 5912 This performs the same action as .CODE 16. 5913 5914 `.arm' 5915 This performs the same action as .CODE 32. 5916 5917 `.force_thumb' 5918 This directive forces the selection of Thumb instructions, even if 5919 the target processor does not support those instructions 5920 5921 `.thumb_func' 5922 This directive specifies that the following symbol is the name of a 5923 Thumb encoded function. This information is necessary in order to 5924 allow the assembler and linker to generate correct code for 5925 interworking between Arm and Thumb instructions and should be used 5926 even if interworking is not going to be performed. The presence 5927 of this directive also implies `.thumb' 5928 5929 `.thumb_set' 5930 This performs the equivalent of a `.set' directive in that it 5931 creates a symbol which is an alias for another symbol (possibly 5932 not yet defined). This directive also has the added property in 5933 that it marks the aliased symbol as being a thumb function entry 5934 point, in the same way that the `.thumb_func' directive does. 5935 5936 `.ltorg' 5937 This directive causes the current contents of the literal pool to 5938 be dumped into the current section (which is assumed to be the 5939 .text section) at the current location (aligned to a word 5940 boundary). `GAS' maintains a separate literal pool for each 5941 section and each sub-section. The `.ltorg' directive will only 5942 affect the literal pool of the current section and sub-section. 5943 At the end of assembly all remaining, un-empty literal pools will 5944 automatically be dumped. 5945 5946 Note - older versions of `GAS' would dump the current literal pool 5947 any time a section change occurred. This is no longer done, since 5948 it prevents accurate control of the placement of literal pools. 5949 5950 `.pool' 5951 This is a synonym for .ltorg. 5952 5953 `.unwind_fnstart' 5954 Marks the start of a function with an unwind table entry. 5955 5956 `.unwind_fnend' 5957 Marks the end of a function with an unwind table entry. The 5958 unwind index table entry is created when this directive is 5959 processed. 5960 5961 If no personality routine has been specified then standard 5962 personality routine 0 or 1 will be used, depending on the number 5963 of unwind opcodes required. 5964 5965 `.cantunwind' 5966 Prevents unwinding through the current function. No personality 5967 routine or exception table data is required or permitted. 5968 5969 `.personality NAME' 5970 Sets the personality routine for the current function to NAME. 5971 5972 `.personalityindex INDEX' 5973 Sets the personality routine for the current function to the EABI 5974 standard routine number INDEX 5975 5976 `.handlerdata' 5977 Marks the end of the current function, and the start of the 5978 exception table entry for that function. Anything between this 5979 directive and the `.fnend' directive will be added to the 5980 exception table entry. 5981 5982 Must be preceded by a `.personality' or `.personalityindex' 5983 directive. 5984 5985 `.save REGLIST' 5986 Generate unwinder annotations to restore the registers in REGLIST. 5987 The format of REGLIST is the same as the corresponding 5988 store-multiple instruction. 5989 5990 _core registers_ 5991 .save {r4, r5, r6, lr} 5992 stmfd sp!, {r4, r5, r6, lr} 5993 _FPA registers_ 5994 .save f4, 2 5995 sfmfd f4, 2, [sp]! 5996 _VFP registers_ 5997 .save {d8, d9, d10} 5998 fstmdf sp!, {d8, d9, d10} 5999 _iWMMXt registers_ 6000 .save {wr10, wr11} 6001 wstrd wr11, [sp, #-8]! 6002 wstrd wr10, [sp, #-8]! 6003 or 6004 .save wr11 6005 wstrd wr11, [sp, #-8]! 6006 .save wr10 6007 wstrd wr10, [sp, #-8]! 6008 6009 `.pad #COUNT' 6010 Generate unwinder annotations for a stack adjustment of COUNT 6011 bytes. A positive value indicates the function prologue allocated 6012 stack space by decrementing the stack pointer. 6013 6014 `.movsp REG' 6015 Tell the unwinder that REG contains the current stack pointer. 6016 6017 `.setfp FPREG, SPREG [, #OFFSET]' 6018 Make all unwinder annotations relaive to a frame pointer. Without 6019 this the unwinder will use offsets from the stack pointer. 6020 6021 The syntax of this directive is the same as the `sub' or `mov' 6022 instruction used to set the frame pointer. SPREG must be either 6023 `sp' or mentioned in a previous `.movsp' directive. 6024 6025 .movsp ip 6026 mov ip, sp 6027 ... 6028 .setfp fp, ip, #4 6029 sub fp, ip, #4 6030 6031 `.raw OFFSET, BYTE1, ...' 6032 Insert one of more arbitary unwind opcode bytes, which are known 6033 to adjust the stack pointer by OFFSET bytes. 6034 6035 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save 6036 {r0}' 6037 6038 `.cpu NAME' 6039 Select the target processor. Valid values for NAME are the same as 6040 for the `-mcpu' commandline option. 6041 6042 `.arch NAME' 6043 Select the target architecture. Valid values for NAME are the 6044 same as for the `-march' commandline option. 6045 6046 `.fpu NAME' 6047 Select the floating point unit to assemble for. Valid values for 6048 NAME are the same as for the `-mfpu' commandline option. 6049 6050 `.eabi_attribute TAG, VALUE' 6051 Set the EABI object attribute number TAG to VALUE. The value is 6052 either a `number', `"string"', or `number, "string"' depending on 6053 the tag. 6054 6055 6056 6057 File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent 6058 6059 8.3.5 Opcodes 6060 ------------- 6061 6062 `as' implements all the standard ARM opcodes. It also implements 6063 several pseudo opcodes, including several synthetic load instructions. 6064 6065 `NOP' 6066 nop 6067 6068 This pseudo op will always evaluate to a legal ARM instruction 6069 that does nothing. Currently it will evaluate to MOV r0, r0. 6070 6071 `LDR' 6072 ldr <register> , = <expression> 6073 6074 If expression evaluates to a numeric constant then a MOV or MVN 6075 instruction will be used in place of the LDR instruction, if the 6076 constant can be generated by either of these instructions. 6077 Otherwise the constant will be placed into the nearest literal 6078 pool (if it not already there) and a PC relative LDR instruction 6079 will be generated. 6080 6081 `ADR' 6082 adr <register> <label> 6083 6084 This instruction will load the address of LABEL into the indicated 6085 register. The instruction will evaluate to a PC relative ADD or 6086 SUB instruction depending upon where the label is located. If the 6087 label is out of range, or if it is not defined in the same file 6088 (and section) as the ADR instruction, then an error will be 6089 generated. This instruction will not make use of the literal pool. 6090 6091 `ADRL' 6092 adrl <register> <label> 6093 6094 This instruction will load the address of LABEL into the indicated 6095 register. The instruction will evaluate to one or two PC relative 6096 ADD or SUB instructions depending upon where the label is located. 6097 If a second instruction is not needed a NOP instruction will be 6098 generated in its place, so that this instruction is always 8 bytes 6099 long. 6100 6101 If the label is out of range, or if it is not defined in the same 6102 file (and section) as the ADRL instruction, then an error will be 6103 generated. This instruction will not make use of the literal pool. 6104 6105 6106 For information on the ARM or Thumb instruction sets, see `ARM 6107 Software Development Toolkit Reference Manual', Advanced RISC Machines 6108 Ltd. 6109 6110 6111 File: as.info, Node: ARM Mapping Symbols, Prev: ARM Opcodes, Up: ARM-Dependent 6112 6113 8.3.6 Mapping Symbols 6114 --------------------- 6115 6116 The ARM ELF specification requires that special symbols be inserted 6117 into object files to mark certain features: 6118 6119 `$a' 6120 At the start of a region of code containing ARM instructions. 6121 6122 `$t' 6123 At the start of a region of code containing THUMB instructions. 6124 6125 `$d' 6126 At the start of a region of data. 6127 6128 6129 The assembler will automatically insert these symbols for you - there 6130 is no need to code them yourself. Support for tagging symbols ($b, $f, 6131 $p and $m) which is also mentioned in the current ARM ELF specification 6132 is not implemented. This is because they have been dropped from the 6133 new EABI and so tools cannot rely upon their presence. 6134 6135 6136 File: as.info, Node: BFIN-Dependent, Next: CRIS-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies 6137 6138 8.4 Blackfin Dependent Features 6139 =============================== 6140 6141 * Menu: 6142 6143 * BFIN Syntax:: BFIN Syntax 6144 * BFIN Directives:: BFIN Directives 6145 6146 6147 File: as.info, Node: BFIN Syntax, Next: BFIN Directives, Up: BFIN-Dependent 6148 6149 8.4.1 Syntax 6150 ------------ 6151 6152 `Special Characters' 6153 Assembler input is free format and may appear anywhere on the line. 6154 One instruction may extend across multiple lines or more than one 6155 instruction may appear on the same line. White space (space, tab, 6156 comments or newline) may appear anywhere between tokens. A token 6157 must not have embedded spaces. Tokens include numbers, register 6158 names, keywords, user identifiers, and also some multicharacter 6159 special symbols like "+=", "/*" or "||". 6160 6161 `Instruction Delimiting' 6162 A semicolon must terminate every instruction. Sometimes a complete 6163 instruction will consist of more than one operation. There are two 6164 cases where this occurs. The first is when two general operations 6165 are combined. Normally a comma separates the different parts, as 6166 in 6167 6168 a0= r3.h * r2.l, a1 = r3.l * r2.h ; 6169 6170 The second case occurs when a general instruction is combined with 6171 one or two memory references for joint issue. The latter portions 6172 are set off by a "||" token. 6173 6174 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++]; 6175 6176 `Register Names' 6177 The assembler treats register names and instruction keywords in a 6178 case insensitive manner. User identifiers are case sensitive. 6179 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the 6180 assembler. 6181 6182 Register names are reserved and may not be used as program 6183 identifiers. 6184 6185 Some operations (such as "Move Register") require a register pair. 6186 Register pairs are always data registers and are denoted using a 6187 colon, eg., R3:2. The larger number must be written firsts. Note 6188 that the hardware only supports odd-even pairs, eg., R7:6, R5:4, 6189 R3:2, and R1:0. 6190 6191 Some instructions (such as -SP (Push Multiple)) require a group of 6192 adjacent registers. Adjacent registers are denoted in the syntax 6193 by the range enclosed in parentheses and separated by a colon, 6194 eg., (R7:3). Again, the larger number appears first. 6195 6196 Portions of a particular register may be individually specified. 6197 This is written with a dot (".") following the register name and 6198 then a letter denoting the desired portion. For 32-bit registers, 6199 ".H" denotes the most significant ("High") portion. ".L" denotes 6200 the least-significant portion. The subdivisions of the 40-bit 6201 registers are described later. 6202 6203 `Accumulators' 6204 The set of 40-bit registers A1 and A0 that normally contain data 6205 that is being manipulated. Each accumulator can be accessed in 6206 four ways. 6207 6208 `one 40-bit register' 6209 The register will be referred to as A1 or A0. 6210 6211 `one 32-bit register' 6212 The registers are designated as A1.W or A0.W. 6213 6214 `two 16-bit registers' 6215 The registers are designated as A1.H, A1.L, A0.H or A0.L. 6216 6217 `one 8-bit register' 6218 The registers are designated as A1.X or A0.X for the bits that 6219 extend beyond bit 31. 6220 6221 `Data Registers' 6222 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) 6223 that normally contain data for manipulation. These are 6224 abbreviated as D-register or Dreg. Data registers can be accessed 6225 as 32-bit registers or as two independent 16-bit registers. The 6226 least significant 16 bits of each register is called the "low" 6227 half and is desginated with ".L" following the register name. The 6228 most significant 16 bits are called the "high" half and is 6229 designated with ".H". following the name. 6230 6231 R7.L, r2.h, r4.L, R0.H 6232 6233 `Pointer Registers' 6234 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) 6235 that normally contain byte addresses of data structures. These are 6236 abbreviated as P-register or Preg. 6237 6238 p2, p5, fp, sp 6239 6240 `Stack Pointer SP' 6241 The stack pointer contains the 32-bit address of the last occupied 6242 byte location in the stack. The stack grows by decrementing the 6243 stack pointer. 6244 6245 `Frame Pointer FP' 6246 The frame pointer contains the 32-bit address of the previous frame 6247 pointer in the stack. It is located at the top of a frame. 6248 6249 `Loop Top' 6250 LT0 and LT1. These registers contain the 32-bit address of the 6251 top of a zero overhead loop. 6252 6253 `Loop Count' 6254 LC0 and LC1. These registers contain the 32-bit counter of the 6255 zero overhead loop executions. 6256 6257 `Loop Bottom' 6258 LB0 and LB1. These registers contain the 32-bit address of the 6259 bottom of a zero overhead loop. 6260 6261 `Index Registers' 6262 The set of 32-bit registers (I0, I1, I2, I3) that normally contain 6263 byte addresses of data structures. Abbreviated I-register or Ireg. 6264 6265 `Modify Registers' 6266 The set of 32-bit registers (M0, M1, M2, M3) that normally contain 6267 offset values that are added and subracted to one of the index 6268 registers. Abbreviated as Mreg. 6269 6270 `Length Registers' 6271 The set of 32-bit registers (L0, L1, L2, L3) that normally contain 6272 the length in bytes of the circular buffer. Abbreviated as Lreg. 6273 Clear the Lreg to disable circular addressing for the 6274 corresponding Ireg. 6275 6276 `Base Registers' 6277 The set of 32-bit registers (B0, B1, B2, B3) that normally contain 6278 the base address in bytes of the circular buffer. Abbreviated as 6279 Breg. 6280 6281 `Floating Point' 6282 The Blackfin family has no hardware floating point but the .float 6283 directive generates ieee floating point numbers for use with 6284 software floating point libraries. 6285 6286 `Blackfin Opcodes' 6287 For detailed information on the Blackfin machine instruction set, 6288 see the Blackfin(r) Processor Instruction Set Reference. 6289 6290 6291 6292 File: as.info, Node: BFIN Directives, Prev: BFIN Syntax, Up: BFIN-Dependent 6293 6294 8.4.2 Directives 6295 ---------------- 6296 6297 The following directives are provided for compatibility with the VDSP 6298 assembler. 6299 6300 `.byte2' 6301 Initializes a four byte data object. 6302 6303 `.byte4' 6304 Initializes a two byte data object. 6305 6306 `.db' 6307 TBD 6308 6309 `.dd' 6310 TBD 6311 6312 `.dw' 6313 TBD 6314 6315 `.var' 6316 Define and initialize a 32 bit data object. 6317 6318 6319 File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: BFIN-Dependent, Up: Machine Dependencies 6320 6321 8.5 CRIS Dependent Features 6322 =========================== 6323 6324 * Menu: 6325 6326 * CRIS-Opts:: Command-line Options 6327 * CRIS-Expand:: Instruction expansion 6328 * CRIS-Symbols:: Symbols 6329 * CRIS-Syntax:: Syntax 6330 6331 6332 File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent 6333 6334 8.5.1 Command-line Options 6335 -------------------------- 6336 6337 The CRIS version of `as' has these machine-dependent command-line 6338 options. 6339 6340 The format of the generated object files can be either ELF or a.out, 6341 specified by the command-line options `--emulation=crisaout' and 6342 `--emulation=criself'. The default is ELF (criself), unless `as' has 6343 been configured specifically for a.out by using the configuration name 6344 `cris-axis-aout'. 6345 6346 There are two different link-incompatible ELF object file variants 6347 for CRIS, for use in environments where symbols are expected to be 6348 prefixed by a leading `_' character and for environments without such a 6349 symbol prefix. The variant used for GNU/Linux port has no symbol 6350 prefix. Which variant to produce is specified by either of the options 6351 `--underscore' and `--no-underscore'. The default is `--underscore'. 6352 Since symbols in CRIS a.out objects are expected to have a `_' prefix, 6353 specifying `--no-underscore' when generating a.out objects is an error. 6354 Besides the object format difference, the effect of this option is to 6355 parse register names differently (*note crisnous::). The 6356 `--no-underscore' option makes a `$' register prefix mandatory. 6357 6358 The option `--pic' must be passed to `as' in order to recognize the 6359 symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note 6360 crispic::). This will also affect expansion of instructions. The 6361 expansion with `--pic' will use PC-relative rather than (slightly 6362 faster) absolute addresses in those expansions. 6363 6364 The option `--march=ARCHITECTURE' specifies the recognized 6365 instruction set and recognized register names. It also controls the 6366 architecture type of the object file. Valid values for ARCHITECTURE 6367 are: 6368 `v0_v10' 6369 All instructions and register names for any architecture variant 6370 in the set v0...v10 are recognized. This is the default if the 6371 target is configured as cris-*. 6372 6373 `v10' 6374 Only instructions and register names for CRIS v10 (as found in 6375 ETRAX 100 LX) are recognized. This is the default if the target 6376 is configured as crisv10-*. 6377 6378 `v32' 6379 Only instructions and register names for CRIS v32 (code name 6380 Guinness) are recognized. This is the default if the target is 6381 configured as crisv32-*. This value implies `--no-mul-bug-abort'. 6382 (A subsequent `--mul-bug-abort' will turn it back on.) 6383 6384 `common_v10_v32' 6385 Only instructions with register names and addressing modes with 6386 opcodes common to the v10 and v32 are recognized. 6387 6388 When `-N' is specified, `as' will emit a warning when a 16-bit 6389 branch instruction is expanded into a 32-bit multiple-instruction 6390 construct (*note CRIS-Expand::). 6391 6392 Some versions of the CRIS v10, for example in the Etrax 100 LX, 6393 contain a bug that causes destabilizing memory accesses when a multiply 6394 instruction is executed with certain values in the first operand just 6395 before a cache-miss. When the `--mul-bug-abort' command line option is 6396 active (the default value), `as' will refuse to assemble a file 6397 containing a multiply instruction at a dangerous offset, one that could 6398 be the last on a cache-line, or is in a section with insufficient 6399 alignment. This placement checking does not catch any case where the 6400 multiply instruction is dangerously placed because it is located in a 6401 delay-slot. The `--mul-bug-abort' command line option turns off the 6402 checking. 6403 6404 6405 File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent 6406 6407 8.5.2 Instruction expansion 6408 --------------------------- 6409 6410 `as' will silently choose an instruction that fits the operand size for 6411 `[register+constant]' operands. For example, the offset `127' in 6412 `move.d [r3+127],r4' fits in an instruction using a signed-byte offset. 6413 Similarly, `move.d [r2+32767],r1' will generate an instruction using a 6414 16-bit offset. For symbolic expressions and constants that do not fit 6415 in 16 bits including the sign bit, a 32-bit offset is generated. 6416 6417 For branches, `as' will expand from a 16-bit branch instruction into 6418 a sequence of instructions that can reach a full 32-bit address. Since 6419 this does not correspond to a single instruction, such expansions can 6420 optionally be warned about. *Note CRIS-Opts::. 6421 6422 If the operand is found to fit the range, a `lapc' mnemonic will 6423 translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit 6424 `lapc' instruction. 6425 6426 Similarly, the `addo' mnemonic will translate to the shortest 6427 fitting instruction of `addoq', `addo.w' and `addo.d', when used with a 6428 operand that is a constant known at assembly time. 6429 6430 6431 File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent 6432 6433 8.5.3 Symbols 6434 ------------- 6435 6436 Some symbols are defined by the assembler. They're intended to be used 6437 in conditional assembly, for example: 6438 .if ..asm.arch.cris.v32 6439 CODE FOR CRIS V32 6440 .elseif ..asm.arch.cris.common_v10_v32 6441 CODE COMMON TO CRIS V32 AND CRIS V10 6442 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10 6443 CODE FOR V10 6444 .else 6445 .error "Code needs to be added here." 6446 .endif 6447 6448 These symbols are defined in the assembler, reflecting command-line 6449 options, either when specified or the default. They are always 6450 defined, to 0 or 1. 6451 `..asm.arch.cris.any_v0_v10' 6452 This symbol is non-zero when `--march=v0_v10' is specified or the 6453 default. 6454 6455 `..asm.arch.cris.common_v10_v32' 6456 Set according to the option `--march=common_v10_v32'. 6457 6458 `..asm.arch.cris.v10' 6459 Reflects the option `--march=v10'. 6460 6461 `..asm.arch.cris.v32' 6462 Corresponds to `--march=v10'. 6463 6464 Speaking of symbols, when a symbol is used in code, it can have a 6465 suffix modifying its value for use in position-independent code. *Note 6466 CRIS-Pic::. 6467 6468 6469 File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent 6470 6471 8.5.4 Syntax 6472 ------------ 6473 6474 There are different aspects of the CRIS assembly syntax. 6475 6476 * Menu: 6477 6478 * CRIS-Chars:: Special Characters 6479 * CRIS-Pic:: Position-Independent Code Symbols 6480 * CRIS-Regs:: Register Names 6481 * CRIS-Pseudos:: Assembler Directives 6482 6483 6484 File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax 6485 6486 8.5.4.1 Special Characters 6487 .......................... 6488 6489 The character `#' is a line comment character. It starts a comment if 6490 and only if it is placed at the beginning of a line. 6491 6492 A `;' character starts a comment anywhere on the line, causing all 6493 characters up to the end of the line to be ignored. 6494 6495 A `@' character is handled as a line separator equivalent to a 6496 logical new-line character (except in a comment), so separate 6497 instructions can be specified on a single line. 6498 6499 6500 File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax 6501 6502 8.5.4.2 Symbols in position-independent code 6503 ............................................ 6504 6505 When generating position-independent code (SVR4 PIC) for use in 6506 cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol 6507 suffixes are used to specify what kind of run-time symbol lookup will 6508 be used, expressed in the object as different _relocation types_. 6509 Usually, all absolute symbol values must be located in a table, the 6510 _global offset table_, leaving the code position-independent; 6511 independent of values of global symbols and independent of the address 6512 of the code. The suffix modifies the value of the symbol, into for 6513 example an index into the global offset table where the real symbol 6514 value is entered, or a PC-relative value, or a value relative to the 6515 start of the global offset table. All symbol suffixes start with the 6516 character `:' (omitted in the list below). Every symbol use in code or 6517 a read-only section must therefore have a PIC suffix to enable a useful 6518 shared library to be created. Usually, these constructs must not be 6519 used with an additive constant offset as is usually allowed, i.e. no 4 6520 as in `symbol + 4' is allowed. This restriction is checked at 6521 link-time, not at assembly-time. 6522 6523 `GOT' 6524 Attaching this suffix to a symbol in an instruction causes the 6525 symbol to be entered into the global offset table. The value is a 6526 32-bit index for that symbol into the global offset table. The 6527 name of the corresponding relocation is `R_CRIS_32_GOT'. Example: 6528 `move.d [$r0+extsym:GOT],$r9' 6529 6530 `GOT16' 6531 Same as for `GOT', but the value is a 16-bit index into the global 6532 offset table. The corresponding relocation is `R_CRIS_16_GOT'. 6533 Example: `move.d [$r0+asymbol:GOT16],$r10' 6534 6535 `PLT' 6536 This suffix is used for function symbols. It causes a _procedure 6537 linkage table_, an array of code stubs, to be created at the time 6538 the shared object is created or linked against, together with a 6539 global offset table entry. The value is a pc-relative offset to 6540 the corresponding stub code in the procedure linkage table. This 6541 arrangement causes the run-time symbol resolver to be called to 6542 look up and set the value of the symbol the first time the 6543 function is called (at latest; depending environment variables). 6544 It is only safe to leave the symbol unresolved this way if all 6545 references are function calls. The name of the relocation is 6546 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc' 6547 6548 `PLTG' 6549 Like PLT, but the value is relative to the beginning of the global 6550 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example: 6551 `move.d fnname:PLTG,$r3' 6552 6553 `GOTPLT' 6554 Similar to `PLT', but the value of the symbol is a 32-bit index 6555 into the global offset table. This is somewhat of a mix between 6556 the effect of the `GOT' and the `PLT' suffix; the difference to 6557 `GOT' is that there will be a procedure linkage table entry 6558 created, and that the symbol is assumed to be a function entry and 6559 will be resolved by the run-time resolver as with `PLT'. The 6560 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr 6561 [$r0+fnname:GOTPLT]' 6562 6563 `GOTPLT16' 6564 A variant of `GOTPLT' giving a 16-bit value. Its relocation name 6565 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]' 6566 6567 `GOTOFF' 6568 This suffix must only be attached to a local symbol, but may be 6569 used in an expression adding an offset. The value is the address 6570 of the symbol relative to the start of the global offset table. 6571 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d 6572 [$r0+localsym:GOTOFF],r3' 6573 6574 6575 File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax 6576 6577 8.5.4.3 Register names 6578 ...................... 6579 6580 A `$' character may always prefix a general or special register name in 6581 an instruction operand but is mandatory when the option 6582 `--no-underscore' is specified or when the `.syntax register_prefix' 6583 directive is in effect (*note crisnous::). Register names are 6584 case-insensitive. 6585 6586 6587 File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax 6588 6589 8.5.4.4 Assembler Directives 6590 ............................ 6591 6592 There are a few CRIS-specific pseudo-directives in addition to the 6593 generic ones. *Note Pseudo Ops::. Constants emitted by 6594 pseudo-directives are in little-endian order for CRIS. There is no 6595 support for floating-point-specific directives for CRIS. 6596 6597 `.dword EXPRESSIONS' 6598 The `.dword' directive is a synonym for `.int', expecting zero or 6599 more EXPRESSIONS, separated by commas. For each expression, a 6600 32-bit little-endian constant is emitted. 6601 6602 `.syntax ARGUMENT' 6603 The `.syntax' directive takes as ARGUMENT one of the following 6604 case-sensitive choices. 6605 6606 `no_register_prefix' 6607 The `.syntax no_register_prefix' directive makes a `$' 6608 character prefix on all registers optional. It overrides a 6609 previous setting, including the corresponding effect of the 6610 option `--no-underscore'. If this directive is used when 6611 ordinary symbols do not have a `_' character prefix, care 6612 must be taken to avoid ambiguities whether an operand is a 6613 register or a symbol; using symbols with names the same as 6614 general or special registers then invoke undefined behavior. 6615 6616 `register_prefix' 6617 This directive makes a `$' character prefix on all registers 6618 mandatory. It overrides a previous setting, including the 6619 corresponding effect of the option `--underscore'. 6620 6621 `leading_underscore' 6622 This is an assertion directive, emitting an error if the 6623 `--no-underscore' option is in effect. 6624 6625 `no_leading_underscore' 6626 This is the opposite of the `.syntax leading_underscore' 6627 directive and emits an error if the option `--underscore' is 6628 in effect. 6629 6630 `.arch ARGUMENT' 6631 This is an assertion directive, giving an error if the specified 6632 ARGUMENT is not the same as the specified or default value for the 6633 `--march=ARCHITECTURE' option (*note march-option::). 6634 6635 6636 6637 File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies 6638 6639 8.6 D10V Dependent Features 6640 =========================== 6641 6642 * Menu: 6643 6644 * D10V-Opts:: D10V Options 6645 * D10V-Syntax:: Syntax 6646 * D10V-Float:: Floating Point 6647 * D10V-Opcodes:: Opcodes 6648 6649 6650 File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent 6651 6652 8.6.1 D10V Options 6653 ------------------ 6654 6655 The Mitsubishi D10V version of `as' has a few machine dependent options. 6656 6657 `-O' 6658 The D10V can often execute two sub-instructions in parallel. When 6659 this option is used, `as' will attempt to optimize its output by 6660 detecting when instructions can be executed in parallel. 6661 6662 `--nowarnswap' 6663 To optimize execution performance, `as' will sometimes swap the 6664 order of instructions. Normally this generates a warning. When 6665 this option is used, no warning will be generated when 6666 instructions are swapped. 6667 6668 `--gstabs-packing' 6669 6670 `--no-gstabs-packing' 6671 `as' packs adjacent short instructions into a single packed 6672 instruction. `--no-gstabs-packing' turns instruction packing off if 6673 `--gstabs' is specified as well; `--gstabs-packing' (the default) 6674 turns instruction packing on even when `--gstabs' is specified. 6675 6676 6677 File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent 6678 6679 8.6.2 Syntax 6680 ------------ 6681 6682 The D10V syntax is based on the syntax in Mitsubishi's D10V 6683 architecture manual. The differences are detailed below. 6684 6685 * Menu: 6686 6687 * D10V-Size:: Size Modifiers 6688 * D10V-Subs:: Sub-Instructions 6689 * D10V-Chars:: Special Characters 6690 * D10V-Regs:: Register Names 6691 * D10V-Addressing:: Addressing Modes 6692 * D10V-Word:: @WORD Modifier 6693 6694 6695 File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax 6696 6697 8.6.2.1 Size Modifiers 6698 ...................... 6699 6700 The D10V version of `as' uses the instruction names in the D10V 6701 Architecture Manual. However, the names in the manual are sometimes 6702 ambiguous. There are instruction names that can assemble to a short or 6703 long form opcode. How does the assembler pick the correct form? `as' 6704 will always pick the smallest form if it can. When dealing with a 6705 symbol that is not defined yet when a line is being assembled, it will 6706 always use the long form. If you need to force the assembler to use 6707 either the short or long form of the instruction, you can append either 6708 `.s' (short) or `.l' (long) to it. For example, if you are writing an 6709 assembly program and you want to do a branch to a symbol that is 6710 defined later in your program, you can write `bra.s foo'. Objdump 6711 and GDB will always append `.s' or `.l' to instructions which have both 6712 short and long forms. 6713 6714 6715 File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax 6716 6717 8.6.2.2 Sub-Instructions 6718 ........................ 6719 6720 The D10V assembler takes as input a series of instructions, either 6721 one-per-line, or in the special two-per-line format described in the 6722 next section. Some of these instructions will be short-form or 6723 sub-instructions. These sub-instructions can be packed into a single 6724 instruction. The assembler will do this automatically. It will also 6725 detect when it should not pack instructions. For example, when a label 6726 is defined, the next instruction will never be packaged with the 6727 previous one. Whenever a branch and link instruction is called, it 6728 will not be packaged with the next instruction so the return address 6729 will be valid. Nops are automatically inserted when necessary. 6730 6731 If you do not want the assembler automatically making these 6732 decisions, you can control the packaging and execution type (parallel 6733 or sequential) with the special execution symbols described in the next 6734 section. 6735 6736 6737 File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax 6738 6739 8.6.2.3 Special Characters 6740 .......................... 6741 6742 `;' and `#' are the line comment characters. Sub-instructions may be 6743 executed in order, in reverse-order, or in parallel. Instructions 6744 listed in the standard one-per-line format will be executed 6745 sequentially. To specify the executing order, use the following 6746 symbols: 6747 `->' 6748 Sequential with instruction on the left first. 6749 6750 `<-' 6751 Sequential with instruction on the right first. 6752 6753 `||' 6754 Parallel 6755 The D10V syntax allows either one instruction per line, one 6756 instruction per line with the execution symbol, or two instructions per 6757 line. For example 6758 `abs a1 -> abs r0' 6759 Execute these sequentially. The instruction on the right is in 6760 the right container and is executed second. 6761 6762 `abs r0 <- abs a1' 6763 Execute these reverse-sequentially. The instruction on the right 6764 is in the right container, and is executed first. 6765 6766 `ld2w r2,@r8+ || mac a0,r0,r7' 6767 Execute these in parallel. 6768 6769 `ld2w r2,@r8+ ||' 6770 `mac a0,r0,r7' 6771 Two-line format. Execute these in parallel. 6772 6773 `ld2w r2,@r8+' 6774 `mac a0,r0,r7' 6775 Two-line format. Execute these sequentially. Assembler will put 6776 them in the proper containers. 6777 6778 `ld2w r2,@r8+ ->' 6779 `mac a0,r0,r7' 6780 Two-line format. Execute these sequentially. Same as above but 6781 second instruction will always go into right container. 6782 Since `$' has no special meaning, you may use it in symbol names. 6783 6784 6785 File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax 6786 6787 8.6.2.4 Register Names 6788 ...................... 6789 6790 You can use the predefined symbols `r0' through `r15' to refer to the 6791 D10V registers. You can also use `sp' as an alias for `r15'. The 6792 accumulators are `a0' and `a1'. There are special register-pair names 6793 that may optionally be used in opcodes that require even-numbered 6794 registers. Register names are not case sensitive. 6795 6796 Register Pairs 6797 `r0-r1' 6798 6799 `r2-r3' 6800 6801 `r4-r5' 6802 6803 `r6-r7' 6804 6805 `r8-r9' 6806 6807 `r10-r11' 6808 6809 `r12-r13' 6810 6811 `r14-r15' 6812 6813 The D10V also has predefined symbols for these control registers and 6814 status bits: 6815 `psw' 6816 Processor Status Word 6817 6818 `bpsw' 6819 Backup Processor Status Word 6820 6821 `pc' 6822 Program Counter 6823 6824 `bpc' 6825 Backup Program Counter 6826 6827 `rpt_c' 6828 Repeat Count 6829 6830 `rpt_s' 6831 Repeat Start address 6832 6833 `rpt_e' 6834 Repeat End address 6835 6836 `mod_s' 6837 Modulo Start address 6838 6839 `mod_e' 6840 Modulo End address 6841 6842 `iba' 6843 Instruction Break Address 6844 6845 `f0' 6846 Flag 0 6847 6848 `f1' 6849 Flag 1 6850 6851 `c' 6852 Carry flag 6853 6854 6855 File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax 6856 6857 8.6.2.5 Addressing Modes 6858 ........................ 6859 6860 `as' understands the following addressing modes for the D10V. `RN' in 6861 the following refers to any of the numbered registers, but _not_ the 6862 control registers. 6863 `RN' 6864 Register direct 6865 6866 `@RN' 6867 Register indirect 6868 6869 `@RN+' 6870 Register indirect with post-increment 6871 6872 `@RN-' 6873 Register indirect with post-decrement 6874 6875 `@-SP' 6876 Register indirect with pre-decrement 6877 6878 `@(DISP, RN)' 6879 Register indirect with displacement 6880 6881 `ADDR' 6882 PC relative address (for branch or rep). 6883 6884 `#IMM' 6885 Immediate data (the `#' is optional and ignored) 6886 6887 6888 File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax 6889 6890 8.6.2.6 @WORD Modifier 6891 ...................... 6892 6893 Any symbol followed by `@word' will be replaced by the symbol's value 6894 shifted right by 2. This is used in situations such as loading a 6895 register with the address of a function (or any other code fragment). 6896 For example, if you want to load a register with the location of the 6897 function `main' then jump to that function, you could do it as follows: 6898 ldi r2, main@word 6899 jmp r2 6900 6901 6902 File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent 6903 6904 8.6.3 Floating Point 6905 -------------------- 6906 6907 The D10V has no hardware floating point, but the `.float' and `.double' 6908 directives generates IEEE floating-point numbers for compatibility with 6909 other development tools. 6910 6911 6912 File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent 6913 6914 8.6.4 Opcodes 6915 ------------- 6916 6917 For detailed information on the D10V machine instruction set, see `D10V 6918 Architecture: A VLIW Microprocessor for Multimedia Applications' 6919 (Mitsubishi Electric Corp.). `as' implements all the standard D10V 6920 opcodes. The only changes are those described in the section on size 6921 modifiers 6922 6923 6924 File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies 6925 6926 8.7 D30V Dependent Features 6927 =========================== 6928 6929 * Menu: 6930 6931 * D30V-Opts:: D30V Options 6932 * D30V-Syntax:: Syntax 6933 * D30V-Float:: Floating Point 6934 * D30V-Opcodes:: Opcodes 6935 6936 6937 File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent 6938 6939 8.7.1 D30V Options 6940 ------------------ 6941 6942 The Mitsubishi D30V version of `as' has a few machine dependent options. 6943 6944 `-O' 6945 The D30V can often execute two sub-instructions in parallel. When 6946 this option is used, `as' will attempt to optimize its output by 6947 detecting when instructions can be executed in parallel. 6948 6949 `-n' 6950 When this option is used, `as' will issue a warning every time it 6951 adds a nop instruction. 6952 6953 `-N' 6954 When this option is used, `as' will issue a warning if it needs to 6955 insert a nop after a 32-bit multiply before a load or 16-bit 6956 multiply instruction. 6957 6958 6959 File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent 6960 6961 8.7.2 Syntax 6962 ------------ 6963 6964 The D30V syntax is based on the syntax in Mitsubishi's D30V 6965 architecture manual. The differences are detailed below. 6966 6967 * Menu: 6968 6969 * D30V-Size:: Size Modifiers 6970 * D30V-Subs:: Sub-Instructions 6971 * D30V-Chars:: Special Characters 6972 * D30V-Guarded:: Guarded Execution 6973 * D30V-Regs:: Register Names 6974 * D30V-Addressing:: Addressing Modes 6975 6976 6977 File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax 6978 6979 8.7.2.1 Size Modifiers 6980 ...................... 6981 6982 The D30V version of `as' uses the instruction names in the D30V 6983 Architecture Manual. However, the names in the manual are sometimes 6984 ambiguous. There are instruction names that can assemble to a short or 6985 long form opcode. How does the assembler pick the correct form? `as' 6986 will always pick the smallest form if it can. When dealing with a 6987 symbol that is not defined yet when a line is being assembled, it will 6988 always use the long form. If you need to force the assembler to use 6989 either the short or long form of the instruction, you can append either 6990 `.s' (short) or `.l' (long) to it. For example, if you are writing an 6991 assembly program and you want to do a branch to a symbol that is 6992 defined later in your program, you can write `bra.s foo'. Objdump and 6993 GDB will always append `.s' or `.l' to instructions which have both 6994 short and long forms. 6995 6996 6997 File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax 6998 6999 8.7.2.2 Sub-Instructions 7000 ........................ 7001 7002 The D30V assembler takes as input a series of instructions, either 7003 one-per-line, or in the special two-per-line format described in the 7004 next section. Some of these instructions will be short-form or 7005 sub-instructions. These sub-instructions can be packed into a single 7006 instruction. The assembler will do this automatically. It will also 7007 detect when it should not pack instructions. For example, when a label 7008 is defined, the next instruction will never be packaged with the 7009 previous one. Whenever a branch and link instruction is called, it 7010 will not be packaged with the next instruction so the return address 7011 will be valid. Nops are automatically inserted when necessary. 7012 7013 If you do not want the assembler automatically making these 7014 decisions, you can control the packaging and execution type (parallel 7015 or sequential) with the special execution symbols described in the next 7016 section. 7017 7018 7019 File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax 7020 7021 8.7.2.3 Special Characters 7022 .......................... 7023 7024 `;' and `#' are the line comment characters. Sub-instructions may be 7025 executed in order, in reverse-order, or in parallel. Instructions 7026 listed in the standard one-per-line format will be executed 7027 sequentially unless you use the `-O' option. 7028 7029 To specify the executing order, use the following symbols: 7030 `->' 7031 Sequential with instruction on the left first. 7032 7033 `<-' 7034 Sequential with instruction on the right first. 7035 7036 `||' 7037 Parallel 7038 7039 The D30V syntax allows either one instruction per line, one 7040 instruction per line with the execution symbol, or two instructions per 7041 line. For example 7042 `abs r2,r3 -> abs r4,r5' 7043 Execute these sequentially. The instruction on the right is in 7044 the right container and is executed second. 7045 7046 `abs r2,r3 <- abs r4,r5' 7047 Execute these reverse-sequentially. The instruction on the right 7048 is in the right container, and is executed first. 7049 7050 `abs r2,r3 || abs r4,r5' 7051 Execute these in parallel. 7052 7053 `ldw r2,@(r3,r4) ||' 7054 `mulx r6,r8,r9' 7055 Two-line format. Execute these in parallel. 7056 7057 `mulx a0,r8,r9' 7058 `stw r2,@(r3,r4)' 7059 Two-line format. Execute these sequentially unless `-O' option is 7060 used. If the `-O' option is used, the assembler will determine if 7061 the instructions could be done in parallel (the above two 7062 instructions can be done in parallel), and if so, emit them as 7063 parallel instructions. The assembler will put them in the proper 7064 containers. In the above example, the assembler will put the 7065 `stw' instruction in left container and the `mulx' instruction in 7066 the right container. 7067 7068 `stw r2,@(r3,r4) ->' 7069 `mulx a0,r8,r9' 7070 Two-line format. Execute the `stw' instruction followed by the 7071 `mulx' instruction sequentially. The first instruction goes in the 7072 left container and the second instruction goes into right 7073 container. The assembler will give an error if the machine 7074 ordering constraints are violated. 7075 7076 `stw r2,@(r3,r4) <-' 7077 `mulx a0,r8,r9' 7078 Same as previous example, except that the `mulx' instruction is 7079 executed before the `stw' instruction. 7080 7081 Since `$' has no special meaning, you may use it in symbol names. 7082 7083 7084 File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax 7085 7086 8.7.2.4 Guarded Execution 7087 ......................... 7088 7089 `as' supports the full range of guarded execution directives for each 7090 instruction. Just append the directive after the instruction proper. 7091 The directives are: 7092 7093 `/tx' 7094 Execute the instruction if flag f0 is true. 7095 7096 `/fx' 7097 Execute the instruction if flag f0 is false. 7098 7099 `/xt' 7100 Execute the instruction if flag f1 is true. 7101 7102 `/xf' 7103 Execute the instruction if flag f1 is false. 7104 7105 `/tt' 7106 Execute the instruction if both flags f0 and f1 are true. 7107 7108 `/tf' 7109 Execute the instruction if flag f0 is true and flag f1 is false. 7110 7111 7112 File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax 7113 7114 8.7.2.5 Register Names 7115 ...................... 7116 7117 You can use the predefined symbols `r0' through `r63' to refer to the 7118 D30V registers. You can also use `sp' as an alias for `r63' and `link' 7119 as an alias for `r62'. The accumulators are `a0' and `a1'. 7120 7121 The D30V also has predefined symbols for these control registers and 7122 status bits: 7123 `psw' 7124 Processor Status Word 7125 7126 `bpsw' 7127 Backup Processor Status Word 7128 7129 `pc' 7130 Program Counter 7131 7132 `bpc' 7133 Backup Program Counter 7134 7135 `rpt_c' 7136 Repeat Count 7137 7138 `rpt_s' 7139 Repeat Start address 7140 7141 `rpt_e' 7142 Repeat End address 7143 7144 `mod_s' 7145 Modulo Start address 7146 7147 `mod_e' 7148 Modulo End address 7149 7150 `iba' 7151 Instruction Break Address 7152 7153 `f0' 7154 Flag 0 7155 7156 `f1' 7157 Flag 1 7158 7159 `f2' 7160 Flag 2 7161 7162 `f3' 7163 Flag 3 7164 7165 `f4' 7166 Flag 4 7167 7168 `f5' 7169 Flag 5 7170 7171 `f6' 7172 Flag 6 7173 7174 `f7' 7175 Flag 7 7176 7177 `s' 7178 Same as flag 4 (saturation flag) 7179 7180 `v' 7181 Same as flag 5 (overflow flag) 7182 7183 `va' 7184 Same as flag 6 (sticky overflow flag) 7185 7186 `c' 7187 Same as flag 7 (carry/borrow flag) 7188 7189 `b' 7190 Same as flag 7 (carry/borrow flag) 7191 7192 7193 File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax 7194 7195 8.7.2.6 Addressing Modes 7196 ........................ 7197 7198 `as' understands the following addressing modes for the D30V. `RN' in 7199 the following refers to any of the numbered registers, but _not_ the 7200 control registers. 7201 `RN' 7202 Register direct 7203 7204 `@RN' 7205 Register indirect 7206 7207 `@RN+' 7208 Register indirect with post-increment 7209 7210 `@RN-' 7211 Register indirect with post-decrement 7212 7213 `@-SP' 7214 Register indirect with pre-decrement 7215 7216 `@(DISP, RN)' 7217 Register indirect with displacement 7218 7219 `ADDR' 7220 PC relative address (for branch or rep). 7221 7222 `#IMM' 7223 Immediate data (the `#' is optional and ignored) 7224 7225 7226 File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent 7227 7228 8.7.3 Floating Point 7229 -------------------- 7230 7231 The D30V has no hardware floating point, but the `.float' and `.double' 7232 directives generates IEEE floating-point numbers for compatibility with 7233 other development tools. 7234 7235 7236 File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent 7237 7238 8.7.4 Opcodes 7239 ------------- 7240 7241 For detailed information on the D30V machine instruction set, see `D30V 7242 Architecture: A VLIW Microprocessor for Multimedia Applications' 7243 (Mitsubishi Electric Corp.). `as' implements all the standard D30V 7244 opcodes. The only changes are those described in the section on size 7245 modifiers 7246 7247 7248 File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies 7249 7250 8.8 H8/300 Dependent Features 7251 ============================= 7252 7253 * Menu: 7254 7255 * H8/300 Options:: Options 7256 * H8/300 Syntax:: Syntax 7257 * H8/300 Floating Point:: Floating Point 7258 * H8/300 Directives:: H8/300 Machine Directives 7259 * H8/300 Opcodes:: Opcodes 7260 7261 7262 File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent 7263 7264 8.8.1 Options 7265 ------------- 7266 7267 `as' has no additional command-line options for the Renesas (formerly 7268 Hitachi) H8/300 family. 7269 7270 7271 File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent 7272 7273 8.8.2 Syntax 7274 ------------ 7275 7276 * Menu: 7277 7278 * H8/300-Chars:: Special Characters 7279 * H8/300-Regs:: Register Names 7280 * H8/300-Addressing:: Addressing Modes 7281 7282 7283 File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax 7284 7285 8.8.2.1 Special Characters 7286 .......................... 7287 7288 `;' is the line comment character. 7289 7290 `$' can be used instead of a newline to separate statements. 7291 Therefore _you may not use `$' in symbol names_ on the H8/300. 7292 7293 7294 File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax 7295 7296 8.8.2.2 Register Names 7297 ...................... 7298 7299 You can use predefined symbols of the form `rNh' and `rNl' to refer to 7300 the H8/300 registers as sixteen 8-bit general-purpose registers. N is 7301 a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid 7302 register names. 7303 7304 You can also use the eight predefined symbols `rN' to refer to the 7305 H8/300 registers as 16-bit registers (you must use this form for 7306 addressing). 7307 7308 On the H8/300H, you can also use the eight predefined symbols `erN' 7309 (`er0' ... `er7') to refer to the 32-bit general purpose registers. 7310 7311 The two control registers are called `pc' (program counter; a 16-bit 7312 register, except on the H8/300H where it is 24 bits) and `ccr' 7313 (condition code register; an 8-bit register). `r7' is used as the 7314 stack pointer, and can also be called `sp'. 7315 7316 7317 File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax 7318 7319 8.8.2.3 Addressing Modes 7320 ........................ 7321 7322 as understands the following addressing modes for the H8/300: 7323 `rN' 7324 Register direct 7325 7326 `@rN' 7327 Register indirect 7328 7329 `@(D, rN)' 7330 `@(D:16, rN)' 7331 `@(D:24, rN)' 7332 Register indirect: 16-bit or 24-bit displacement D from register 7333 N. (24-bit displacements are only meaningful on the H8/300H.) 7334 7335 `@rN+' 7336 Register indirect with post-increment 7337 7338 `@-rN' 7339 Register indirect with pre-decrement 7340 7341 ``@'AA' 7342 ``@'AA:8' 7343 ``@'AA:16' 7344 ``@'AA:24' 7345 Absolute address `aa'. (The address size `:24' only makes sense 7346 on the H8/300H.) 7347 7348 `#XX' 7349 `#XX:8' 7350 `#XX:16' 7351 `#XX:32' 7352 Immediate data XX. You may specify the `:8', `:16', or `:32' for 7353 clarity, if you wish; but `as' neither requires this nor uses 7354 it--the data size required is taken from context. 7355 7356 ``@'`@'AA' 7357 ``@'`@'AA:8' 7358 Memory indirect. You may specify the `:8' for clarity, if you 7359 wish; but `as' neither requires this nor uses it. 7360 7361 7362 File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent 7363 7364 8.8.3 Floating Point 7365 -------------------- 7366 7367 The H8/300 family has no hardware floating point, but the `.float' 7368 directive generates IEEE floating-point numbers for compatibility with 7369 other development tools. 7370 7371 7372 File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent 7373 7374 8.8.4 H8/300 Machine Directives 7375 ------------------------------- 7376 7377 `as' has the following machine-dependent directives for the H8/300: 7378 7379 `.h8300h' 7380 Recognize and emit additional instructions for the H8/300H 7381 variant, and also make `.int' emit 32-bit numbers rather than the 7382 usual (16-bit) for the H8/300 family. 7383 7384 `.h8300s' 7385 Recognize and emit additional instructions for the H8S variant, and 7386 also make `.int' emit 32-bit numbers rather than the usual (16-bit) 7387 for the H8/300 family. 7388 7389 `.h8300hn' 7390 Recognize and emit additional instructions for the H8/300H variant 7391 in normal mode, and also make `.int' emit 32-bit numbers rather 7392 than the usual (16-bit) for the H8/300 family. 7393 7394 `.h8300sn' 7395 Recognize and emit additional instructions for the H8S variant in 7396 normal mode, and also make `.int' emit 32-bit numbers rather than 7397 the usual (16-bit) for the H8/300 family. 7398 7399 On the H8/300 family (including the H8/300H) `.word' directives 7400 generate 16-bit numbers. 7401 7402 7403 File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent 7404 7405 8.8.5 Opcodes 7406 ------------- 7407 7408 For detailed information on the H8/300 machine instruction set, see 7409 `H8/300 Series Programming Manual'. For information specific to the 7410 H8/300H, see `H8/300H Series Programming Manual' (Renesas). 7411 7412 `as' implements all the standard H8/300 opcodes. No additional 7413 pseudo-instructions are needed on this family. 7414 7415 The following table summarizes the H8/300 opcodes, and their 7416 arguments. Entries marked `*' are opcodes used only on the H8/300H. 7417 7418 Legend: 7419 Rs source register 7420 Rd destination register 7421 abs absolute address 7422 imm immediate data 7423 disp:N N-bit displacement from a register 7424 pcrel:N N-bit displacement relative to program counter 7425 7426 add.b #imm,rd * andc #imm,ccr 7427 add.b rs,rd band #imm,rd 7428 add.w rs,rd band #imm,@rd 7429 * add.w #imm,rd band #imm,@abs:8 7430 * add.l rs,rd bra pcrel:8 7431 * add.l #imm,rd * bra pcrel:16 7432 adds #imm,rd bt pcrel:8 7433 addx #imm,rd * bt pcrel:16 7434 addx rs,rd brn pcrel:8 7435 and.b #imm,rd * brn pcrel:16 7436 and.b rs,rd bf pcrel:8 7437 * and.w rs,rd * bf pcrel:16 7438 * and.w #imm,rd bhi pcrel:8 7439 * and.l #imm,rd * bhi pcrel:16 7440 * and.l rs,rd bls pcrel:8 7441 7442 * bls pcrel:16 bld #imm,rd 7443 bcc pcrel:8 bld #imm,@rd 7444 * bcc pcrel:16 bld #imm,@abs:8 7445 bhs pcrel:8 bnot #imm,rd 7446 * bhs pcrel:16 bnot #imm,@rd 7447 bcs pcrel:8 bnot #imm,@abs:8 7448 * bcs pcrel:16 bnot rs,rd 7449 blo pcrel:8 bnot rs,@rd 7450 * blo pcrel:16 bnot rs,@abs:8 7451 bne pcrel:8 bor #imm,rd 7452 * bne pcrel:16 bor #imm,@rd 7453 beq pcrel:8 bor #imm,@abs:8 7454 * beq pcrel:16 bset #imm,rd 7455 bvc pcrel:8 bset #imm,@rd 7456 * bvc pcrel:16 bset #imm,@abs:8 7457 bvs pcrel:8 bset rs,rd 7458 * bvs pcrel:16 bset rs,@rd 7459 bpl pcrel:8 bset rs,@abs:8 7460 * bpl pcrel:16 bsr pcrel:8 7461 bmi pcrel:8 bsr pcrel:16 7462 * bmi pcrel:16 bst #imm,rd 7463 bge pcrel:8 bst #imm,@rd 7464 * bge pcrel:16 bst #imm,@abs:8 7465 blt pcrel:8 btst #imm,rd 7466 * blt pcrel:16 btst #imm,@rd 7467 bgt pcrel:8 btst #imm,@abs:8 7468 * bgt pcrel:16 btst rs,rd 7469 ble pcrel:8 btst rs,@rd 7470 * ble pcrel:16 btst rs,@abs:8 7471 bclr #imm,rd bxor #imm,rd 7472 bclr #imm,@rd bxor #imm,@rd 7473 bclr #imm,@abs:8 bxor #imm,@abs:8 7474 bclr rs,rd cmp.b #imm,rd 7475 bclr rs,@rd cmp.b rs,rd 7476 bclr rs,@abs:8 cmp.w rs,rd 7477 biand #imm,rd cmp.w rs,rd 7478 biand #imm,@rd * cmp.w #imm,rd 7479 biand #imm,@abs:8 * cmp.l #imm,rd 7480 bild #imm,rd * cmp.l rs,rd 7481 bild #imm,@rd daa rs 7482 bild #imm,@abs:8 das rs 7483 bior #imm,rd dec.b rs 7484 bior #imm,@rd * dec.w #imm,rd 7485 bior #imm,@abs:8 * dec.l #imm,rd 7486 bist #imm,rd divxu.b rs,rd 7487 bist #imm,@rd * divxu.w rs,rd 7488 bist #imm,@abs:8 * divxs.b rs,rd 7489 bixor #imm,rd * divxs.w rs,rd 7490 bixor #imm,@rd eepmov 7491 bixor #imm,@abs:8 * eepmovw 7492 7493 * exts.w rd mov.w rs,@abs:16 7494 * exts.l rd * mov.l #imm,rd 7495 * extu.w rd * mov.l rs,rd 7496 * extu.l rd * mov.l @rs,rd 7497 inc rs * mov.l @(disp:16,rs),rd 7498 * inc.w #imm,rd * mov.l @(disp:24,rs),rd 7499 * inc.l #imm,rd * mov.l @rs+,rd 7500 jmp @rs * mov.l @abs:16,rd 7501 jmp abs * mov.l @abs:24,rd 7502 jmp @@abs:8 * mov.l rs,@rd 7503 jsr @rs * mov.l rs,@(disp:16,rd) 7504 jsr abs * mov.l rs,@(disp:24,rd) 7505 jsr @@abs:8 * mov.l rs,@-rd 7506 ldc #imm,ccr * mov.l rs,@abs:16 7507 ldc rs,ccr * mov.l rs,@abs:24 7508 * ldc @abs:16,ccr movfpe @abs:16,rd 7509 * ldc @abs:24,ccr movtpe rs,@abs:16 7510 * ldc @(disp:16,rs),ccr mulxu.b rs,rd 7511 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd 7512 * ldc @rs+,ccr * mulxs.b rs,rd 7513 * ldc @rs,ccr * mulxs.w rs,rd 7514 * mov.b @(disp:24,rs),rd neg.b rs 7515 * mov.b rs,@(disp:24,rd) * neg.w rs 7516 mov.b @abs:16,rd * neg.l rs 7517 mov.b rs,rd nop 7518 mov.b @abs:8,rd not.b rs 7519 mov.b rs,@abs:8 * not.w rs 7520 mov.b rs,rd * not.l rs 7521 mov.b #imm,rd or.b #imm,rd 7522 mov.b @rs,rd or.b rs,rd 7523 mov.b @(disp:16,rs),rd * or.w #imm,rd 7524 mov.b @rs+,rd * or.w rs,rd 7525 mov.b @abs:8,rd * or.l #imm,rd 7526 mov.b rs,@rd * or.l rs,rd 7527 mov.b rs,@(disp:16,rd) orc #imm,ccr 7528 mov.b rs,@-rd pop.w rs 7529 mov.b rs,@abs:8 * pop.l rs 7530 mov.w rs,@rd push.w rs 7531 * mov.w @(disp:24,rs),rd * push.l rs 7532 * mov.w rs,@(disp:24,rd) rotl.b rs 7533 * mov.w @abs:24,rd * rotl.w rs 7534 * mov.w rs,@abs:24 * rotl.l rs 7535 mov.w rs,rd rotr.b rs 7536 mov.w #imm,rd * rotr.w rs 7537 mov.w @rs,rd * rotr.l rs 7538 mov.w @(disp:16,rs),rd rotxl.b rs 7539 mov.w @rs+,rd * rotxl.w rs 7540 mov.w @abs:16,rd * rotxl.l rs 7541 mov.w rs,@(disp:16,rd) rotxr.b rs 7542 mov.w rs,@-rd * rotxr.w rs 7543 7544 * rotxr.l rs * stc ccr,@(disp:24,rd) 7545 bpt * stc ccr,@-rd 7546 rte * stc ccr,@abs:16 7547 rts * stc ccr,@abs:24 7548 shal.b rs sub.b rs,rd 7549 * shal.w rs sub.w rs,rd 7550 * shal.l rs * sub.w #imm,rd 7551 shar.b rs * sub.l rs,rd 7552 * shar.w rs * sub.l #imm,rd 7553 * shar.l rs subs #imm,rd 7554 shll.b rs subx #imm,rd 7555 * shll.w rs subx rs,rd 7556 * shll.l rs * trapa #imm 7557 shlr.b rs xor #imm,rd 7558 * shlr.w rs xor rs,rd 7559 * shlr.l rs * xor.w #imm,rd 7560 sleep * xor.w rs,rd 7561 stc ccr,rd * xor.l #imm,rd 7562 * stc ccr,@rs * xor.l rs,rd 7563 * stc ccr,@(disp:16,rd) xorc #imm,ccr 7564 7565 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined 7566 with variants using the suffixes `.b', `.w', and `.l' to specify the 7567 size of a memory operand. `as' supports these suffixes, but does not 7568 require them; since one of the operands is always a register, `as' can 7569 deduce the correct size. 7570 7571 For example, since `r0' refers to a 16-bit register, 7572 mov r0,@foo 7573 is equivalent to 7574 mov.w r0,@foo 7575 7576 If you use the size suffixes, `as' issues a warning when the suffix 7577 and the register size do not match. 7578 7579 7580 File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies 7581 7582 8.9 HPPA Dependent Features 7583 =========================== 7584 7585 * Menu: 7586 7587 * HPPA Notes:: Notes 7588 * HPPA Options:: Options 7589 * HPPA Syntax:: Syntax 7590 * HPPA Floating Point:: Floating Point 7591 * HPPA Directives:: HPPA Machine Directives 7592 * HPPA Opcodes:: Opcodes 7593 7594 7595 File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent 7596 7597 8.9.1 Notes 7598 ----------- 7599 7600 As a back end for GNU CC `as' has been throughly tested and should work 7601 extremely well. We have tested it only minimally on hand written 7602 assembly code and no one has tested it much on the assembly output from 7603 the HP compilers. 7604 7605 The format of the debugging sections has changed since the original 7606 `as' port (version 1.3X) was released; therefore, you must rebuild all 7607 HPPA objects and libraries with the new assembler so that you can debug 7608 the final executable. 7609 7610 The HPPA `as' port generates a small subset of the relocations 7611 available in the SOM and ELF object file formats. Additional relocation 7612 support will be added as it becomes necessary. 7613 7614 7615 File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent 7616 7617 8.9.2 Options 7618 ------------- 7619 7620 `as' has no machine-dependent command-line options for the HPPA. 7621 7622 7623 File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent 7624 7625 8.9.3 Syntax 7626 ------------ 7627 7628 The assembler syntax closely follows the HPPA instruction set reference 7629 manual; assembler directives and general syntax closely follow the HPPA 7630 assembly language reference manual, with a few noteworthy differences. 7631 7632 First, a colon may immediately follow a label definition. This is 7633 simply for compatibility with how most assembly language programmers 7634 write code. 7635 7636 Some obscure expression parsing problems may affect hand written 7637 code which uses the `spop' instructions, or code which makes significant 7638 use of the `!' line separator. 7639 7640 `as' is much less forgiving about missing arguments and other 7641 similar oversights than the HP assembler. `as' notifies you of missing 7642 arguments as syntax errors; this is regarded as a feature, not a bug. 7643 7644 Finally, `as' allows you to use an external symbol without 7645 explicitly importing the symbol. _Warning:_ in the future this will be 7646 an error for HPPA targets. 7647 7648 Special characters for HPPA targets include: 7649 7650 `;' is the line comment character. 7651 7652 `!' can be used instead of a newline to separate statements. 7653 7654 Since `$' has no special meaning, you may use it in symbol names. 7655 7656 7657 File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent 7658 7659 8.9.4 Floating Point 7660 -------------------- 7661 7662 The HPPA family uses IEEE floating-point numbers. 7663 7664 7665 File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent 7666 7667 8.9.5 HPPA Assembler Directives 7668 ------------------------------- 7669 7670 `as' for the HPPA supports many additional directives for compatibility 7671 with the native assembler. This section describes them only briefly. 7672 For detailed information on HPPA-specific assembler directives, see 7673 `HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001). 7674 7675 `as' does _not_ support the following assembler directives described 7676 in the HP manual: 7677 7678 .endm .liston 7679 .enter .locct 7680 .leave .macro 7681 .listoff 7682 7683 Beyond those implemented for compatibility, `as' supports one 7684 additional assembler directive for the HPPA: `.param'. It conveys 7685 register argument locations for static functions. Its syntax closely 7686 follows the `.export' directive. 7687 7688 These are the additional directives in `as' for the HPPA: 7689 7690 `.block N' 7691 `.blockz N' 7692 Reserve N bytes of storage, and initialize them to zero. 7693 7694 `.call' 7695 Mark the beginning of a procedure call. Only the special case 7696 with _no arguments_ is allowed. 7697 7698 `.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]' 7699 Specify a number of parameters and flags that define the 7700 environment for a procedure. 7701 7702 PARAM may be any of `frame' (frame size), `entry_gr' (end of 7703 general register range), `entry_fr' (end of float register range), 7704 `entry_sr' (end of space register range). 7705 7706 The values for FLAG are `calls' or `caller' (proc has 7707 subroutines), `no_calls' (proc does not call subroutines), 7708 `save_rp' (preserve return pointer), `save_sp' (proc preserves 7709 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int' 7710 (proc is interrupt routine). 7711 7712 `.code' 7713 Assemble into the standard section called `$TEXT$', subsection 7714 `$CODE$'. 7715 7716 `.copyright "STRING"' 7717 In the SOM object format, insert STRING into the object code, 7718 marked as a copyright string. 7719 7720 `.copyright "STRING"' 7721 In the ELF object format, insert STRING into the object code, 7722 marked as a version string. 7723 7724 `.enter' 7725 Not yet supported; the assembler rejects programs containing this 7726 directive. 7727 7728 `.entry' 7729 Mark the beginning of a procedure. 7730 7731 `.exit' 7732 Mark the end of a procedure. 7733 7734 `.export NAME [ ,TYP ] [ ,PARAM=R ]' 7735 Make a procedure NAME available to callers. TYP, if present, must 7736 be one of `absolute', `code' (ELF only, not SOM), `data', `entry', 7737 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'. 7738 7739 PARAM, if present, provides either relocation information for the 7740 procedure arguments and result, or a privilege level. PARAM may be 7741 `argwN' (where N ranges from `0' to `3', and indicates one of four 7742 one-word arguments); `rtnval' (the procedure's result); or 7743 `priv_lev' (privilege level). For arguments or the result, R 7744 specifies how to relocate, and must be one of `no' (not 7745 relocatable), `gr' (argument is in general register), `fr' (in 7746 floating point register), or `fu' (upper half of float register). 7747 For `priv_lev', R is an integer. 7748 7749 `.half N' 7750 Define a two-byte integer constant N; synonym for the portable 7751 `as' directive `.short'. 7752 7753 `.import NAME [ ,TYP ]' 7754 Converse of `.export'; make a procedure available to call. The 7755 arguments use the same conventions as the first two arguments for 7756 `.export'. 7757 7758 `.label NAME' 7759 Define NAME as a label for the current assembly location. 7760 7761 `.leave' 7762 Not yet supported; the assembler rejects programs containing this 7763 directive. 7764 7765 `.origin LC' 7766 Advance location counter to LC. Synonym for the `as' portable 7767 directive `.org'. 7768 7769 `.param NAME [ ,TYP ] [ ,PARAM=R ]' 7770 Similar to `.export', but used for static procedures. 7771 7772 `.proc' 7773 Use preceding the first statement of a procedure. 7774 7775 `.procend' 7776 Use following the last statement of a procedure. 7777 7778 `LABEL .reg EXPR' 7779 Synonym for `.equ'; define LABEL with the absolute expression EXPR 7780 as its value. 7781 7782 `.space SECNAME [ ,PARAMS ]' 7783 Switch to section SECNAME, creating a new section by that name if 7784 necessary. You may only use PARAMS when creating a new section, 7785 not when switching to an existing one. SECNAME may identify a 7786 section by number rather than by name. 7787 7788 If specified, the list PARAMS declares attributes of the section, 7789 identified by keywords. The keywords recognized are `spnum=EXP' 7790 (identify this section by the number EXP, an absolute expression), 7791 `sort=EXP' (order sections according to this sort key when linking; 7792 EXP is an absolute expression), `unloadable' (section contains no 7793 loadable data), `notdefined' (this section defined elsewhere), and 7794 `private' (data in this section not available to other programs). 7795 7796 `.spnum SECNAM' 7797 Allocate four bytes of storage, and initialize them with the 7798 section number of the section named SECNAM. (You can define the 7799 section number with the HPPA `.space' directive.) 7800 7801 `.string "STR"' 7802 Copy the characters in the string STR to the object file. *Note 7803 Strings: Strings, for information on escape sequences you can use 7804 in `as' strings. 7805 7806 _Warning!_ The HPPA version of `.string' differs from the usual 7807 `as' definition: it does _not_ write a zero byte after copying STR. 7808 7809 `.stringz "STR"' 7810 Like `.string', but appends a zero byte after copying STR to object 7811 file. 7812 7813 `.subspa NAME [ ,PARAMS ]' 7814 `.nsubspa NAME [ ,PARAMS ]' 7815 Similar to `.space', but selects a subsection NAME within the 7816 current section. You may only specify PARAMS when you create a 7817 subsection (in the first instance of `.subspa' for this NAME). 7818 7819 If specified, the list PARAMS declares attributes of the 7820 subsection, identified by keywords. The keywords recognized are 7821 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR' 7822 (alignment for beginning of this subsection; a power of two), 7823 `access=EXPR' (value for "access rights" field), `sort=EXPR' 7824 (sorting order for this subspace in link), `code_only' (subsection 7825 contains only code), `unloadable' (subsection cannot be loaded 7826 into memory), `comdat' (subsection is comdat), `common' 7827 (subsection is common block), `dup_comm' (subsection may have 7828 duplicate names), or `zero' (subsection is all zeros, do not write 7829 in object file). 7830 7831 `.nsubspa' always creates a new subspace with the given name, even 7832 if one with the same name already exists. 7833 7834 `comdat', `common' and `dup_comm' can be used to implement various 7835 flavors of one-only support when using the SOM linker. The SOM 7836 linker only supports specific combinations of these flags. The 7837 details are not documented. A brief description is provided here. 7838 7839 `comdat' provides a form of linkonce support. It is useful for 7840 both code and data subspaces. A `comdat' subspace has a key symbol 7841 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first 7842 subspace for any given key is selected. The key symbol becomes 7843 universal in shared links. This is similar to the behavior of 7844 `secondary_def' symbols. 7845 7846 `common' provides Fortran named common support. It is only useful 7847 for data subspaces. Symbols with the flag `is_common' retain this 7848 flag in shared links. Referencing a `is_common' symbol in a shared 7849 library from outside the library doesn't work. Thus, `is_common' 7850 symbols must be output whenever they are needed. 7851 7852 `common' and `dup_comm' together provide Cobol common support. 7853 The subspaces in this case must all be the same length. 7854 Otherwise, this support is similar to the Fortran common support. 7855 7856 `dup_comm' by itself provides a type of one-only support for code. 7857 Only the first `dup_comm' subspace is selected. There is a rather 7858 complex algorithm to compare subspaces. Code symbols marked with 7859 the `dup_common' flag are hidden. This support was intended for 7860 "C++ duplicate inlines". 7861 7862 A simplified technique is used to mark the flags of symbols based 7863 on the flags of their subspace. A symbol with the scope 7864 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with 7865 the corresponding settings of `comdat', `common' and `dup_comm' 7866 from the subspace, respectively. This avoids having to introduce 7867 additional directives to mark these symbols. The HP assembler 7868 sets `is_common' from `common'. However, it doesn't set the 7869 `dup_common' from `dup_comm'. It doesn't have `comdat' support. 7870 7871 `.version "STR"' 7872 Write STR as version identifier in object code. 7873 7874 7875 File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent 7876 7877 8.9.6 Opcodes 7878 ------------- 7879 7880 For detailed information on the HPPA machine instruction set, see 7881 `PA-RISC Architecture and Instruction Set Reference Manual' (HP 7882 09740-90039). 7883 7884 7885 File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies 7886 7887 8.10 ESA/390 Dependent Features 7888 =============================== 7889 7890 * Menu: 7891 7892 * ESA/390 Notes:: Notes 7893 * ESA/390 Options:: Options 7894 * ESA/390 Syntax:: Syntax 7895 * ESA/390 Floating Point:: Floating Point 7896 * ESA/390 Directives:: ESA/390 Machine Directives 7897 * ESA/390 Opcodes:: Opcodes 7898 7899 7900 File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent 7901 7902 8.10.1 Notes 7903 ------------ 7904 7905 The ESA/390 `as' port is currently intended to be a back-end for the 7906 GNU CC compiler. It is not HLASM compatible, although it does support 7907 a subset of some of the HLASM directives. The only supported binary 7908 file format is ELF; none of the usual MVS/VM/OE/USS object file 7909 formats, such as ESD or XSD, are supported. 7910 7911 When used with the GNU CC compiler, the ESA/390 `as' will produce 7912 correct, fully relocated, functional binaries, and has been used to 7913 compile and execute large projects. However, many aspects should still 7914 be considered experimental; these include shared library support, 7915 dynamically loadable objects, and any relocation other than the 31-bit 7916 relocation. 7917 7918 7919 File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent 7920 7921 8.10.2 Options 7922 -------------- 7923 7924 `as' has no machine-dependent command-line options for the ESA/390. 7925 7926 7927 File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent 7928 7929 8.10.3 Syntax 7930 ------------- 7931 7932 The opcode/operand syntax follows the ESA/390 Principles of Operation 7933 manual; assembler directives and general syntax are loosely based on the 7934 prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives 7935 are _not_ supported for the most part, with the exception of those 7936 described herein. 7937 7938 A leading dot in front of directives is optional, and the case of 7939 directives is ignored; thus for example, .using and USING have the same 7940 effect. 7941 7942 A colon may immediately follow a label definition. This is simply 7943 for compatibility with how most assembly language programmers write 7944 code. 7945 7946 `#' is the line comment character. 7947 7948 `;' can be used instead of a newline to separate statements. 7949 7950 Since `$' has no special meaning, you may use it in symbol names. 7951 7952 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, 7953 fp6. By using thesse symbolic names, `as' can detect simple syntax 7954 errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for 7955 r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base 7956 for r3 and rpgt or r.pgt for r4. 7957 7958 `*' is the current location counter. Unlike `.' it is always 7959 relative to the last USING directive. Note that this means that 7960 expressions cannot use multiplication, as any occurrence of `*' will be 7961 interpreted as a location counter. 7962 7963 All labels are relative to the last USING. Thus, branches to a label 7964 always imply the use of base+displacement. 7965 7966 Many of the usual forms of address constants / address literals are 7967 supported. Thus, 7968 .using *,r3 7969 L r15,=A(some_routine) 7970 LM r6,r7,=V(some_longlong_extern) 7971 A r1,=F'12' 7972 AH r0,=H'42' 7973 ME r6,=E'3.1416' 7974 MD r6,=D'3.14159265358979' 7975 O r6,=XL4'cacad0d0' 7976 .ltorg 7977 should all behave as expected: that is, an entry in the literal pool 7978 will be created (or reused if it already exists), and the instruction 7979 operands will be the displacement into the literal pool using the 7980 current base register (as last declared with the `.using' directive). 7981 7982 7983 File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent 7984 7985 8.10.4 Floating Point 7986 --------------------- 7987 7988 The assembler generates only IEEE floating-point numbers. The older 7989 floating point formats are not supported. 7990 7991 7992 File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent 7993 7994 8.10.5 ESA/390 Assembler Directives 7995 ----------------------------------- 7996 7997 `as' for the ESA/390 supports all of the standard ELF/SVR4 assembler 7998 directives that are documented in the main part of this documentation. 7999 Several additional directives are supported in order to implement the 8000 ESA/390 addressing model. The most important of these are `.using' and 8001 `.ltorg' 8002 8003 These are the additional directives in `as' for the ESA/390: 8004 8005 `.dc' 8006 A small subset of the usual DC directive is supported. 8007 8008 `.drop REGNO' 8009 Stop using REGNO as the base register. The REGNO must have been 8010 previously declared with a `.using' directive in the same section 8011 as the current section. 8012 8013 `.ebcdic STRING' 8014 Emit the EBCDIC equivalent of the indicated string. The emitted 8015 string will be null terminated. Note that the directives 8016 `.string' etc. emit ascii strings by default. 8017 8018 `EQU' 8019 The standard HLASM-style EQU directive is not supported; however, 8020 the standard `as' directive .equ can be used to the same effect. 8021 8022 `.ltorg' 8023 Dump the literal pool accumulated so far; begin a new literal pool. 8024 The literal pool will be written in the current section; in order 8025 to generate correct assembly, a `.using' must have been previously 8026 specified in the same section. 8027 8028 `.using EXPR,REGNO' 8029 Use REGNO as the base register for all subsequent RX, RS, and SS 8030 form instructions. The EXPR will be evaluated to obtain the base 8031 address; usually, EXPR will merely be `*'. 8032 8033 This assembler allows two `.using' directives to be simultaneously 8034 outstanding, one in the `.text' section, and one in another section 8035 (typically, the `.data' section). This feature allows dynamically 8036 loaded objects to be implemented in a relatively straightforward 8037 way. A `.using' directive must always be specified in the `.text' 8038 section; this will specify the base register that will be used for 8039 branches in the `.text' section. A second `.using' may be 8040 specified in another section; this will specify the base register 8041 that is used for non-label address literals. When a second 8042 `.using' is specified, then the subsequent `.ltorg' must be put in 8043 the same section; otherwise an error will result. 8044 8045 Thus, for example, the following code uses `r3' to address branch 8046 targets and `r4' to address the literal pool, which has been 8047 written to the `.data' section. The is, the constants 8048 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in 8049 the `.data' section. 8050 8051 .data 8052 .using LITPOOL,r4 8053 .text 8054 BASR r3,0 8055 .using *,r3 8056 B START 8057 .long LITPOOL 8058 START: 8059 L r4,4(,r3) 8060 L r15,=A(some_routine) 8061 LTR r15,r15 8062 BNE LABEL 8063 AH r0,=H'42' 8064 LABEL: 8065 ME r6,=E'3.1416' 8066 .data 8067 LITPOOL: 8068 .ltorg 8069 8070 Note that this dual-`.using' directive semantics extends and is 8071 not compatible with HLASM semantics. Note that this assembler 8072 directive does not support the full range of HLASM semantics. 8073 8074 8075 8076 File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent 8077 8078 8.10.6 Opcodes 8079 -------------- 8080 8081 For detailed information on the ESA/390 machine instruction set, see 8082 `ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004). 8083 8084 8085 File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies 8086 8087 8.11 80386 Dependent Features 8088 ============================= 8089 8090 The i386 version `as' supports both the original Intel 386 8091 architecture in both 16 and 32-bit mode as well as AMD x86-64 8092 architecture extending the Intel architecture to 64-bits. 8093 8094 * Menu: 8095 8096 * i386-Options:: Options 8097 * i386-Syntax:: AT&T Syntax versus Intel Syntax 8098 * i386-Mnemonics:: Instruction Naming 8099 * i386-Regs:: Register Naming 8100 * i386-Prefixes:: Instruction Prefixes 8101 * i386-Memory:: Memory References 8102 * i386-Jumps:: Handling of Jump Instructions 8103 * i386-Float:: Floating Point 8104 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 8105 * i386-16bit:: Writing 16-bit Code 8106 * i386-Arch:: Specifying an x86 CPU architecture 8107 * i386-Bugs:: AT&T Syntax bugs 8108 * i386-Notes:: Notes 8109 8110 8111 File: as.info, Node: i386-Options, Next: i386-Syntax, Up: i386-Dependent 8112 8113 8.11.1 Options 8114 -------------- 8115 8116 The i386 version of `as' has a few machine dependent options: 8117 8118 `--32 | --64' 8119 Select the word size, either 32 bits or 64 bits. Selecting 32-bit 8120 implies Intel i386 architecture, while 64-bit implies AMD x86-64 8121 architecture. 8122 8123 These options are only available with the ELF object file format, 8124 and require that the necessary BFD support has been included (on a 8125 32-bit platform you have to add -enable-64-bit-bfd to configure 8126 enable 64-bit usage and use x86-64 as target platform). 8127 8128 `-n' 8129 By default, x86 GAS replaces multiple nop instructions used for 8130 alignment within code sections with multi-byte nop instructions 8131 such as leal 0(%esi,1),%esi. This switch disables the 8132 optimization. 8133 8134 `--divide' 8135 On SVR4-derived platforms, the character `/' is treated as a 8136 comment character, which means that it cannot be used in 8137 expressions. The `--divide' option turns `/' into a normal 8138 character. This does not disable `/' at the beginning of a line 8139 starting a comment, or affect using `#' for starting a comment. 8140 8141 8142 8143 File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Options, Up: i386-Dependent 8144 8145 8.11.2 AT&T Syntax versus Intel Syntax 8146 -------------------------------------- 8147 8148 `as' now supports assembly using Intel assembler syntax. 8149 `.intel_syntax' selects Intel mode, and `.att_syntax' switches back to 8150 the usual AT&T mode for compatibility with the output of `gcc'. Either 8151 of these directives may have an optional argument, `prefix', or 8152 `noprefix' specifying whether registers require a `%' prefix. AT&T 8153 System V/386 assembler syntax is quite different from Intel syntax. We 8154 mention these differences because almost all 80386 documents use Intel 8155 syntax. Notable differences between the two syntaxes are: 8156 8157 * AT&T immediate operands are preceded by `$'; Intel immediate 8158 operands are undelimited (Intel `push 4' is AT&T `pushl $4'). 8159 AT&T register operands are preceded by `%'; Intel register operands 8160 are undelimited. AT&T absolute (as opposed to PC relative) 8161 jump/call operands are prefixed by `*'; they are undelimited in 8162 Intel syntax. 8163 8164 * AT&T and Intel syntax use the opposite order for source and 8165 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The 8166 `source, dest' convention is maintained for compatibility with 8167 previous Unix assemblers. Note that instructions with more than 8168 one source operand, such as the `enter' instruction, do _not_ have 8169 reversed order. *Note i386-Bugs::. 8170 8171 * In AT&T syntax the size of memory operands is determined from the 8172 last character of the instruction mnemonic. Mnemonic suffixes of 8173 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long 8174 (32-bit) and quadruple word (64-bit) memory references. Intel 8175 syntax accomplishes this by prefixing memory operands (_not_ the 8176 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr' 8177 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO, 8178 %al' in AT&T syntax. 8179 8180 * Immediate form long jumps and calls are `lcall/ljmp $SECTION, 8181 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far 8182 SECTION:OFFSET'. Also, the far return instruction is `lret 8183 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far 8184 STACK-ADJUST'. 8185 8186 * The AT&T assembler does not provide support for multiple section 8187 programs. Unix style systems expect all programs to be single 8188 sections. 8189 8190 8191 File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent 8192 8193 8.11.3 Instruction Naming 8194 ------------------------- 8195 8196 Instruction mnemonics are suffixed with one character modifiers which 8197 specify the size of operands. The letters `b', `w', `l' and `q' 8198 specify byte, word, long and quadruple word operands. If no suffix is 8199 specified by an instruction then `as' tries to fill in the missing 8200 suffix based on the destination register operand (the last one by 8201 convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx'; 8202 also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is 8203 incompatible with the AT&T Unix assembler which assumes that a missing 8204 mnemonic suffix implies long operand size. (This incompatibility does 8205 not affect compiler output since compilers always explicitly specify 8206 the mnemonic suffix.) 8207 8208 Almost all instructions have the same names in AT&T and Intel format. 8209 There are a few exceptions. The sign extend and zero extend 8210 instructions need two sizes to specify them. They need a size to 8211 sign/zero extend _from_ and a size to zero extend _to_. This is 8212 accomplished by using two instruction mnemonic suffixes in AT&T syntax. 8213 Base names for sign extend and zero extend are `movs...' and `movz...' 8214 in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction 8215 mnemonic suffixes are tacked on to this base name, the _from_ suffix 8216 before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for 8217 "move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are 8218 `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to 8219 long), `bq' (from byte to quadruple word), `wq' (from word to quadruple 8220 word), and `lq' (from long to quadruple word). 8221 8222 The Intel-syntax conversion instructions 8223 8224 * `cbw' -- sign-extend byte in `%al' to word in `%ax', 8225 8226 * `cwde' -- sign-extend word in `%ax' to long in `%eax', 8227 8228 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax', 8229 8230 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax', 8231 8232 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64 8233 only), 8234 8235 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax' 8236 (x86-64 only), 8237 8238 are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T 8239 naming. `as' accepts either naming for these instructions. 8240 8241 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, 8242 but are `call far' and `jump far' in Intel convention. 8243 8244 8245 File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent 8246 8247 8.11.4 Register Naming 8248 ---------------------- 8249 8250 Register operands are always prefixed with `%'. The 80386 registers 8251 consist of 8252 8253 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx', 8254 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp' 8255 (the stack pointer). 8256 8257 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di', 8258 `%si', `%bp', and `%sp'. 8259 8260 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl', 8261 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax', 8262 `%bx', `%cx', and `%dx') 8263 8264 * the 6 section registers `%cs' (code section), `%ds' (data 8265 section), `%ss' (stack section), `%es', `%fs', and `%gs'. 8266 8267 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'. 8268 8269 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and 8270 `%db7'. 8271 8272 * the 2 test registers `%tr6' and `%tr7'. 8273 8274 * the 8 floating point register stack `%st' or equivalently 8275 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)', 8276 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX 8277 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6' 8278 and `%mm7'. 8279 8280 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3', 8281 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'. 8282 8283 The AMD x86-64 architecture extends the register set by: 8284 8285 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the 8286 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the 8287 frame pointer), `%rsp' (the stack pointer) 8288 8289 * the 8 extended registers `%r8'-`%r15'. 8290 8291 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d' 8292 8293 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w' 8294 8295 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b' 8296 8297 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'. 8298 8299 * the 8 debug registers: `%db8'-`%db15'. 8300 8301 * the 8 SSE registers: `%xmm8'-`%xmm15'. 8302 8303 8304 File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent 8305 8306 8.11.5 Instruction Prefixes 8307 --------------------------- 8308 8309 Instruction prefixes are used to modify the following instruction. They 8310 are used to repeat string instructions, to provide section overrides, to 8311 perform bus lock operations, and to change operand and address sizes. 8312 (Most instructions that normally operate on 32-bit operands will use 8313 16-bit operands if the instruction has an "operand size" prefix.) 8314 Instruction prefixes are best written on the same line as the 8315 instruction they act upon. For example, the `scas' (scan string) 8316 instruction is repeated with: 8317 8318 repne scas %es:(%edi),%al 8319 8320 You may also place prefixes on the lines immediately preceding the 8321 instruction, but this circumvents checks that `as' does with prefixes, 8322 and will not work with all prefixes. 8323 8324 Here is a list of instruction prefixes: 8325 8326 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'. 8327 These are automatically added by specifying using the 8328 SECTION:MEMORY-OPERAND form for memory references. 8329 8330 * Operand/Address size prefixes `data16' and `addr16' change 32-bit 8331 operands/addresses into 16-bit operands/addresses, while `data32' 8332 and `addr32' change 16-bit ones (in a `.code16' section) into 8333 32-bit operands/addresses. These prefixes _must_ appear on the 8334 same line of code as the instruction they modify. For example, in 8335 a 16-bit `.code16' section, you might write: 8336 8337 addr32 jmpl *(%ebx) 8338 8339 * The bus lock prefix `lock' inhibits interrupts during execution of 8340 the instruction it precedes. (This is only valid with certain 8341 instructions; see a 80386 manual for details). 8342 8343 * The wait for coprocessor prefix `wait' waits for the coprocessor to 8344 complete the current instruction. This should never be needed for 8345 the 80386/80387 combination. 8346 8347 * The `rep', `repe', and `repne' prefixes are added to string 8348 instructions to make them repeat `%ecx' times (`%cx' times if the 8349 current address size is 16-bits). 8350 8351 * The `rex' family of prefixes is used by x86-64 to encode 8352 extensions to i386 instruction set. The `rex' prefix has four 8353 bits -- an operand size overwrite (`64') used to change operand 8354 size from 32-bit to 64-bit and X, Y and Z extensions bits used to 8355 extend the register set. 8356 8357 You may write the `rex' prefixes directly. The `rex64xyz' 8358 instruction emits `rex' prefix with all the bits set. By omitting 8359 the `64', `x', `y' or `z' you may write other prefixes as well. 8360 Normally, there is no need to write the prefixes explicitly, since 8361 gas will automatically generate them based on the instruction 8362 operands. 8363 8364 8365 File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent 8366 8367 8.11.6 Memory References 8368 ------------------------ 8369 8370 An Intel syntax indirect memory reference of the form 8371 8372 SECTION:[BASE + INDEX*SCALE + DISP] 8373 8374 is translated into the AT&T syntax 8375 8376 SECTION:DISP(BASE, INDEX, SCALE) 8377 8378 where BASE and INDEX are the optional 32-bit base and index registers, 8379 DISP is the optional displacement, and SCALE, taking the values 1, 2, 8380 4, and 8, multiplies INDEX to calculate the address of the operand. If 8381 no SCALE is specified, SCALE is taken to be 1. SECTION specifies the 8382 optional section register for the memory operand, and may override the 8383 default section register (see a 80386 manual for section register 8384 defaults). Note that section overrides in AT&T syntax _must_ be 8385 preceded by a `%'. If you specify a section override which coincides 8386 with the default section register, `as' does _not_ output any section 8387 register override prefixes to assemble the given instruction. Thus, 8388 section overrides can be specified to emphasize which section register 8389 is used for a given memory operand. 8390 8391 Here are some examples of Intel and AT&T style memory references: 8392 8393 AT&T: `-4(%ebp)', Intel: `[ebp - 4]' 8394 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default 8395 section is used (`%ss' for addressing with `%ebp' as the base 8396 register). INDEX, SCALE are both missing. 8397 8398 AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]' 8399 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other 8400 fields are missing. The section register here defaults to `%ds'. 8401 8402 AT&T: `foo(,1)'; Intel `[foo]' 8403 This uses the value pointed to by `foo' as a memory operand. Note 8404 that BASE and INDEX are both missing, but there is only _one_ `,'. 8405 This is a syntactic exception. 8406 8407 AT&T: `%gs:foo'; Intel `gs:foo' 8408 This selects the contents of the variable `foo' with section 8409 register SECTION being `%gs'. 8410 8411 Absolute (as opposed to PC relative) call and jump operands must be 8412 prefixed with `*'. If no `*' is specified, `as' always chooses PC 8413 relative addressing for jump/call labels. 8414 8415 Any instruction that has a memory operand, but no register operand, 8416 _must_ specify its size (byte, word, long, or quadruple) with an 8417 instruction mnemonic suffix (`b', `w', `l' or `q', respectively). 8418 8419 The x86-64 architecture adds an RIP (instruction pointer relative) 8420 addressing. This addressing mode is specified by using `rip' as a base 8421 register. Only constant offsets are valid. For example: 8422 8423 AT&T: `1234(%rip)', Intel: `[rip + 1234]' 8424 Points to the address 1234 bytes past the end of the current 8425 instruction. 8426 8427 AT&T: `symbol(%rip)', Intel: `[rip + symbol]' 8428 Points to the `symbol' in RIP relative way, this is shorter than 8429 the default absolute addressing. 8430 8431 Other addressing modes remain unchanged in x86-64 architecture, 8432 except registers used are 64-bit instead of 32-bit. 8433 8434 8435 File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent 8436 8437 8.11.7 Handling of Jump Instructions 8438 ------------------------------------ 8439 8440 Jump instructions are always optimized to use the smallest possible 8441 displacements. This is accomplished by using byte (8-bit) displacement 8442 jumps whenever the target is sufficiently close. If a byte displacement 8443 is insufficient a long displacement is used. We do not support word 8444 (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump 8445 instruction with the `data16' instruction prefix), since the 80386 8446 insists upon masking `%eip' to 16 bits after the word displacement is 8447 added. (See also *note i386-Arch::) 8448 8449 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz' 8450 and `loopne' instructions only come in byte displacements, so that if 8451 you use these instructions (`gcc' does not use them) you may get an 8452 error message (and incorrect code). The AT&T 80386 assembler tries to 8453 get around this problem by expanding `jcxz foo' to 8454 8455 jcxz cx_zero 8456 jmp cx_nonzero 8457 cx_zero: jmp foo 8458 cx_nonzero: 8459 8460 8461 File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent 8462 8463 8.11.8 Floating Point 8464 --------------------- 8465 8466 All 80387 floating point types except packed BCD are supported. (BCD 8467 support may be added without much difficulty). These data types are 8468 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), 8469 and extended (80-bit) precision floating point. Each supported type 8470 has an instruction mnemonic suffix and a constructor associated with 8471 it. Instruction mnemonic suffixes specify the operand's data type. 8472 Constructors build these data types into memory. 8473 8474 * Floating point constructors are `.float' or `.single', `.double', 8475 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond 8476 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for 8477 80-bit (ten byte) real. The 80387 only supports this format via 8478 the `fldt' (load 80-bit real to stack top) and `fstpt' (store 8479 80-bit real and pop stack) instructions. 8480 8481 * Integer constructors are `.word', `.long' or `.int', and `.quad' 8482 for the 16-, 32-, and 64-bit integer formats. The corresponding 8483 instruction mnemonic suffixes are `s' (single), `l' (long), and 8484 `q' (quad). As with the 80-bit real format, the 64-bit `q' format 8485 is only present in the `fildq' (load quad integer to stack top) 8486 and `fistpq' (store quad integer and pop stack) instructions. 8487 8488 Register to register operations should not use instruction mnemonic 8489 suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as 8490 if you wrote `fst %st, %st(1)', since all register to register 8491 operations use 80-bit floating point operands. (Contrast this with 8492 `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating 8493 point format, then stores the result in the 4 byte location `mem') 8494 8495 8496 File: as.info, Node: i386-SIMD, Next: i386-16bit, Prev: i386-Float, Up: i386-Dependent 8497 8498 8.11.9 Intel's MMX and AMD's 3DNow! SIMD Operations 8499 --------------------------------------------------- 8500 8501 `as' supports Intel's MMX instruction set (SIMD instructions for 8502 integer data), available on Intel's Pentium MMX processors and Pentium 8503 II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and 8504 probably others. It also supports AMD's 3DNow! instruction set (SIMD 8505 instructions for 32-bit floating point data) available on AMD's K6-2 8506 processor and possibly others in the future. 8507 8508 Currently, `as' does not support Intel's floating point SIMD, Katmai 8509 (KNI). 8510 8511 The eight 64-bit MMX operands, also used by 3DNow!, are called 8512 `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 8513 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit 8514 floating point values. The MMX registers cannot be used at the same 8515 time as the floating point stack. 8516 8517 See Intel and AMD documentation, keeping in mind that the operand 8518 order in instructions is reversed from the Intel syntax. 8519 8520 8521 File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-SIMD, Up: i386-Dependent 8522 8523 8.11.10 Writing 16-bit Code 8524 --------------------------- 8525 8526 While `as' normally writes only "pure" 32-bit i386 code or 64-bit 8527 x86-64 code depending on the default configuration, it also supports 8528 writing code to run in real mode or in 16-bit protected mode code 8529 segments. To do this, put a `.code16' or `.code16gcc' directive before 8530 the assembly language instructions to be run in 16-bit mode. You can 8531 switch `as' back to writing normal 32-bit code with the `.code32' 8532 directive. 8533 8534 `.code16gcc' provides experimental support for generating 16-bit 8535 code from gcc, and differs from `.code16' in that `call', `ret', 8536 `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' 8537 instructions default to 32-bit size. This is so that the stack pointer 8538 is manipulated in the same way over function calls, allowing access to 8539 function parameters at the same stack offsets as in 32-bit mode. 8540 `.code16gcc' also automatically adds address size prefixes where 8541 necessary to use the 32-bit addressing modes that gcc generates. 8542 8543 The code which `as' generates in 16-bit mode will not necessarily 8544 run on a 16-bit pre-80386 processor. To write code that runs on such a 8545 processor, you must refrain from using _any_ 32-bit constructs which 8546 require `as' to output address or operand size prefixes. 8547 8548 Note that writing 16-bit code instructions by explicitly specifying a 8549 prefix or an instruction mnemonic suffix within a 32-bit code section 8550 generates different machine instructions than those generated for a 8551 16-bit code segment. In a 32-bit code section, the following code 8552 generates the machine opcode bytes `66 6a 04', which pushes the value 8553 `4' onto the stack, decrementing `%esp' by 2. 8554 8555 pushw $4 8556 8557 The same code in a 16-bit code section would generate the machine 8558 opcode bytes `6a 04' (ie. without the operand size prefix), which is 8559 correct since the processor default operand size is assumed to be 16 8560 bits in a 16-bit code section. 8561 8562 8563 File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent 8564 8565 8.11.11 AT&T Syntax bugs 8566 ------------------------ 8567 8568 The UnixWare assembler, and probably other AT&T derived ix86 Unix 8569 assemblers, generate floating point instructions with reversed source 8570 and destination registers in certain cases. Unfortunately, gcc and 8571 possibly many other programs use this reversed syntax, so we're stuck 8572 with it. 8573 8574 For example 8575 8576 fsub %st,%st(3) 8577 results in `%st(3)' being updated to `%st - %st(3)' rather than the 8578 expected `%st(3) - %st'. This happens with all the non-commutative 8579 arithmetic floating point operations with two register operands where 8580 the source register is `%st' and the destination register is `%st(i)'. 8581 8582 8583 File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent 8584 8585 8.11.12 Specifying CPU Architecture 8586 ----------------------------------- 8587 8588 `as' may be told to assemble for a particular CPU (sub-)architecture 8589 with the `.arch CPU_TYPE' directive. This directive enables a warning 8590 when gas detects an instruction that is not supported on the CPU 8591 specified. The choices for CPU_TYPE are: 8592 8593 `i8086' `i186' `i286' `i386' 8594 `i486' `i586' `i686' `pentium' 8595 `pentiumpro' `pentiumii' `pentiumiii' `pentium4' 8596 `k6' `athlon' 8597 `sledgehammer' 8598 `.mmx' `.sse' 8599 `.sse2' 8600 `.sse3' 8601 `.3dnow' 8602 8603 Apart from the warning, there are only two other effects on `as' 8604 operation; Firstly, if you specify a CPU other than `i486', then shift 8605 by one instructions such as `sarl $1, %eax' will automatically use a 8606 two byte opcode sequence. The larger three byte opcode sequence is 8607 used on the 486 (and when no architecture is specified) because it 8608 executes faster on the 486. Note that you can explicitly request the 8609 two byte opcode by writing `sarl %eax'. Secondly, if you specify 8610 `i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte 8611 offset conditional jumps will be promoted when necessary to a two 8612 instruction sequence consisting of a conditional jump of the opposite 8613 sense around an unconditional jump to the target. 8614 8615 Following the CPU architecture (but not a sub-architecture, which 8616 are those starting with a dot), you may specify `jumps' or `nojumps' to 8617 control automatic promotion of conditional jumps. `jumps' is the 8618 default, and enables jump promotion; All external jumps will be of the 8619 long variety, and file-local jumps will be promoted as necessary. 8620 (*note i386-Jumps::) `nojumps' leaves external conditional jumps as 8621 byte offset jumps, and warns about file-local conditional jumps that 8622 `as' promotes. Unconditional jumps are treated as for `jumps'. 8623 8624 For example 8625 8626 .arch i8086,nojumps 8627 8628 8629 File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent 8630 8631 8.11.13 Notes 8632 ------------- 8633 8634 There is some trickery concerning the `mul' and `imul' instructions 8635 that deserves mention. The 16-, 32-, 64- and 128-bit expanding 8636 multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') 8637 can be output only in the one operand form. Thus, `imul %ebx, %eax' 8638 does _not_ select the expanding multiply; the expanding multiply would 8639 clobber the `%edx' register, and this would confuse `gcc' output. Use 8640 `imul %ebx' to get the 64-bit product in `%edx:%eax'. 8641 8642 We have added a two operand form of `imul' when the first operand is 8643 an immediate mode expression and the second operand is a register. 8644 This is just a shorthand, so that, multiplying `%eax' by 69, for 8645 example, can be done with `imul $69, %eax' rather than `imul $69, %eax, 8646 %eax'. 8647 8648 8649 File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies 8650 8651 8.12 Intel i860 Dependent Features 8652 ================================== 8653 8654 * Menu: 8655 8656 * Notes-i860:: i860 Notes 8657 * Options-i860:: i860 Command-line Options 8658 * Directives-i860:: i860 Machine Directives 8659 * Opcodes for i860:: i860 Opcodes 8660 8661 8662 File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent 8663 8664 8.12.1 i860 Notes 8665 ----------------- 8666 8667 This is a fairly complete i860 assembler which is compatible with the 8668 UNIX System V/860 Release 4 assembler. However, it does not currently 8669 support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT'). 8670 8671 Like the SVR4/860 assembler, the output object format is ELF32. 8672 Currently, this is the only supported object format. If there is 8673 sufficient interest, other formats such as COFF may be implemented. 8674 8675 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter 8676 being the default. One difference is that AT&T syntax requires the '%' 8677 prefix on register names while Intel syntax does not. Another 8678 difference is in the specification of relocatable expressions. The 8679 Intel syntax is `ha%expression' whereas the SVR4 syntax is 8680 `[expression]@ha' (and similarly for the "l" and "h" selectors). 8681 8682 8683 File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent 8684 8685 8.12.2 i860 Command-line Options 8686 -------------------------------- 8687 8688 8.12.2.1 SVR4 compatibility options 8689 ................................... 8690 8691 `-V' 8692 Print assembler version. 8693 8694 `-Qy' 8695 Ignored. 8696 8697 `-Qn' 8698 Ignored. 8699 8700 8.12.2.2 Other options 8701 ...................... 8702 8703 `-EL' 8704 Select little endian output (this is the default). 8705 8706 `-EB' 8707 Select big endian output. Note that the i860 always reads 8708 instructions as little endian data, so this option only effects 8709 data and not instructions. 8710 8711 `-mwarn-expand' 8712 Emit a warning message if any pseudo-instruction expansions 8713 occurred. For example, a `or' instruction with an immediate 8714 larger than 16-bits will be expanded into two instructions. This 8715 is a very undesirable feature to rely on, so this flag can help 8716 detect any code where it happens. One use of it, for instance, has 8717 been to find and eliminate any place where `gcc' may emit these 8718 pseudo-instructions. 8719 8720 `-mxp' 8721 Enable support for the i860XP instructions and control registers. 8722 By default, this option is disabled so that only the base 8723 instruction set (i.e., i860XR) is supported. 8724 8725 `-mintel-syntax' 8726 The i860 assembler defaults to AT&T/SVR4 syntax. This option 8727 enables the Intel syntax. 8728 8729 8730 File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent 8731 8732 8.12.3 i860 Machine Directives 8733 ------------------------------ 8734 8735 `.dual' 8736 Enter dual instruction mode. While this directive is supported, the 8737 preferred way to use dual instruction mode is to explicitly code 8738 the dual bit with the `d.' prefix. 8739 8740 `.enddual' 8741 Exit dual instruction mode. While this directive is supported, the 8742 preferred way to use dual instruction mode is to explicitly code 8743 the dual bit with the `d.' prefix. 8744 8745 `.atmp' 8746 Change the temporary register used when expanding pseudo 8747 operations. The default register is `r31'. 8748 8749 The `.dual', `.enddual', and `.atmp' directives are available only 8750 in the Intel syntax mode. 8751 8752 Both syntaxes allow for the standard `.align' directive. However, 8753 the Intel syntax additionally allows keywords for the alignment 8754 parameter: "`.align type'", where `type' is one of `.short', `.long', 8755 `.quad', `.single', `.double' representing alignments of 2, 4, 16, 4, 8756 and 8, respectively. 8757 8758 8759 File: as.info, Node: Opcodes for i860, Prev: Directives-i860, Up: i860-Dependent 8760 8761 8.12.4 i860 Opcodes 8762 ------------------- 8763 8764 All of the Intel i860XR and i860XP machine instructions are supported. 8765 Please see either _i860 Microprocessor Programmer's Reference Manual_ 8766 or _i860 Microprocessor Architecture_ for more information. 8767 8768 8.12.4.1 Other instruction support (pseudo-instructions) 8769 ........................................................ 8770 8771 For compatibility with some other i860 assemblers, a number of 8772 pseudo-instructions are supported. While these are supported, they are 8773 a very undesirable feature that should be avoided - in particular, when 8774 they result in an expansion to multiple actual i860 instructions. Below 8775 are the pseudo-instructions that result in expansions. 8776 * Load large immediate into general register: 8777 8778 The pseudo-instruction `mov imm,%rn' (where the immediate does not 8779 fit within a signed 16-bit field) will be expanded into: 8780 orh large_imm@h,%r0,%rn 8781 or large_imm@l,%rn,%rn 8782 8783 * Load/store with relocatable address expression: 8784 8785 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will 8786 be expanded into: 8787 orh addr_exp@ha,%rx,%r31 8788 ld.l addr_exp@l(%r31),%rn 8789 8790 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x, 8791 fst.x', and `pst.x' as well. 8792 8793 * Signed large immediate with add/subtract: 8794 8795 If any of the arithmetic operations `adds, addu, subs, subu' are 8796 used with an immediate larger than 16-bits (signed), then they 8797 will be expanded. For instance, the pseudo-instruction `adds 8798 large_imm,%rx,%rn' expands to: 8799 orh large_imm@h,%r0,%r31 8800 or large_imm@l,%r31,%r31 8801 adds %r31,%rx,%rn 8802 8803 * Unsigned large immediate with logical operations: 8804 8805 Logical operations (`or, andnot, or, xor') also result in 8806 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results 8807 in: 8808 orh large_imm@h,%rx,%r31 8809 or large_imm@l,%r31,%rn 8810 8811 Similarly for the others, except for `and' which expands to: 8812 andnot (-1 - large_imm)@h,%rx,%r31 8813 andnot (-1 - large_imm)@l,%r31,%rn 8814 8815 8816 File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies 8817 8818 8.13 Intel 80960 Dependent Features 8819 =================================== 8820 8821 * Menu: 8822 8823 * Options-i960:: i960 Command-line Options 8824 * Floating Point-i960:: Floating Point 8825 * Directives-i960:: i960 Machine Directives 8826 * Opcodes for i960:: i960 Opcodes 8827 8828 8829 File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent 8830 8831 8.13.1 i960 Command-line Options 8832 -------------------------------- 8833 8834 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 8835 Select the 80960 architecture. Instructions or features not 8836 supported by the selected architecture cause fatal errors. 8837 8838 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'. 8839 Synonyms are provided for compatibility with other tools. 8840 8841 If you do not specify any of these options, `as' generates code 8842 for any instruction or feature that is supported by _some_ version 8843 of the 960 (even if this means mixing architectures!). In 8844 principle, `as' attempts to deduce the minimal sufficient 8845 processor type if none is specified; depending on the object code 8846 format, the processor type may be recorded in the object file. If 8847 it is critical that the `as' output match a specific architecture, 8848 specify that architecture explicitly. 8849 8850 `-b' 8851 Add code to collect information about conditional branches taken, 8852 for later optimization using branch prediction bits. (The 8853 conditional branch instructions have branch prediction bits in the 8854 CA, CB, and CC architectures.) If BR represents a conditional 8855 branch instruction, the following represents the code generated by 8856 the assembler when `-b' is specified: 8857 8858 call INCREMENT ROUTINE 8859 .word 0 # pre-counter 8860 Label: BR 8861 call INCREMENT ROUTINE 8862 .word 0 # post-counter 8863 8864 The counter following a branch records the number of times that 8865 branch was _not_ taken; the differenc between the two counters is 8866 the number of times the branch _was_ taken. 8867 8868 A table of every such `Label' is also generated, so that the 8869 external postprocessor `gbr960' (supplied by Intel) can locate all 8870 the counters. This table is always labeled `__BRANCH_TABLE__'; 8871 this is a local symbol to permit collecting statistics for many 8872 separate object files. The table is word aligned, and begins with 8873 a two-word header. The first word, initialized to 0, is used in 8874 maintaining linked lists of branch tables. The second word is a 8875 count of the number of entries in the table, which follow 8876 immediately: each is a word, pointing to one of the labels 8877 illustrated above. 8878 8879 +------------+------------+------------+ ... +------------+ 8880 | | | | | | 8881 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N | 8882 | | | | | | 8883 +------------+------------+------------+ ... +------------+ 8884 8885 __BRANCH_TABLE__ layout 8886 8887 The first word of the header is used to locate multiple branch 8888 tables, since each object file may contain one. Normally the links 8889 are maintained with a call to an initialization routine, placed at 8890 the beginning of each function in the file. The GNU C compiler 8891 generates these calls automatically when you give it a `-b' option. 8892 For further details, see the documentation of `gbr960'. 8893 8894 `-no-relax' 8895 Normally, Compare-and-Branch instructions with targets that require 8896 displacements greater than 13 bits (or that have external targets) 8897 are replaced with the corresponding compare (or `chkbit') and 8898 branch instructions. You can use the `-no-relax' option to 8899 specify that `as' should generate errors instead, if the target 8900 displacement is larger than 13 bits. 8901 8902 This option does not affect the Compare-and-Jump instructions; the 8903 code emitted for them is _always_ adjusted when necessary 8904 (depending on displacement size), regardless of whether you use 8905 `-no-relax'. 8906 8907 8908 File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent 8909 8910 8.13.2 Floating Point 8911 --------------------- 8912 8913 `as' generates IEEE floating-point numbers for the directives `.float', 8914 `.double', `.extended', and `.single'. 8915 8916 8917 File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent 8918 8919 8.13.3 i960 Machine Directives 8920 ------------------------------ 8921 8922 `.bss SYMBOL, LENGTH, ALIGN' 8923 Reserve LENGTH bytes in the bss section for a local SYMBOL, 8924 aligned to the power of two specified by ALIGN. LENGTH and ALIGN 8925 must be positive absolute expressions. This directive differs 8926 from `.lcomm' only in that it permits you to specify an alignment. 8927 *Note `.lcomm': Lcomm. 8928 8929 `.extended FLONUMS' 8930 `.extended' expects zero or more flonums, separated by commas; for 8931 each flonum, `.extended' emits an IEEE extended-format (80-bit) 8932 floating-point number. 8933 8934 `.leafproc CALL-LAB, BAL-LAB' 8935 You can use the `.leafproc' directive in conjunction with the 8936 optimized `callj' instruction to enable faster calls of leaf 8937 procedures. If a procedure is known to call no other procedures, 8938 you may define an entry point that skips procedure prolog code 8939 (and that does not depend on system-supplied saved context), and 8940 declare it as the BAL-LAB using `.leafproc'. If the procedure 8941 also has an entry point that goes through the normal prolog, you 8942 can specify that entry point as CALL-LAB. 8943 8944 A `.leafproc' declaration is meant for use in conjunction with the 8945 optimized call instruction `callj'; the directive records the data 8946 needed later to choose between converting the `callj' into a `bal' 8947 or a `call'. 8948 8949 CALL-LAB is optional; if only one argument is present, or if the 8950 two arguments are identical, the single argument is assumed to be 8951 the `bal' entry point. 8952 8953 `.sysproc NAME, INDEX' 8954 The `.sysproc' directive defines a name for a system procedure. 8955 After you define it using `.sysproc', you can use NAME to refer to 8956 the system procedure identified by INDEX when calling procedures 8957 with the optimized call instruction `callj'. 8958 8959 Both arguments are required; INDEX must be between 0 and 31 8960 (inclusive). 8961 8962 8963 File: as.info, Node: Opcodes for i960, Prev: Directives-i960, Up: i960-Dependent 8964 8965 8.13.4 i960 Opcodes 8966 ------------------- 8967 8968 All Intel 960 machine instructions are supported; *note i960 8969 Command-line Options: Options-i960. for a discussion of selecting the 8970 instruction subset for a particular 960 architecture. 8971 8972 Some opcodes are processed beyond simply emitting a single 8973 corresponding instruction: `callj', and Compare-and-Branch or 8974 Compare-and-Jump instructions with target displacements larger than 13 8975 bits. 8976 8977 * Menu: 8978 8979 * callj-i960:: `callj' 8980 * Compare-and-branch-i960:: Compare-and-Branch 8981 8982 8983 File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960 8984 8985 8.13.4.1 `callj' 8986 ................ 8987 8988 You can write `callj' to have the assembler or the linker determine the 8989 most appropriate form of subroutine call: `call', `bal', or `calls'. 8990 If the assembly source contains enough information--a `.leafproc' or 8991 `.sysproc' directive defining the operand--then `as' translates the 8992 `callj'; if not, it simply emits the `callj', leaving it for the linker 8993 to resolve. 8994 8995 8996 File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960 8997 8998 8.13.4.2 Compare-and-Branch 8999 ........................... 9000 9001 The 960 architectures provide combined Compare-and-Branch instructions 9002 that permit you to store the branch target in the lower 13 bits of the 9003 instruction word itself. However, if you specify a branch target far 9004 enough away that its address won't fit in 13 bits, the assembler can 9005 either issue an error, or convert your Compare-and-Branch instruction 9006 into separate instructions to do the compare and the branch. 9007 9008 Whether `as' gives an error or expands the instruction depends on 9009 two choices you can make: whether you use the `-no-relax' option, and 9010 whether you use a "Compare and Branch" instruction or a "Compare and 9011 Jump" instruction. The "Jump" instructions are _always_ expanded if 9012 necessary; the "Branch" instructions are expanded when necessary 9013 _unless_ you specify `-no-relax'--in which case `as' gives an error 9014 instead. 9015 9016 These are the Compare-and-Branch instructions, their "Jump" variants, 9017 and the instruction pairs they may expand into: 9018 9019 Compare and 9020 Branch Jump Expanded to 9021 ------ ------ ------------ 9022 bbc chkbit; bno 9023 bbs chkbit; bo 9024 cmpibe cmpije cmpi; be 9025 cmpibg cmpijg cmpi; bg 9026 cmpibge cmpijge cmpi; bge 9027 cmpibl cmpijl cmpi; bl 9028 cmpible cmpijle cmpi; ble 9029 cmpibno cmpijno cmpi; bno 9030 cmpibne cmpijne cmpi; bne 9031 cmpibo cmpijo cmpi; bo 9032 cmpobe cmpoje cmpo; be 9033 cmpobg cmpojg cmpo; bg 9034 cmpobge cmpojge cmpo; bge 9035 cmpobl cmpojl cmpo; bl 9036 cmpoble cmpojle cmpo; ble 9037 cmpobne cmpojne cmpo; bne 9038 9039 9040 File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies 9041 9042 8.14 IA-64 Dependent Features 9043 ============================= 9044 9045 * Menu: 9046 9047 * IA-64 Options:: Options 9048 * IA-64 Syntax:: Syntax 9049 * IA-64 Opcodes:: Opcodes 9050 9051 9052 File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent 9053 9054 8.14.1 Options 9055 -------------- 9056 9057 `-mconstant-gp' 9058 This option instructs the assembler to mark the resulting object 9059 file as using the "constant GP" model. With this model, it is 9060 assumed that the entire program uses a single global pointer (GP) 9061 value. Note that this option does not in any fashion affect the 9062 machine code emitted by the assembler. All it does is turn on the 9063 EF_IA_64_CONS_GP flag in the ELF file header. 9064 9065 `-mauto-pic' 9066 This option instructs the assembler to mark the resulting object 9067 file as using the "constant GP without function descriptor" data 9068 model. This model is like the "constant GP" model, except that it 9069 additionally does away with function descriptors. What this means 9070 is that the address of a function refers directly to the 9071 function's code entry-point. Normally, such an address would 9072 refer to a function descriptor, which contains both the code 9073 entry-point and the GP-value needed by the function. Note that 9074 this option does not in any fashion affect the machine code 9075 emitted by the assembler. All it does is turn on the 9076 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. 9077 9078 `-milp32' 9079 9080 `-milp64' 9081 9082 `-mlp64' 9083 9084 `-mp64' 9085 These options select the data model. The assembler defaults to 9086 `-mlp64' (LP64 data model). 9087 9088 `-mle' 9089 9090 `-mbe' 9091 These options select the byte order. The `-mle' option selects 9092 little-endian byte order (default) and `-mbe' selects big-endian 9093 byte order. Note that IA-64 machine code always uses 9094 little-endian byte order. 9095 9096 `-mtune=itanium1' 9097 9098 `-mtune=itanium2' 9099 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default 9100 is ITANIUM2. 9101 9102 `-munwind-check=warning' 9103 9104 `-munwind-check=error' 9105 These options control what the assembler will do when performing 9106 consistency checks on unwind directives. `-munwind-check=warning' 9107 will make the assembler issue a warning when an unwind directive 9108 check fails. This is the default. `-munwind-check=error' will 9109 make the assembler issue an error when an unwind directive check 9110 fails. 9111 9112 `-mhint.b=ok' 9113 9114 `-mhint.b=warning' 9115 9116 `-mhint.b=error' 9117 These options control what the assembler will do when the `hint.b' 9118 instruction is used. `-mhint.b=ok' will make the assembler accept 9119 `hint.b'. `-mint.b=warning' will make the assembler issue a 9120 warning when `hint.b' is used. `-mhint.b=error' will make the 9121 assembler treat `hint.b' as an error, which is the default. 9122 9123 `-x' 9124 9125 `-xexplicit' 9126 These options turn on dependency violation checking. 9127 9128 `-xauto' 9129 This option instructs the assembler to automatically insert stop 9130 bits where necessary to remove dependency violations. This is the 9131 default mode. 9132 9133 `-xnone' 9134 This option turns off dependency violation checking. 9135 9136 `-xdebug' 9137 This turns on debug output intended to help tracking down bugs in 9138 the dependency violation checker. 9139 9140 `-xdebugn' 9141 This is a shortcut for -xnone -xdebug. 9142 9143 `-xdebugx' 9144 This is a shortcut for -xexplicit -xdebug. 9145 9146 9147 9148 File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent 9149 9150 8.14.2 Syntax 9151 ------------- 9152 9153 The assembler syntax closely follows the IA-64 Assembly Language 9154 Reference Guide. 9155 9156 * Menu: 9157 9158 * IA-64-Chars:: Special Characters 9159 * IA-64-Regs:: Register Names 9160 * IA-64-Bits:: Bit Names 9161 9162 9163 File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax 9164 9165 8.14.2.1 Special Characters 9166 ........................... 9167 9168 `//' is the line comment token. 9169 9170 `;' can be used instead of a newline to separate statements. 9171 9172 9173 File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax 9174 9175 8.14.2.2 Register Names 9176 ....................... 9177 9178 The 128 integer registers are referred to as `rN'. The 128 9179 floating-point registers are referred to as `fN'. The 128 application 9180 registers are referred to as `arN'. The 128 control registers are 9181 referred to as `crN'. The 64 one-bit predicate registers are referred 9182 to as `pN'. The 8 branch registers are referred to as `bN'. In 9183 addition, the assembler defines a number of aliases: `gp' (`r1'), `sp' 9184 (`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'), 9185 `ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N'). 9186 9187 For convenience, the assembler also defines aliases for all named 9188 application and control registers. For example, `ar.bsp' refers to the 9189 register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to 9190 the end-of-interrupt register (`cr67'). 9191 9192 9193 File: as.info, Node: IA-64-Bits, Prev: IA-64-Regs, Up: IA-64 Syntax 9194 9195 8.14.2.3 IA-64 Processor-Status-Register (PSR) Bit Names 9196 ........................................................ 9197 9198 The assembler defines bit masks for each of the bits in the IA-64 9199 processor status register. For example, `psr.ic' corresponds to a 9200 value of 0x2000. These masks are primarily intended for use with the 9201 `ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere 9202 else where an integer constant is expected. 9203 9204 9205 File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent 9206 9207 8.14.3 Opcodes 9208 -------------- 9209 9210 For detailed information on the IA-64 machine instruction set, see the 9211 IA-64 Architecture Handbook 9212 (http://developer.intel.com/design/itanium/arch_spec.htm). 9213 9214 9215 File: as.info, Node: IP2K-Dependent, Next: M32C-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies 9216 9217 8.15 IP2K Dependent Features 9218 ============================ 9219 9220 * Menu: 9221 9222 * IP2K-Opts:: IP2K Options 9223 9224 9225 File: as.info, Node: IP2K-Opts, Up: IP2K-Dependent 9226 9227 8.15.1 IP2K Options 9228 ------------------- 9229 9230 The Ubicom IP2K version of `as' has a few machine dependent options: 9231 9232 `-mip2022ext' 9233 `as' can assemble the extended IP2022 instructions, but it will 9234 only do so if this is specifically allowed via this command line 9235 option. 9236 9237 `-mip2022' 9238 This option restores the assembler's default behaviour of not 9239 permitting the extended IP2022 instructions to be assembled. 9240 9241 9242 9243 File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies 9244 9245 8.16 M32C Dependent Features 9246 ============================ 9247 9248 `as' can assemble code for several different members of the Renesas 9249 M32C family. Normally the default is to assemble code for the M16C 9250 microprocessor. The `-m32c' option may be used to change the default 9251 to the M32C microprocessor. 9252 9253 * Menu: 9254 9255 * M32C-Opts:: M32C Options 9256 * M32C-Modifiers:: Symbolic Operand Modifiers 9257 9258 9259 File: as.info, Node: M32C-Opts, Next: M32C-Modifiers, Up: M32C-Dependent 9260 9261 8.16.1 M32C Options 9262 ------------------- 9263 9264 The Renesas M32C version of `as' has two machine-dependent options: 9265 9266 `-m32c' 9267 Assemble M32C instructions. 9268 9269 `-m16c' 9270 Assemble M16C instructions (default). 9271 9272 9273 9274 File: as.info, Node: M32C-Modifiers, Prev: M32C-Opts, Up: M32C-Dependent 9275 9276 8.16.2 Symbolic Operand Modifiers 9277 --------------------------------- 9278 9279 The assembler supports several modifiers when using symbol addresses in 9280 M32C instruction operands. The general syntax is the following: 9281 9282 %modifier(symbol) 9283 9284 `%dsp8' 9285 `%dsp16' 9286 These modifiers override the assembler's assumptions about how big 9287 a symbol's address is. Normally, when it sees an operand like 9288 `sym[a0]' it assumes `sym' may require the widest displacement 9289 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers 9290 tell it to assume the address will fit in an 8 or 16 bit 9291 (respectively) unsigned displacement. Note that, of course, if it 9292 doesn't actually fit you will get linker errors. Example: 9293 9294 mov.w %dsp8(sym)[a0],r1 9295 mov.b #0,%dsp8(sym)[a0] 9296 9297 `%hi8' 9298 This modifier allows you to load bits 16 through 23 of a 24 bit 9299 address into an 8 bit register. This is useful with, for example, 9300 the M16C `smovf' instruction, which expects a 20 bit address in 9301 `r1h' and `a0'. Example: 9302 9303 mov.b #%hi8(sym),r1h 9304 mov.w #%lo16(sym),a0 9305 smovf.b 9306 9307 `%lo16' 9308 Likewise, this modifier allows you to load bits 0 through 15 of a 9309 24 bit address into a 16 bit register. 9310 9311 `%hi16' 9312 This modifier allows you to load bits 16 through 31 of a 32 bit 9313 address into a 16 bit register. While the M32C family only has 24 9314 bits of address space, it does support addresses in pairs of 16 bit 9315 registers (like `a1a0' for the `lde' instruction). This modifier 9316 is for loading the upper half in such cases. Example: 9317 9318 mov.w #%hi16(sym),a1 9319 mov.w #%lo16(sym),a0 9320 ... 9321 lde.w [a1a0],r1 9322 9323 9324 9325 File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies 9326 9327 8.17 M32R Dependent Features 9328 ============================ 9329 9330 * Menu: 9331 9332 * M32R-Opts:: M32R Options 9333 * M32R-Directives:: M32R Directives 9334 * M32R-Warnings:: M32R Warnings 9335 9336 9337 File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent 9338 9339 8.17.1 M32R Options 9340 ------------------- 9341 9342 The Renease M32R version of `as' has a few machine dependent options: 9343 9344 `-m32rx' 9345 `as' can assemble code for several different members of the 9346 Renesas M32R family. Normally the default is to assemble code for 9347 the M32R microprocessor. This option may be used to change the 9348 default to the M32RX microprocessor, which adds some more 9349 instructions to the basic M32R instruction set, and some 9350 additional parameters to some of the original instructions. 9351 9352 `-m32r2' 9353 This option changes the target processor to the the M32R2 9354 microprocessor. 9355 9356 `-m32r' 9357 This option can be used to restore the assembler's default 9358 behaviour of assembling for the M32R microprocessor. This can be 9359 useful if the default has been changed by a previous command line 9360 option. 9361 9362 `-little' 9363 This option tells the assembler to produce little-endian code and 9364 data. The default is dependent upon how the toolchain was 9365 configured. 9366 9367 `-EL' 9368 This is a synonum for _-little_. 9369 9370 `-big' 9371 This option tells the assembler to produce big-endian code and 9372 data. 9373 9374 `-EB' 9375 This is a synonum for _-big_. 9376 9377 `-KPIC' 9378 This option specifies that the output of the assembler should be 9379 marked as position-independent code (PIC). 9380 9381 `-parallel' 9382 This option tells the assembler to attempts to combine two 9383 sequential instructions into a single, parallel instruction, where 9384 it is legal to do so. 9385 9386 `-no-parallel' 9387 This option disables a previously enabled _-parallel_ option. 9388 9389 `-no-bitinst' 9390 This option disables the support for the extended bit-field 9391 instructions provided by the M32R2. If this support needs to be 9392 re-enabled the _-bitinst_ switch can be used to restore it. 9393 9394 `-O' 9395 This option tells the assembler to attempt to optimize the 9396 instructions that it produces. This includes filling delay slots 9397 and converting sequential instructions into parallel ones. This 9398 option implies _-parallel_. 9399 9400 `-warn-explicit-parallel-conflicts' 9401 Instructs `as' to produce warning messages when questionable 9402 parallel instructions are encountered. This option is enabled by 9403 default, but `gcc' disables it when it invokes `as' directly. 9404 Questionable instructions are those whoes behaviour would be 9405 different if they were executed sequentially. For example the 9406 code fragment `mv r1, r2 || mv r3, r1' produces a different result 9407 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3 9408 and then r2 into r1, whereas the later moves r2 into r1 and r3. 9409 9410 `-Wp' 9411 This is a shorter synonym for the 9412 _-warn-explicit-parallel-conflicts_ option. 9413 9414 `-no-warn-explicit-parallel-conflicts' 9415 Instructs `as' not to produce warning messages when questionable 9416 parallel instructions are encountered. 9417 9418 `-Wnp' 9419 This is a shorter synonym for the 9420 _-no-warn-explicit-parallel-conflicts_ option. 9421 9422 `-ignore-parallel-conflicts' 9423 This option tells the assembler's to stop checking parallel 9424 instructions for contraint violations. This ability is provided 9425 for hardware vendors testing chip designs and should not be used 9426 under normal circumstances. 9427 9428 `-no-ignore-parallel-conflicts' 9429 This option restores the assembler's default behaviour of checking 9430 parallel instructions to detect constraint violations. 9431 9432 `-Ip' 9433 This is a shorter synonym for the _-ignore-parallel-conflicts_ 9434 option. 9435 9436 `-nIp' 9437 This is a shorter synonym for the _-no-ignore-parallel-conflicts_ 9438 option. 9439 9440 `-warn-unmatched-high' 9441 This option tells the assembler to produce a warning message if a 9442 `.high' pseudo op is encountered without a mathcing `.low' pseudo 9443 op. The presence of such an unmatches pseudo op usually indicates 9444 a programming error. 9445 9446 `-no-warn-unmatched-high' 9447 Disables a previously enabled _-warn-unmatched-high_ option. 9448 9449 `-Wuh' 9450 This is a shorter synonym for the _-warn-unmatched-high_ option. 9451 9452 `-Wnuh' 9453 This is a shorter synonym for the _-no-warn-unmatched-high_ option. 9454 9455 9456 9457 File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent 9458 9459 8.17.2 M32R Directives 9460 ---------------------- 9461 9462 The Renease M32R version of `as' has a few architecture specific 9463 directives: 9464 9465 `low EXPRESSION' 9466 The `low' directive computes the value of its expression and 9467 places the lower 16-bits of the result into the immediate-field of 9468 the instruction. For example: 9469 9470 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678 9471 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred 9472 9473 `high EXPRESSION' 9474 The `high' directive computes the value of its expression and 9475 places the upper 16-bits of the result into the immediate-field of 9476 the instruction. For example: 9477 9478 seth r0, #high(0x12345678) ; compute r0 = 0x12340000 9479 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred 9480 9481 `shigh EXPRESSION' 9482 The `shigh' directive is very similar to the `high' directive. It 9483 also computes the value of its expression and places the upper 9484 16-bits of the result into the immediate-field of the instruction. 9485 The difference is that `shigh' also checks to see if the lower 9486 16-bits could be interpreted as a signed number, and if so it 9487 assumes that a borrow will occur from the upper-16 bits. To 9488 compensate for this the `shigh' directive pre-biases the upper 16 9489 bit value by adding one to it. For example: 9490 9491 For example: 9492 9493 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000 9494 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000 9495 9496 In the second example the lower 16-bits are 0x8000. If these are 9497 treated as a signed value and sign extended to 32-bits then the 9498 value becomes 0xffff8000. If this value is then added to 9499 0x00010000 then the result is 0x00008000. 9500 9501 This behaviour is to allow for the different semantics of the 9502 `or3' and `add3' instructions. The `or3' instruction treats its 9503 16-bit immediate argument as unsigned whereas the `add3' treats 9504 its 16-bit immediate as a signed value. So for example: 9505 9506 seth r0, #shigh(0x00008000) 9507 add3 r0, r0, #low(0x00008000) 9508 9509 Produces the correct result in r0, whereas: 9510 9511 seth r0, #shigh(0x00008000) 9512 or3 r0, r0, #low(0x00008000) 9513 9514 Stores 0xffff8000 into r0. 9515 9516 Note - the `shigh' directive does not know where in the assembly 9517 source code the lower 16-bits of the value are going set, so it 9518 cannot check to make sure that an `or3' instruction is being used 9519 rather than an `add3' instruction. It is up to the programmer to 9520 make sure that correct directives are used. 9521 9522 `.m32r' 9523 The directive performs a similar thing as the _-m32r_ command line 9524 option. It tells the assembler to only accept M32R instructions 9525 from now on. An instructions from later M32R architectures are 9526 refused. 9527 9528 `.m32rx' 9529 The directive performs a similar thing as the _-m32rx_ command 9530 line option. It tells the assembler to start accepting the extra 9531 instructions in the M32RX ISA as well as the ordinary M32R ISA. 9532 9533 `.m32r2' 9534 The directive performs a similar thing as the _-m32r2_ command 9535 line option. It tells the assembler to start accepting the extra 9536 instructions in the M32R2 ISA as well as the ordinary M32R ISA. 9537 9538 `.little' 9539 The directive performs a similar thing as the _-little_ command 9540 line option. It tells the assembler to start producing 9541 little-endian code and data. This option should be used with care 9542 as producing mixed-endian binary files is frought with danger. 9543 9544 `.big' 9545 The directive performs a similar thing as the _-big_ command line 9546 option. It tells the assembler to start producing big-endian code 9547 and data. This option should be used with care as producing 9548 mixed-endian binary files is frought with danger. 9549 9550 9551 9552 File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent 9553 9554 8.17.3 M32R Warnings 9555 -------------------- 9556 9557 There are several warning and error messages that can be produced by 9558 `as' which are specific to the M32R: 9559 9560 `output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?' 9561 This message is only produced if warnings for explicit parallel 9562 conflicts have been enabled. It indicates that the assembler has 9563 encountered a parallel instruction in which the destination 9564 register of the left hand instruction is used as an input register 9565 in the right hand instruction. For example in this code fragment 9566 `mv r1, r2 || neg r3, r1' register r1 is the destination of the 9567 move instruction and the input to the neg instruction. 9568 9569 `output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?' 9570 This message is only produced if warnings for explicit parallel 9571 conflicts have been enabled. It indicates that the assembler has 9572 encountered a parallel instruction in which the destination 9573 register of the right hand instruction is used as an input 9574 register in the left hand instruction. For example in this code 9575 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination 9576 of the neg instruction and the input to the move instruction. 9577 9578 `instruction `...' is for the M32RX only' 9579 This message is produced when the assembler encounters an 9580 instruction which is only supported by the M32Rx processor, and 9581 the `-m32rx' command line flag has not been specified to allow 9582 assembly of such instructions. 9583 9584 `unknown instruction `...'' 9585 This message is produced when the assembler encounters an 9586 instruction which it does not recognise. 9587 9588 `only the NOP instruction can be issued in parallel on the m32r' 9589 This message is produced when the assembler encounters a parallel 9590 instruction which does not involve a NOP instruction and the 9591 `-m32rx' command line flag has not been specified. Only the M32Rx 9592 processor is able to execute two instructions in parallel. 9593 9594 `instruction `...' cannot be executed in parallel.' 9595 This message is produced when the assembler encounters a parallel 9596 instruction which is made up of one or two instructions which 9597 cannot be executed in parallel. 9598 9599 `Instructions share the same execution pipeline' 9600 This message is produced when the assembler encounters a parallel 9601 instruction whoes components both use the same execution pipeline. 9602 9603 `Instructions write to the same destination register.' 9604 This message is produced when the assembler encounters a parallel 9605 instruction where both components attempt to modify the same 9606 register. For example these code fragments will produce this 9607 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2, 9608 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx 9609 r3, r4' (Both write to the condition bit) 9610 9611 9612 9613 File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies 9614 9615 8.18 M680x0 Dependent Features 9616 ============================== 9617 9618 * Menu: 9619 9620 * M68K-Opts:: M680x0 Options 9621 * M68K-Syntax:: Syntax 9622 * M68K-Moto-Syntax:: Motorola Syntax 9623 * M68K-Float:: Floating Point 9624 * M68K-Directives:: 680x0 Machine Directives 9625 * M68K-opcodes:: Opcodes 9626 9627 9628 File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent 9629 9630 8.18.1 M680x0 Options 9631 --------------------- 9632 9633 The Motorola 680x0 version of `as' has a few machine dependent options: 9634 9635 `-march=ARCHITECTURE' 9636 This option specifies a target architecture. The following 9637 architectures are recognized: `68000', `68010', `68020', `68030', 9638 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab' and `cfv4e'. 9639 9640 `-mcpu=CPU' 9641 This option specifies a target cpu. When used in conjunction with 9642 the `-march' option, the cpu must be within the specified 9643 architecture. Also, the generic features of the architecture are 9644 used for instruction generation, rather than those of the specific 9645 chip. 9646 9647 `-m[no-]68851' 9648 9649 `-m[no-]68881' 9650 9651 `-m[no-]div' 9652 9653 `-m[no-]usp' 9654 9655 `-m[no-]float' 9656 9657 `-m[no-]mac' 9658 9659 `-m[no-]emac' 9660 Enable or disable various architecture specific features. If a 9661 chip or architecture by default supports an option (for instance 9662 `-march=isaaplus' includes the `-mdiv' option), explicitly 9663 disabling the option will override the default. 9664 9665 `-l' 9666 You can use the `-l' option to shorten the size of references to 9667 undefined symbols. If you do not use the `-l' option, references 9668 to undefined symbols are wide enough for a full `long' (32 bits). 9669 (Since `as' cannot know where these symbols end up, `as' can only 9670 allocate space for the linker to fill in later. Since `as' does 9671 not know how far away these symbols are, it allocates as much 9672 space as it can.) If you use this option, the references are only 9673 one word wide (16 bits). This may be useful if you want the 9674 object file to be as small as possible, and you know that the 9675 relevant symbols are always less than 17 bits away. 9676 9677 `--register-prefix-optional' 9678 For some configurations, especially those where the compiler 9679 normally does not prepend an underscore to the names of user 9680 variables, the assembler requires a `%' before any use of a 9681 register name. This is intended to let the assembler distinguish 9682 between C variables and functions named `a0' through `a7', and so 9683 on. The `%' is always accepted, but is not required for certain 9684 configurations, notably `sun3'. The `--register-prefix-optional' 9685 option may be used to permit omitting the `%' even for 9686 configurations for which it is normally required. If this is 9687 done, it will generally be impossible to refer to C variables and 9688 functions with the same names as register names. 9689 9690 `--bitwise-or' 9691 Normally the character `|' is treated as a comment character, which 9692 means that it can not be used in expressions. The `--bitwise-or' 9693 option turns `|' into a normal character. In this mode, you must 9694 either use C style comments, or start comments with a `#' character 9695 at the beginning of a line. 9696 9697 `--base-size-default-16 --base-size-default-32' 9698 If you use an addressing mode with a base register without 9699 specifying the size, `as' will normally use the full 32 bit value. 9700 For example, the addressing mode `%a0@(%d0)' is equivalent to 9701 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to 9702 tell `as' to default to using the 16 bit value. In this case, 9703 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the 9704 `--base-size-default-32' option to restore the default behaviour. 9705 9706 `--disp-size-default-16 --disp-size-default-32' 9707 If you use an addressing mode with a displacement, and the value 9708 of the displacement is not known, `as' will normally assume that 9709 the value is 32 bits. For example, if the symbol `disp' has not 9710 been defined, `as' will assemble the addressing mode 9711 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use 9712 the `--disp-size-default-16' option to tell `as' to instead assume 9713 that the displacement is 16 bits. In this case, `as' will 9714 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You 9715 may use the `--disp-size-default-32' option to restore the default 9716 behaviour. 9717 9718 `--pcrel' 9719 Always keep branches PC-relative. In the M680x0 architecture all 9720 branches are defined as PC-relative. However, on some processors 9721 they are limited to word displacements maximum. When `as' needs a 9722 long branch that is not available, it normally emits an absolute 9723 jump instead. This option disables this substitution. When this 9724 option is given and no long branches are available, only word 9725 branches will be emitted. An error message will be generated if a 9726 word branch cannot reach its target. This option has no effect on 9727 68020 and other processors that have long branches. *note Branch 9728 Improvement: M68K-Branch. 9729 9730 `-m68000' 9731 `as' can assemble code for several different members of the 9732 Motorola 680x0 family. The default depends upon how `as' was 9733 configured when it was built; normally, the default is to assemble 9734 code for the 68020 microprocessor. The following options may be 9735 used to change the default. These options control which 9736 instructions and addressing modes are permitted. The members of 9737 the 680x0 family are very similar. For detailed information about 9738 the differences, see the Motorola manuals. 9739 9740 `-m68000' 9741 `-m68ec000' 9742 `-m68hc000' 9743 `-m68hc001' 9744 `-m68008' 9745 `-m68302' 9746 `-m68306' 9747 `-m68307' 9748 `-m68322' 9749 `-m68356' 9750 Assemble for the 68000. `-m68008', `-m68302', and so on are 9751 synonyms for `-m68000', since the chips are the same from the 9752 point of view of the assembler. 9753 9754 `-m68010' 9755 Assemble for the 68010. 9756 9757 `-m68020' 9758 `-m68ec020' 9759 Assemble for the 68020. This is normally the default. 9760 9761 `-m68030' 9762 `-m68ec030' 9763 Assemble for the 68030. 9764 9765 `-m68040' 9766 `-m68ec040' 9767 Assemble for the 68040. 9768 9769 `-m68060' 9770 `-m68ec060' 9771 Assemble for the 68060. 9772 9773 `-mcpu32' 9774 `-m68330' 9775 `-m68331' 9776 `-m68332' 9777 `-m68333' 9778 `-m68334' 9779 `-m68336' 9780 `-m68340' 9781 `-m68341' 9782 `-m68349' 9783 `-m68360' 9784 Assemble for the CPU32 family of chips. 9785 9786 `-m5200' 9787 9788 `-m5202' 9789 9790 `-m5204' 9791 9792 `-m5206' 9793 9794 `-m5206e' 9795 9796 `-m521x' 9797 9798 `-m5249' 9799 9800 `-m528x' 9801 9802 `-m5307' 9803 9804 `-m5407' 9805 9806 `-m547x' 9807 9808 `-m548x' 9809 9810 `-mcfv4' 9811 9812 `-mcfv4e' 9813 Assemble for the ColdFire family of chips. 9814 9815 `-m68881' 9816 `-m68882' 9817 Assemble 68881 floating point instructions. This is the 9818 default for the 68020, 68030, and the CPU32. The 68040 and 9819 68060 always support floating point instructions. 9820 9821 `-mno-68881' 9822 Do not assemble 68881 floating point instructions. This is 9823 the default for 68000 and the 68010. The 68040 and 68060 9824 always support floating point instructions, even if this 9825 option is used. 9826 9827 `-m68851' 9828 Assemble 68851 MMU instructions. This is the default for the 9829 68020, 68030, and 68060. The 68040 accepts a somewhat 9830 different set of MMU instructions; `-m68851' and `-m68040' 9831 should not be used together. 9832 9833 `-mno-68851' 9834 Do not assemble 68851 MMU instructions. This is the default 9835 for the 68000, 68010, and the CPU32. The 68040 accepts a 9836 somewhat different set of MMU instructions. 9837 9838 9839 File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent 9840 9841 8.18.2 Syntax 9842 ------------- 9843 9844 This syntax for the Motorola 680x0 was developed at MIT. 9845 9846 The 680x0 version of `as' uses instructions names and syntax 9847 compatible with the Sun assembler. Intervening periods are ignored; 9848 for example, `movl' is equivalent to `mov.l'. 9849 9850 In the following table APC stands for any of the address registers 9851 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address 9852 relative to the program counter (`%zpc'), a suppressed address register 9853 (`%za0' through `%za7'), or it may be omitted entirely. The use of 9854 SIZE means one of `w' or `l', and it may be omitted, along with the 9855 leading colon, unless a scale is also specified. The use of SCALE 9856 means one of `1', `2', `4', or `8', and it may always be omitted along 9857 with the leading colon. 9858 9859 The following addressing modes are understood: 9860 "Immediate" 9861 `#NUMBER' 9862 9863 "Data Register" 9864 `%d0' through `%d7' 9865 9866 "Address Register" 9867 `%a0' through `%a7' 9868 `%a7' is also known as `%sp', i.e. the Stack Pointer. `%a6' is 9869 also known as `%fp', the Frame Pointer. 9870 9871 "Address Register Indirect" 9872 `%a0@' through `%a7@' 9873 9874 "Address Register Postincrement" 9875 `%a0@+' through `%a7@+' 9876 9877 "Address Register Predecrement" 9878 `%a0@-' through `%a7@-' 9879 9880 "Indirect Plus Offset" 9881 `APC@(NUMBER)' 9882 9883 "Index" 9884 `APC@(NUMBER,REGISTER:SIZE:SCALE)' 9885 9886 The NUMBER may be omitted. 9887 9888 "Postindex" 9889 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)' 9890 9891 The ONUMBER or the REGISTER, but not both, may be omitted. 9892 9893 "Preindex" 9894 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)' 9895 9896 The NUMBER may be omitted. Omitting the REGISTER produces the 9897 Postindex addressing mode. 9898 9899 "Absolute" 9900 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'. 9901 9902 9903 File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent 9904 9905 8.18.3 Motorola Syntax 9906 ---------------------- 9907 9908 The standard Motorola syntax for this chip differs from the syntax 9909 already discussed (*note Syntax: M68K-Syntax.). `as' can accept 9910 Motorola syntax for operands, even if MIT syntax is used for other 9911 operands in the same instruction. The two kinds of syntax are fully 9912 compatible. 9913 9914 In the following table APC stands for any of the address registers 9915 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address 9916 relative to the program counter (`%zpc'), or a suppressed address 9917 register (`%za0' through `%za7'). The use of SIZE means one of `w' or 9918 `l', and it may always be omitted along with the leading dot. The use 9919 of SCALE means one of `1', `2', `4', or `8', and it may always be 9920 omitted along with the leading asterisk. 9921 9922 The following additional addressing modes are understood: 9923 9924 "Address Register Indirect" 9925 `(%a0)' through `(%a7)' 9926 `%a7' is also known as `%sp', i.e. the Stack Pointer. `%a6' is 9927 also known as `%fp', the Frame Pointer. 9928 9929 "Address Register Postincrement" 9930 `(%a0)+' through `(%a7)+' 9931 9932 "Address Register Predecrement" 9933 `-(%a0)' through `-(%a7)' 9934 9935 "Indirect Plus Offset" 9936 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'. 9937 9938 The NUMBER may also appear within the parentheses, as in 9939 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted 9940 (with an address register, omitting the NUMBER produces Address 9941 Register Indirect mode). 9942 9943 "Index" 9944 `NUMBER(APC,REGISTER.SIZE*SCALE)' 9945 9946 The NUMBER may be omitted, or it may appear within the 9947 parentheses. The APC may be omitted. The REGISTER and the APC 9948 may appear in either order. If both APC and REGISTER are address 9949 registers, and the SIZE and SCALE are omitted, then the first 9950 register is taken as the base register, and the second as the 9951 index register. 9952 9953 "Postindex" 9954 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)' 9955 9956 The ONUMBER, or the REGISTER, or both, may be omitted. Either the 9957 NUMBER or the APC may be omitted, but not both. 9958 9959 "Preindex" 9960 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)' 9961 9962 The NUMBER, or the APC, or the REGISTER, or any two of them, may 9963 be omitted. The ONUMBER may be omitted. The REGISTER and the APC 9964 may appear in either order. If both APC and REGISTER are address 9965 registers, and the SIZE and SCALE are omitted, then the first 9966 register is taken as the base register, and the second as the 9967 index register. 9968 9969 9970 File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent 9971 9972 8.18.4 Floating Point 9973 --------------------- 9974 9975 Packed decimal (P) format floating literals are not supported. Feel 9976 free to add the code! 9977 9978 The floating point formats generated by directives are these. 9979 9980 `.float' 9981 `Single' precision floating point constants. 9982 9983 `.double' 9984 `Double' precision floating point constants. 9985 9986 `.extend' 9987 `.ldouble' 9988 `Extended' precision (`long double') floating point constants. 9989 9990 9991 File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent 9992 9993 8.18.5 680x0 Machine Directives 9994 ------------------------------- 9995 9996 In order to be compatible with the Sun assembler the 680x0 assembler 9997 understands the following directives. 9998 9999 `.data1' 10000 This directive is identical to a `.data 1' directive. 10001 10002 `.data2' 10003 This directive is identical to a `.data 2' directive. 10004 10005 `.even' 10006 This directive is a special case of the `.align' directive; it 10007 aligns the output to an even byte boundary. 10008 10009 `.skip' 10010 This directive is identical to a `.space' directive. 10011 10012 `.arch NAME' 10013 Select the target architecture and extension features. Valid 10014 valuse for NAME are the same as for the `-march' command line 10015 option. This directive cannot be specified after any instructions 10016 have been assembled. If it is given multiple times, or in 10017 conjuction with the `-march' option, all uses must be for the same 10018 architecture and extension set. 10019 10020 `.cpu NAME' 10021 Select the target cpu. Valid valuse for NAME are the same as for 10022 the `-mcpu' command line option. This directive cannot be 10023 specified after any instructions have been assembled. If it is 10024 given multiple times, or in conjuction with the `-mopt' option, 10025 all uses must be for the same cpu. 10026 10027 10028 10029 File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent 10030 10031 8.18.6 Opcodes 10032 -------------- 10033 10034 * Menu: 10035 10036 * M68K-Branch:: Branch Improvement 10037 * M68K-Chars:: Special Characters 10038 10039 10040 File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes 10041 10042 8.18.6.1 Branch Improvement 10043 ........................... 10044 10045 Certain pseudo opcodes are permitted for branch instructions. They 10046 expand to the shortest branch instruction that reach the target. 10047 Generally these mnemonics are made by substituting `j' for `b' at the 10048 start of a Motorola mnemonic. 10049 10050 The following table summarizes the pseudo-operations. A `*' flags 10051 cases that are more fully described after the table: 10052 10053 Displacement 10054 +------------------------------------------------------------ 10055 | 68020 68000/10, not PC-relative OK 10056 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** 10057 +------------------------------------------------------------ 10058 jbsr |bsrs bsrw bsrl jsr 10059 jra |bras braw bral jmp 10060 * jXX |bXXs bXXw bXXl bNXs;jmp 10061 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp 10062 fjXX | N/A fbXXw fbXXl N/A 10063 10064 XX: condition 10065 NX: negative of condition XX 10066 `*'--see full description below 10067 `**'--this expansion mode is disallowed by `--pcrel' 10068 10069 `jbsr' 10070 `jra' 10071 These are the simplest jump pseudo-operations; they always map to 10072 one particular machine instruction, depending on the displacement 10073 to the branch target. This instruction will be a byte or word 10074 branch is that is sufficient. Otherwise, a long branch will be 10075 emitted if available. If no long branches are available and the 10076 `--pcrel' option is not given, an absolute long jump will be 10077 emitted instead. If no long branches are available, the `--pcrel' 10078 option is given, and a word branch cannot reach the target, an 10079 error message is generated. 10080 10081 In addition to standard branch operands, `as' allows these 10082 pseudo-operations to have all operands that are allowed for jsr 10083 and jmp, substituting these instructions if the operand given is 10084 not valid for a branch instruction. 10085 10086 `jXX' 10087 Here, `jXX' stands for an entire family of pseudo-operations, 10088 where XX is a conditional branch or condition-code test. The full 10089 list of pseudo-ops in this family is: 10090 jhi jls jcc jcs jne jeq jvc 10091 jvs jpl jmi jge jlt jgt jle 10092 10093 Usually, each of these pseudo-operations expands to a single branch 10094 instruction. However, if a word branch is not sufficient, no long 10095 branches are available, and the `--pcrel' option is not given, `as' 10096 issues a longer code fragment in terms of NX, the opposite 10097 condition to XX. For example, under these conditions: 10098 jXX foo 10099 gives 10100 bNXs oof 10101 jmp foo 10102 oof: 10103 10104 `dbXX' 10105 The full family of pseudo-operations covered here is 10106 dbhi dbls dbcc dbcs dbne dbeq dbvc 10107 dbvs dbpl dbmi dbge dblt dbgt dble 10108 dbf dbra dbt 10109 10110 Motorola `dbXX' instructions allow word displacements only. When 10111 a word displacement is sufficient, each of these pseudo-operations 10112 expands to the corresponding Motorola instruction. When a word 10113 displacement is not sufficient and long branches are available, 10114 when the source reads `dbXX foo', `as' emits 10115 dbXX oo1 10116 bras oo2 10117 oo1:bral foo 10118 oo2: 10119 10120 If, however, long branches are not available and the `--pcrel' 10121 option is not given, `as' emits 10122 dbXX oo1 10123 bras oo2 10124 oo1:jmp foo 10125 oo2: 10126 10127 `fjXX' 10128 This family includes 10129 fjne fjeq fjge fjlt fjgt fjle fjf 10130 fjt fjgl fjgle fjnge fjngl fjngle fjngt 10131 fjnle fjnlt fjoge fjogl fjogt fjole fjolt 10132 fjor fjseq fjsf fjsne fjst fjueq fjuge 10133 fjugt fjule fjult fjun 10134 10135 Each of these pseudo-operations always expands to a single Motorola 10136 coprocessor branch instruction, word or long. All Motorola 10137 coprocessor branch instructions allow both word and long 10138 displacements. 10139 10140 10141 10142 File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes 10143 10144 8.18.6.2 Special Characters 10145 ........................... 10146 10147 The immediate character is `#' for Sun compatibility. The line-comment 10148 character is `|' (unless the `--bitwise-or' option is used). If a `#' 10149 appears at the beginning of a line, it is treated as a comment unless 10150 it looks like `# line file', in which case it is treated normally. 10151 10152 10153 File: as.info, Node: M68HC11-Dependent, Next: MIPS-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies 10154 10155 8.19 M68HC11 and M68HC12 Dependent Features 10156 =========================================== 10157 10158 * Menu: 10159 10160 * M68HC11-Opts:: M68HC11 and M68HC12 Options 10161 * M68HC11-Syntax:: Syntax 10162 * M68HC11-Modifiers:: Symbolic Operand Modifiers 10163 * M68HC11-Directives:: Assembler Directives 10164 * M68HC11-Float:: Floating Point 10165 * M68HC11-opcodes:: Opcodes 10166 10167 10168 File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent 10169 10170 8.19.1 M68HC11 and M68HC12 Options 10171 ---------------------------------- 10172 10173 The Motorola 68HC11 and 68HC12 version of `as' have a few machine 10174 dependent options. 10175 10176 `-m68hc11' 10177 This option switches the assembler in the M68HC11 mode. In this 10178 mode, the assembler only accepts 68HC11 operands and mnemonics. It 10179 produces code for the 68HC11. 10180 10181 `-m68hc12' 10182 This option switches the assembler in the M68HC12 mode. In this 10183 mode, the assembler also accepts 68HC12 operands and mnemonics. It 10184 produces code for the 68HC12. A few 68HC11 instructions are 10185 replaced by some 68HC12 instructions as recommended by Motorola 10186 specifications. 10187 10188 `-m68hcs12' 10189 This option switches the assembler in the M68HCS12 mode. This 10190 mode is similar to `-m68hc12' but specifies to assemble for the 10191 68HCS12 series. The only difference is on the assembling of the 10192 `movb' and `movw' instruction when a PC-relative operand is used. 10193 10194 `-mshort' 10195 This option controls the ABI and indicates to use a 16-bit integer 10196 ABI. It has no effect on the assembled instructions. This is the 10197 default. 10198 10199 `-mlong' 10200 This option controls the ABI and indicates to use a 32-bit integer 10201 ABI. 10202 10203 `-mshort-double' 10204 This option controls the ABI and indicates to use a 32-bit float 10205 ABI. This is the default. 10206 10207 `-mlong-double' 10208 This option controls the ABI and indicates to use a 64-bit float 10209 ABI. 10210 10211 `--strict-direct-mode' 10212 You can use the `--strict-direct-mode' option to disable the 10213 automatic translation of direct page mode addressing into extended 10214 mode when the instruction does not support direct mode. For 10215 example, the `clr' instruction does not support direct page mode 10216 addressing. When it is used with the direct page mode, `as' will 10217 ignore it and generate an absolute addressing. This option 10218 prevents `as' from doing this, and the wrong usage of the direct 10219 page mode will raise an error. 10220 10221 `--short-branchs' 10222 The `--short-branchs' option turns off the translation of relative 10223 branches into absolute branches when the branch offset is out of 10224 range. By default `as' transforms the relative branch (`bsr', 10225 `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc', `bls', 10226 `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch when 10227 the offset is out of the -128 .. 127 range. In that case, the 10228 `bsr' instruction is translated into a `jsr', the `bra' 10229 instruction is translated into a `jmp' and the conditional branchs 10230 instructions are inverted and followed by a `jmp'. This option 10231 disables these translations and `as' will generate an error if a 10232 relative branch is out of range. This option does not affect the 10233 optimization associated to the `jbra', `jbsr' and `jbXX' pseudo 10234 opcodes. 10235 10236 `--force-long-branchs' 10237 The `--force-long-branchs' option forces the translation of 10238 relative branches into absolute branches. This option does not 10239 affect the optimization associated to the `jbra', `jbsr' and 10240 `jbXX' pseudo opcodes. 10241 10242 `--print-insn-syntax' 10243 You can use the `--print-insn-syntax' option to obtain the syntax 10244 description of the instruction when an error is detected. 10245 10246 `--print-opcodes' 10247 The `--print-opcodes' option prints the list of all the 10248 instructions with their syntax. The first item of each line 10249 represents the instruction name and the rest of the line indicates 10250 the possible operands for that instruction. The list is printed in 10251 alphabetical order. Once the list is printed `as' exits. 10252 10253 `--generate-example' 10254 The `--generate-example' option is similar to `--print-opcodes' 10255 but it generates an example for each instruction instead. 10256 10257 10258 File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent 10259 10260 8.19.2 Syntax 10261 ------------- 10262 10263 In the M68HC11 syntax, the instruction name comes first and it may be 10264 followed by one or several operands (up to three). Operands are 10265 separated by comma (`,'). In the normal mode, `as' will complain if too 10266 many operands are specified for a given instruction. In the MRI mode 10267 (turned on with `-M' option), it will treat them as comments. Example: 10268 10269 inx 10270 lda #23 10271 bset 2,x #4 10272 brclr *bot #8 foo 10273 10274 The following addressing modes are understood for 68HC11 and 68HC12: 10275 "Immediate" 10276 `#NUMBER' 10277 10278 "Address Register" 10279 `NUMBER,X', `NUMBER,Y' 10280 10281 The NUMBER may be omitted in which case 0 is assumed. 10282 10283 "Direct Addressing mode" 10284 `*SYMBOL', or `*DIGITS' 10285 10286 "Absolute" 10287 `SYMBOL', or `DIGITS' 10288 10289 The M68HC12 has other more complex addressing modes. All of them are 10290 supported and they are represented below: 10291 10292 "Constant Offset Indexed Addressing Mode" 10293 `NUMBER,REG' 10294 10295 The NUMBER may be omitted in which case 0 is assumed. The 10296 register can be either `X', `Y', `SP' or `PC'. The assembler will 10297 use the smaller post-byte definition according to the constant 10298 value (5-bit constant offset, 9-bit constant offset or 16-bit 10299 constant offset). If the constant is not known by the assembler 10300 it will use the 16-bit constant offset post-byte and the value 10301 will be resolved at link time. 10302 10303 "Offset Indexed Indirect" 10304 `[NUMBER,REG]' 10305 10306 The register can be either `X', `Y', `SP' or `PC'. 10307 10308 "Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement" 10309 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+' 10310 10311 The number must be in the range `-8'..`+8' and must not be 0. The 10312 register can be either `X', `Y', `SP' or `PC'. 10313 10314 "Accumulator Offset" 10315 `ACC,REG' 10316 10317 The accumulator register can be either `A', `B' or `D'. The 10318 register can be either `X', `Y', `SP' or `PC'. 10319 10320 "Accumulator D offset indexed-indirect" 10321 `[D,REG]' 10322 10323 The register can be either `X', `Y', `SP' or `PC'. 10324 10325 10326 For example: 10327 10328 ldab 1024,sp 10329 ldd [10,x] 10330 orab 3,+x 10331 stab -2,y- 10332 ldx a,pc 10333 sty [d,sp] 10334 10335 10336 File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent 10337 10338 8.19.3 Symbolic Operand Modifiers 10339 --------------------------------- 10340 10341 The assembler supports several modifiers when using symbol addresses in 10342 68HC11 and 68HC12 instruction operands. The general syntax is the 10343 following: 10344 10345 %modifier(symbol) 10346 10347 `%addr' 10348 This modifier indicates to the assembler and linker to use the 10349 16-bit physical address corresponding to the symbol. This is 10350 intended to be used on memory window systems to map a symbol in 10351 the memory bank window. If the symbol is in a memory expansion 10352 part, the physical address corresponds to the symbol address 10353 within the memory bank window. If the symbol is not in a memory 10354 expansion part, this is the symbol address (using or not using the 10355 %addr modifier has no effect in that case). 10356 10357 `%page' 10358 This modifier indicates to use the memory page number corresponding 10359 to the symbol. If the symbol is in a memory expansion part, its 10360 page number is computed by the linker as a number used to map the 10361 page containing the symbol in the memory bank window. If the 10362 symbol is not in a memory expansion part, the page number is 0. 10363 10364 `%hi' 10365 This modifier indicates to use the 8-bit high part of the physical 10366 address of the symbol. 10367 10368 `%lo' 10369 This modifier indicates to use the 8-bit low part of the physical 10370 address of the symbol. 10371 10372 10373 For example a 68HC12 call to a function `foo_example' stored in 10374 memory expansion part could be written as follows: 10375 10376 call %addr(foo_example),%page(foo_example) 10377 10378 and this is equivalent to 10379 10380 call foo_example 10381 10382 And for 68HC11 it could be written as follows: 10383 10384 ldab #%page(foo_example) 10385 stab _page_switch 10386 jsr %addr(foo_example) 10387 10388 10389 File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent 10390 10391 8.19.4 Assembler Directives 10392 --------------------------- 10393 10394 The 68HC11 and 68HC12 version of `as' have the following specific 10395 assembler directives: 10396 10397 `.relax' 10398 The relax directive is used by the `GNU Compiler' to emit a 10399 specific relocation to mark a group of instructions for linker 10400 relaxation. The sequence of instructions within the group must be 10401 known to the linker so that relaxation can be performed. 10402 10403 `.mode [mshort|mlong|mshort-double|mlong-double]' 10404 This directive specifies the ABI. It overrides the `-mshort', 10405 `-mlong', `-mshort-double' and `-mlong-double' options. 10406 10407 `.far SYMBOL' 10408 This directive marks the symbol as a `far' symbol meaning that it 10409 uses a `call/rtc' calling convention as opposed to `jsr/rts'. 10410 During a final link, the linker will identify references to the 10411 `far' symbol and will verify the proper calling convention. 10412 10413 `.interrupt SYMBOL' 10414 This directive marks the symbol as an interrupt entry point. This 10415 information is then used by the debugger to correctly unwind the 10416 frame across interrupts. 10417 10418 `.xrefb SYMBOL' 10419 This directive is defined for compatibility with the 10420 `Specification for Motorola 8 and 16-Bit Assembly Language Input 10421 Standard' and is ignored. 10422 10423 10424 10425 File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent 10426 10427 8.19.5 Floating Point 10428 --------------------- 10429 10430 Packed decimal (P) format floating literals are not supported. Feel 10431 free to add the code! 10432 10433 The floating point formats generated by directives are these. 10434 10435 `.float' 10436 `Single' precision floating point constants. 10437 10438 `.double' 10439 `Double' precision floating point constants. 10440 10441 `.extend' 10442 `.ldouble' 10443 `Extended' precision (`long double') floating point constants. 10444 10445 10446 File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent 10447 10448 8.19.6 Opcodes 10449 -------------- 10450 10451 * Menu: 10452 10453 * M68HC11-Branch:: Branch Improvement 10454 10455 10456 File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes 10457 10458 8.19.6.1 Branch Improvement 10459 ........................... 10460 10461 Certain pseudo opcodes are permitted for branch instructions. They 10462 expand to the shortest branch instruction that reach the target. 10463 Generally these mnemonics are made by prepending `j' to the start of 10464 Motorola mnemonic. These pseudo opcodes are not affected by the 10465 `--short-branchs' or `--force-long-branchs' options. 10466 10467 The following table summarizes the pseudo-operations. 10468 10469 Displacement Width 10470 +-------------------------------------------------------------+ 10471 | Options | 10472 | --short-branchs --force-long-branchs | 10473 +--------------------------+----------------------------------+ 10474 Op |BYTE WORD | BYTE WORD | 10475 +--------------------------+----------------------------------+ 10476 bsr | bsr <pc-rel> <error> | jsr <abs> | 10477 bra | bra <pc-rel> <error> | jmp <abs> | 10478 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | 10479 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | 10480 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | 10481 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | 10482 | jmp <abs> | | 10483 +--------------------------+----------------------------------+ 10484 XX: condition 10485 NX: negative of condition XX 10486 10487 `jbsr' 10488 `jbra' 10489 These are the simplest jump pseudo-operations; they always map to 10490 one particular machine instruction, depending on the displacement 10491 to the branch target. 10492 10493 `jbXX' 10494 Here, `jbXX' stands for an entire family of pseudo-operations, 10495 where XX is a conditional branch or condition-code test. The full 10496 list of pseudo-ops in this family is: 10497 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo 10498 jbcs jbne jblt jble jbls jbvc jbmi 10499 10500 For the cases of non-PC relative displacements and long 10501 displacements, `as' issues a longer code fragment in terms of NX, 10502 the opposite condition to XX. For example, for the non-PC 10503 relative case: 10504 jbXX foo 10505 gives 10506 bNXs oof 10507 jmp foo 10508 oof: 10509 10510 10511 10512 File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies 10513 10514 8.20 MIPS Dependent Features 10515 ============================ 10516 10517 GNU `as' for MIPS architectures supports several different MIPS 10518 processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For 10519 information about the MIPS instruction set, see `MIPS RISC 10520 Architecture', by Kane and Heindrich (Prentice-Hall). For an overview 10521 of MIPS assembly conventions, see "Appendix D: Assembly Language 10522 Programming" in the same work. 10523 10524 * Menu: 10525 10526 * MIPS Opts:: Assembler options 10527 * MIPS Object:: ECOFF object code 10528 * MIPS Stabs:: Directives for debugging information 10529 * MIPS ISA:: Directives to override the ISA level 10530 * MIPS symbol sizes:: Directives to override the size of symbols 10531 * MIPS autoextend:: Directives for extending MIPS 16 bit instructions 10532 * MIPS insn:: Directive to mark data as an instruction 10533 * MIPS option stack:: Directives to save and restore options 10534 * MIPS ASE instruction generation overrides:: Directives to control 10535 generation of MIPS ASE instructions 10536 10537 10538 File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent 10539 10540 8.20.1 Assembler options 10541 ------------------------ 10542 10543 The MIPS configurations of GNU `as' support these special options: 10544 10545 `-G NUM' 10546 This option sets the largest size of an object that can be 10547 referenced implicitly with the `gp' register. It is only accepted 10548 for targets that use ECOFF format. The default value is 8. 10549 10550 `-EB' 10551 `-EL' 10552 Any MIPS configuration of `as' can select big-endian or 10553 little-endian output at run time (unlike the other GNU development 10554 tools, which must be configured for one or the other). Use `-EB' 10555 to select big-endian output, and `-EL' for little-endian. 10556 10557 `-mips1' 10558 `-mips2' 10559 `-mips3' 10560 `-mips4' 10561 `-mips5' 10562 `-mips32' 10563 `-mips32r2' 10564 `-mips64' 10565 `-mips64r2' 10566 Generate code for a particular MIPS Instruction Set Architecture 10567 level. `-mips1' corresponds to the R2000 and R3000 processors, 10568 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor, 10569 and `-mips4' to the R8000 and R10000 processors. `-mips5', 10570 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to 10571 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64 10572 RELEASE 2 ISA processors, respectively. You can also switch 10573 instruction sets during the assembly; see *Note Directives to 10574 override the ISA level: MIPS ISA. 10575 10576 `-mgp32' 10577 `-mfp32' 10578 Some macros have different expansions for 32-bit and 64-bit 10579 registers. The register sizes are normally inferred from the ISA 10580 and ABI, but these flags force a certain group of registers to be 10581 treated as 32 bits wide at all times. `-mgp32' controls the size 10582 of general-purpose registers and `-mfp32' controls the size of 10583 floating-point registers. 10584 10585 On some MIPS variants there is a 32-bit mode flag; when this flag 10586 is set, 64-bit instructions generate a trap. Also, some 32-bit 10587 OSes only save the 32-bit registers on a context switch, so it is 10588 essential never to use the 64-bit registers. 10589 10590 `-mgp64' 10591 Assume that 64-bit general purpose registers are available. This 10592 is provided in the interests of symmetry with -gp32. 10593 10594 `-mips16' 10595 `-no-mips16' 10596 Generate code for the MIPS 16 processor. This is equivalent to 10597 putting `.set mips16' at the start of the assembly file. 10598 `-no-mips16' turns off this option. 10599 10600 `-mips3d' 10601 `-no-mips3d' 10602 Generate code for the MIPS-3D Application Specific Extension. 10603 This tells the assembler to accept MIPS-3D instructions. 10604 `-no-mips3d' turns off this option. 10605 10606 `-mdmx' 10607 `-no-mdmx' 10608 Generate code for the MDMX Application Specific Extension. This 10609 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 10610 off this option. 10611 10612 `-mdsp' 10613 `-mno-dsp' 10614 Generate code for the DSP Application Specific Extension. This 10615 tells the assembler to accept DSP instructions. `-mno-dsp' turns 10616 off this option. 10617 10618 `-mmt' 10619 `-mno-mt' 10620 Generate code for the MT Application Specific Extension. This 10621 tells the assembler to accept MT instructions. `-mno-mt' turns 10622 off this option. 10623 10624 `-mfix7000' 10625 `-mno-fix7000' 10626 Cause nops to be inserted if the read of the destination register 10627 of an mfhi or mflo instruction occurs in the following two 10628 instructions. 10629 10630 `-mfix-vr4120' 10631 `-no-mfix-vr4120' 10632 Insert nops to work around certain VR4120 errata. This option is 10633 intended to be used on GCC-generated code: it is not designed to 10634 catch all problems in hand-written assembler code. 10635 10636 `-mfix-vr4130' 10637 `-no-mfix-vr4130' 10638 Insert nops to work around the VR4130 `mflo'/`mfhi' errata. 10639 10640 `-m4010' 10641 `-no-m4010' 10642 Generate code for the LSI R4010 chip. This tells the assembler to 10643 accept the R4010 specific instructions (`addciu', `ffc', etc.), 10644 and to not schedule `nop' instructions around accesses to the `HI' 10645 and `LO' registers. `-no-m4010' turns off this option. 10646 10647 `-m4650' 10648 `-no-m4650' 10649 Generate code for the MIPS R4650 chip. This tells the assembler 10650 to accept the `mad' and `madu' instruction, and to not schedule 10651 `nop' instructions around accesses to the `HI' and `LO' registers. 10652 `-no-m4650' turns off this option. 10653 10654 `-m3900' 10655 `-no-m3900' 10656 `-m4100' 10657 `-no-m4100' 10658 For each option `-mNNNN', generate code for the MIPS RNNNN chip. 10659 This tells the assembler to accept instructions specific to that 10660 chip, and to schedule for that chip's hazards. 10661 10662 `-march=CPU' 10663 Generate code for a particular MIPS cpu. It is exactly equivalent 10664 to `-mCPU', except that there are more value of CPU understood. 10665 Valid CPU value are: 10666 10667 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130, 10668 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, 10669 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000, 10670 10000, 12000, mips32-4k, sb1 10671 10672 `-mtune=CPU' 10673 Schedule and tune for a particular MIPS cpu. Valid CPU values are 10674 identical to `-march=CPU'. 10675 10676 `-mabi=ABI' 10677 Record which ABI the source code uses. The recognized arguments 10678 are: `32', `n32', `o64', `64' and `eabi'. 10679 10680 `-msym32' 10681 `-mno-sym32' 10682 Equivalent to adding `.set sym32' or `.set nosym32' to the 10683 beginning of the assembler input. *Note MIPS symbol sizes::. 10684 10685 `-nocpp' 10686 This option is ignored. It is accepted for command-line 10687 compatibility with other assemblers, which use it to turn off C 10688 style preprocessing. With GNU `as', there is no need for 10689 `-nocpp', because the GNU assembler itself never runs the C 10690 preprocessor. 10691 10692 `--construct-floats' 10693 `--no-construct-floats' 10694 The `--no-construct-floats' option disables the construction of 10695 double width floating point constants by loading the two halves of 10696 the value into the two single width floating point registers that 10697 make up the double width register. This feature is useful if the 10698 processor support the FR bit in its status register, and this bit 10699 is known (by the programmer) to be set. This bit prevents the 10700 aliasing of the double width register by the single width 10701 registers. 10702 10703 By default `--construct-floats' is selected, allowing construction 10704 of these floating point constants. 10705 10706 `--trap' 10707 `--no-break' 10708 `as' automatically macro expands certain division and 10709 multiplication instructions to check for overflow and division by 10710 zero. This option causes `as' to generate code to take a trap 10711 exception rather than a break exception when an error is detected. 10712 The trap instructions are only supported at Instruction Set 10713 Architecture level 2 and higher. 10714 10715 `--break' 10716 `--no-trap' 10717 Generate code to take a break exception rather than a trap 10718 exception when an error is detected. This is the default. 10719 10720 `-mpdr' 10721 `-mno-pdr' 10722 Control generation of `.pdr' sections. Off by default on IRIX, on 10723 elsewhere. 10724 10725 `-mshared' 10726 `-mno-shared' 10727 When generating code using the Unix calling conventions (selected 10728 by `-KPIC' or `-mcall_shared'), gas will normally generate code 10729 which can go into a shared library. The `-mno-shared' option 10730 tells gas to generate code which uses the calling convention, but 10731 can not go into a shared library. The resulting code is slightly 10732 more efficient. This option only affects the handling of the 10733 `.cpload' and `.cpsetup' pseudo-ops. 10734 10735 10736 File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent 10737 10738 8.20.2 MIPS ECOFF object code 10739 ----------------------------- 10740 10741 Assembling for a MIPS ECOFF target supports some additional sections 10742 besides the usual `.text', `.data' and `.bss'. The additional sections 10743 are `.rdata', used for read-only data, `.sdata', used for small data, 10744 and `.sbss', used for small common objects. 10745 10746 When assembling for ECOFF, the assembler uses the `$gp' (`$28') 10747 register to form the address of a "small object". Any object in the 10748 `.sdata' or `.sbss' sections is considered "small" in this sense. For 10749 external objects, or for objects in the `.bss' section, you can use the 10750 `gcc' `-G' option to control the size of objects addressed via `$gp'; 10751 the default value is 8, meaning that a reference to any object eight 10752 bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from 10753 using the `$gp' register on the basis of object size (but the assembler 10754 uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of 10755 an object in the `.bss' section is set by the `.comm' or `.lcomm' 10756 directive that defines it. The size of an external object may be set 10757 with the `.extern' directive. For example, `.extern sym,4' declares 10758 that the object at `sym' is 4 bytes in length, whie leaving `sym' 10759 otherwise undefined. 10760 10761 Using small ECOFF objects requires linker support, and assumes that 10762 the `$gp' register is correctly initialized (normally done 10763 automatically by the startup code). MIPS ECOFF assembly code must not 10764 modify the `$gp' register. 10765 10766 10767 File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent 10768 10769 8.20.3 Directives for debugging information 10770 ------------------------------------------- 10771 10772 MIPS ECOFF `as' supports several directives used for generating 10773 debugging information which are not support by traditional MIPS 10774 assemblers. These are `.def', `.endef', `.dim', `.file', `.scl', 10775 `.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'. 10776 The debugging information generated by the three `.stab' directives can 10777 only be read by GDB, not by traditional MIPS debuggers (this 10778 enhancement is required to fully support C++ debugging). These 10779 directives are primarily used by compilers, not assembly language 10780 programmers! 10781 10782 10783 File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent 10784 10785 8.20.4 Directives to override the size of symbols 10786 ------------------------------------------------- 10787 10788 The n64 ABI allows symbols to have any 64-bit value. Although this 10789 provides a great deal of flexibility, it means that some macros have 10790 much longer expansions than their 32-bit counterparts. For example, 10791 the non-PIC expansion of `dla $4,sym' is usually: 10792 10793 lui $4,%highest(sym) 10794 lui $1,%hi(sym) 10795 daddiu $4,$4,%higher(sym) 10796 daddiu $1,$1,%lo(sym) 10797 dsll32 $4,$4,0 10798 daddu $4,$4,$1 10799 10800 whereas the 32-bit expansion is simply: 10801 10802 lui $4,%hi(sym) 10803 daddiu $4,$4,%lo(sym) 10804 10805 n64 code is sometimes constructed in such a way that all symbolic 10806 constants are known to have 32-bit values, and in such cases, it's 10807 preferable to use the 32-bit expansion instead of the 64-bit expansion. 10808 10809 You can use the `.set sym32' directive to tell the assembler that, 10810 from this point on, all expressions of the form `SYMBOL' or `SYMBOL + 10811 OFFSET' have 32-bit values. For example: 10812 10813 .set sym32 10814 dla $4,sym 10815 lw $4,sym+16 10816 sw $4,sym+0x8000($4) 10817 10818 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000' 10819 as 32-bit values. The handling of non-symbolic addresses is not 10820 affected. 10821 10822 The directive `.set nosym32' ends a `.set sym32' block and reverts 10823 to the normal behavior. It is also possible to change the symbol size 10824 using the command-line options `-msym32' and `-mno-sym32'. 10825 10826 These options and directives are always accepted, but at present, 10827 they have no effect for anything other than n64. 10828 10829 10830 File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent 10831 10832 8.20.5 Directives to override the ISA level 10833 ------------------------------------------- 10834 10835 GNU `as' supports an additional directive to change the MIPS 10836 Instruction Set Architecture level on the fly: `.set mipsN'. N should 10837 be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other 10838 than 0 make the assembler accept instructions for the corresponding ISA 10839 level, from that point on in the assembly. `.set mipsN' affects not 10840 only which instructions are permitted, but also how certain macros are 10841 expanded. `.set mips0' restores the ISA level to its original level: 10842 either the level you selected with command line options, or the default 10843 for your configuration. You can use this feature to permit specific 10844 R4000 instructions while assembling in 32 bit mode. Use this directive 10845 with care! 10846 10847 The directive `.set mips16' puts the assembler into MIPS 16 mode, in 10848 which it will assemble instructions for the MIPS 16 processor. Use 10849 `.set nomips16' to return to normal 32 bit mode. 10850 10851 Traditional MIPS assemblers do not support this directive. 10852 10853 10854 File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent 10855 10856 8.20.6 Directives for extending MIPS 16 bit instructions 10857 -------------------------------------------------------- 10858 10859 By default, MIPS 16 instructions are automatically extended to 32 bits 10860 when necessary. The directive `.set noautoextend' will turn this off. 10861 When `.set noautoextend' is in effect, any 32 bit instruction must be 10862 explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The 10863 directive `.set autoextend' may be used to once again automatically 10864 extend instructions when necessary. 10865 10866 This directive is only meaningful when in MIPS 16 mode. Traditional 10867 MIPS assemblers do not support this directive. 10868 10869 10870 File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent 10871 10872 8.20.7 Directive to mark data as an instruction 10873 ----------------------------------------------- 10874 10875 The `.insn' directive tells `as' that the following data is actually 10876 instructions. This makes a difference in MIPS 16 mode: when loading 10877 the address of a label which precedes instructions, `as' automatically 10878 adds 1 to the value, so that jumping to the loaded address will do the 10879 right thing. 10880 10881 10882 File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent 10883 10884 8.20.8 Directives to save and restore options 10885 --------------------------------------------- 10886 10887 The directives `.set push' and `.set pop' may be used to save and 10888 restore the current settings for all the options which are controlled 10889 by `.set'. The `.set push' directive saves the current settings on a 10890 stack. The `.set pop' directive pops the stack and restores the 10891 settings. 10892 10893 These directives can be useful inside an macro which must change an 10894 option such as the ISA level or instruction reordering but does not want 10895 to change the state of the code which invoked the macro. 10896 10897 Traditional MIPS assemblers do not support these directives. 10898 10899 10900 File: as.info, Node: MIPS ASE instruction generation overrides, Prev: MIPS option stack, Up: MIPS-Dependent 10901 10902 8.20.9 Directives to control generation of MIPS ASE instructions 10903 ---------------------------------------------------------------- 10904 10905 The directive `.set mips3d' makes the assembler accept instructions 10906 from the MIPS-3D Application Specific Extension from that point on in 10907 the assembly. The `.set nomips3d' directive prevents MIPS-3D 10908 instructions from being accepted. 10909 10910 The directive `.set mdmx' makes the assembler accept instructions 10911 from the MDMX Application Specific Extension from that point on in the 10912 assembly. The `.set nomdmx' directive prevents MDMX instructions from 10913 being accepted. 10914 10915 The directive `.set dsp' makes the assembler accept instructions 10916 from the DSP Application Specific Extension from that point on in the 10917 assembly. The `.set nodsp' directive prevents DSP instructions from 10918 being accepted. 10919 10920 The directive `.set mt' makes the assembler accept instructions from 10921 the MT Application Specific Extension from that point on in the 10922 assembly. The `.set nomt' directive prevents MT instructions from 10923 being accepted. 10924 10925 Traditional MIPS assemblers do not support these directives. 10926 10927 10928 File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies 10929 10930 8.21 MMIX Dependent Features 10931 ============================ 10932 10933 * Menu: 10934 10935 * MMIX-Opts:: Command-line Options 10936 * MMIX-Expand:: Instruction expansion 10937 * MMIX-Syntax:: Syntax 10938 * MMIX-mmixal:: Differences to `mmixal' syntax and semantics 10939 10940 10941 File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent 10942 10943 8.21.1 Command-line Options 10944 --------------------------- 10945 10946 The MMIX version of `as' has some machine-dependent options. 10947 10948 When `--fixed-special-register-names' is specified, only the register 10949 names specified in *Note MMIX-Regs:: are recognized in the instructions 10950 `PUT' and `GET'. 10951 10952 You can use the `--globalize-symbols' to make all symbols global. 10953 This option is useful when splitting up a `mmixal' program into several 10954 files. 10955 10956 The `--gnu-syntax' turns off most syntax compatibility with 10957 `mmixal'. Its usability is currently doubtful. 10958 10959 The `--relax' option is not fully supported, but will eventually make 10960 the object file prepared for linker relaxation. 10961 10962 If you want to avoid inadvertently calling a predefined symbol and 10963 would rather get an error, for example when using `as' with a compiler 10964 or other machine-generated code, specify `--no-predefined-syms'. This 10965 turns off built-in predefined definitions of all such symbols, 10966 including rounding-mode symbols, segment symbols, `BIT' symbols, and 10967 `TRAP' symbols used in `mmix' "system calls". It also turns off 10968 predefined special-register names, except when used in `PUT' and `GET' 10969 instructions. 10970 10971 By default, some instructions are expanded to fit the size of the 10972 operand or an external symbol (*note MMIX-Expand::). By passing 10973 `--no-expand', no such expansion will be done, instead causing errors 10974 at link time if the operand does not fit. 10975 10976 The `mmixal' documentation (*note mmixsite::) specifies that global 10977 registers allocated with the `GREG' directive (*note MMIX-greg::) and 10978 initialized to the same non-zero value, will refer to the same global 10979 register. This isn't strictly enforceable in `as' since the final 10980 addresses aren't known until link-time, but it will do an effort unless 10981 the `--no-merge-gregs' option is specified. (Register merging isn't 10982 yet implemented in `ld'.) 10983 10984 `as' will warn every time it expands an instruction to fit an 10985 operand unless the option `-x' is specified. It is believed that this 10986 behaviour is more useful than just mimicking `mmixal''s behaviour, in 10987 which instructions are only expanded if the `-x' option is specified, 10988 and assembly fails otherwise, when an instruction needs to be expanded. 10989 It needs to be kept in mind that `mmixal' is both an assembler and 10990 linker, while `as' will expand instructions that at link stage can be 10991 contracted. (Though linker relaxation isn't yet implemented in `ld'.) 10992 The option `-x' also imples `--linker-allocated-gregs'. 10993 10994 If instruction expansion is enabled, `as' can expand a `PUSHJ' 10995 instruction into a series of instructions. The shortest expansion is 10996 to not expand it, but just mark the call as redirectable to a stub, 10997 which `ld' creates at link-time, but only if the original `PUSHJ' 10998 instruction is found not to reach the target. The stub consists of the 10999 necessary instructions to form a jump to the target. This happens if 11000 `as' can assert that the `PUSHJ' instruction can reach such a stub. 11001 The option `--no-pushj-stubs' disables this shorter expansion, and the 11002 longer series of instructions is then created at assembly-time. The 11003 option `--no-stubs' is a synonym, intended for compatibility with 11004 future releases, where generation of stubs for other instructions may 11005 be implemented. 11006 11007 Usually a two-operand-expression (*note GREG-base::) without a 11008 matching `GREG' directive is treated as an error by `as'. When the 11009 option `--linker-allocated-gregs' is in effect, they are instead passed 11010 through to the linker, which will allocate as many global registers as 11011 is needed. 11012 11013 11014 File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent 11015 11016 8.21.2 Instruction expansion 11017 ---------------------------- 11018 11019 When `as' encounters an instruction with an operand that is either not 11020 known or does not fit the operand size of the instruction, `as' (and 11021 `ld') will expand the instruction into a sequence of instructions 11022 semantically equivalent to the operand fitting the instruction. 11023 Expansion will take place for the following instructions: 11024 11025 `GETA' 11026 Expands to a sequence of four instructions: `SETL', `INCML', 11027 `INCMH' and `INCH'. The operand must be a multiple of four. 11028 11029 Conditional branches 11030 A branch instruction is turned into a branch with the complemented 11031 condition and prediction bit over five instructions; four 11032 instructions setting `$255' to the operand value, which like with 11033 `GETA' must be a multiple of four, and a final `GO $255,$255,0'. 11034 11035 `PUSHJ' 11036 Similar to expansion for conditional branches; four instructions 11037 set `$255' to the operand value, followed by a `PUSHGO 11038 $255,$255,0'. 11039 11040 `JMP' 11041 Similar to conditional branches and `PUSHJ'. The final instruction 11042 is `GO $255,$255,0'. 11043 11044 The linker `ld' is expected to shrink these expansions for code 11045 assembled with `--relax' (though not currently implemented). 11046 11047 11048 File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent 11049 11050 8.21.3 Syntax 11051 ------------- 11052 11053 The assembly syntax is supposed to be upward compatible with that 11054 described in Sections 1.3 and 1.4 of `The Art of Computer Programming, 11055 Volume 1'. Draft versions of those chapters as well as other MMIX 11056 information is located at 11057 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code 11058 examples from the mmixal package located there should work unmodified 11059 when assembled and linked as single files, with a few noteworthy 11060 exceptions (*note MMIX-mmixal::). 11061 11062 Before an instruction is emitted, the current location is aligned to 11063 the next four-byte boundary. If a label is defined at the beginning of 11064 the line, its value will be the aligned value. 11065 11066 In addition to the traditional hex-prefix `0x', a hexadecimal number 11067 can also be specified by the prefix character `#'. 11068 11069 After all operands to an MMIX instruction or directive have been 11070 specified, the rest of the line is ignored, treated as a comment. 11071 11072 * Menu: 11073 11074 * MMIX-Chars:: Special Characters 11075 * MMIX-Symbols:: Symbols 11076 * MMIX-Regs:: Register Names 11077 * MMIX-Pseudos:: Assembler Directives 11078 11079 11080 File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax 11081 11082 8.21.3.1 Special Characters 11083 ........................... 11084 11085 The characters `*' and `#' are line comment characters; each start a 11086 comment at the beginning of a line, but only at the beginning of a 11087 line. A `#' prefixes a hexadecimal number if found elsewhere on a line. 11088 11089 Two other characters, `%' and `!', each start a comment anywhere on 11090 the line. Thus you can't use the `modulus' and `not' operators in 11091 expressions normally associated with these two characters. 11092 11093 A `;' is a line separator, treated as a new-line, so separate 11094 instructions can be specified on a single line. 11095 11096 11097 File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax 11098 11099 8.21.3.2 Symbols 11100 ................ 11101 11102 The character `:' is permitted in identifiers. There are two 11103 exceptions to it being treated as any other symbol character: if a 11104 symbol begins with `:', it means that the symbol is in the global 11105 namespace and that the current prefix should not be prepended to that 11106 symbol (*note MMIX-prefix::). The `:' is then not considered part of 11107 the symbol. For a symbol in the label position (first on a line), a `:' 11108 at the end of a symbol is silently stripped off. A label is permitted, 11109 but not required, to be followed by a `:', as with many other assembly 11110 formats. 11111 11112 The character `@' in an expression, is a synonym for `.', the 11113 current location. 11114 11115 In addition to the common forward and backward local symbol formats 11116 (*note Symbol Names::), they can be specified with upper-case `B' and 11117 `F', as in `8B' and `9F'. A local label defined for the current 11118 position is written with a `H' appended to the number: 11119 3H LDB $0,$1,2 11120 This and traditional local-label formats cannot be mixed: a label 11121 must be defined and referred to using the same format. 11122 11123 There's a minor caveat: just as for the ordinary local symbols, the 11124 local symbols are translated into ordinary symbols using control 11125 characters are to hide the ordinal number of the symbol. 11126 Unfortunately, these symbols are not translated back in error messages. 11127 Thus you may see confusing error messages when local symbols are used. 11128 Control characters `\003' (control-C) and `\004' (control-D) are used 11129 for the MMIX-specific local-symbol syntax. 11130 11131 The symbol `Main' is handled specially; it is always global. 11132 11133 By defining the symbols `__.MMIX.start..text' and 11134 `__.MMIX.start..data', the address of respectively the `.text' and 11135 `.data' segments of the final program can be defined, though when 11136 linking more than one object file, the code or data in the object file 11137 containing the symbol is not guaranteed to be start at that position; 11138 just the final executable. *Note MMIX-loc::. 11139 11140 11141 File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax 11142 11143 8.21.3.3 Register names 11144 ....................... 11145 11146 Local and global registers are specified as `$0' to `$255'. The 11147 recognized special register names are `rJ', `rA', `rB', `rC', `rD', 11148 `rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ', 11149 `rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT', 11150 `rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special 11151 register names. 11152 11153 Local and global symbols can be equated to register names and used in 11154 place of ordinary registers. 11155 11156 Similarly for special registers, local and global symbols can be 11157 used. Also, symbols equated from numbers and constant expressions are 11158 allowed in place of a special register, except when either of the 11159 options `--no-predefined-syms' and `--fixed-special-register-names' are 11160 specified. Then only the special register names above are allowed for 11161 the instructions having a special register operand; `GET' and `PUT'. 11162 11163 11164 File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax 11165 11166 8.21.3.4 Assembler Directives 11167 ............................. 11168 11169 `LOC' 11170 The `LOC' directive sets the current location to the value of the 11171 operand field, which may include changing sections. If the 11172 operand is a constant, the section is set to either `.data' if the 11173 value is `0x2000000000000000' or larger, else it is set to `.text'. 11174 Within a section, the current location may only be changed to 11175 monotonically higher addresses. A LOC expression must be a 11176 previously defined symbol or a "pure" constant. 11177 11178 An example, which sets the label PREV to the current location, and 11179 updates the current location to eight bytes forward: 11180 prev LOC @+8 11181 11182 When a LOC has a constant as its operand, a symbol 11183 `__.MMIX.start..text' or `__.MMIX.start..data' is defined 11184 depending on the address as mentioned above. Each such symbol is 11185 interpreted as special by the linker, locating the section at that 11186 address. Note that if multiple files are linked, the first object 11187 file with that section will be mapped to that address (not 11188 necessarily the file with the LOC definition). 11189 11190 `LOCAL' 11191 Example: 11192 LOCAL external_symbol 11193 LOCAL 42 11194 .local asymbol 11195 11196 This directive-operation generates a link-time assertion that the 11197 operand does not correspond to a global register. The operand is 11198 an expression that at link-time resolves to a register symbol or a 11199 number. A number is treated as the register having that number. 11200 There is one restriction on the use of this directive: the 11201 pseudo-directive must be placed in a section with contents, code 11202 or data. 11203 11204 `IS' 11205 The `IS' directive: 11206 asymbol IS an_expression 11207 sets the symbol `asymbol' to `an_expression'. A symbol may not be 11208 set more than once using this directive. Local labels may be set 11209 using this directive, for example: 11210 5H IS @+4 11211 11212 `GREG' 11213 This directive reserves a global register, gives it an initial 11214 value and optionally gives it a symbolic name. Some examples: 11215 11216 areg GREG 11217 breg GREG data_value 11218 GREG data_buffer 11219 .greg creg, another_data_value 11220 11221 The symbolic register name can be used in place of a (non-special) 11222 register. If a value isn't provided, it defaults to zero. Unless 11223 the option `--no-merge-gregs' is specified, non-zero registers 11224 allocated with this directive may be eliminated by `as'; another 11225 register with the same value used in its place. Any of the 11226 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU', 11227 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW', 11228 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT', 11229 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can 11230 have a value nearby an initial value in place of its second and 11231 third operands. Here, "nearby" is defined as within the range 11232 0...255 from the initial value of such an allocated register. 11233 11234 buffer1 BYTE 0,0,0,0,0 11235 buffer2 BYTE 0,0,0,0,0 11236 ... 11237 GREG buffer1 11238 LDOU $42,buffer2 11239 In the example above, the `Y' field of the `LDOUI' instruction 11240 (LDOU with a constant Z) will be replaced with the global register 11241 allocated for `buffer1', and the `Z' field will have the value 5, 11242 the offset from `buffer1' to `buffer2'. The result is equivalent 11243 to this code: 11244 buffer1 BYTE 0,0,0,0,0 11245 buffer2 BYTE 0,0,0,0,0 11246 ... 11247 tmpreg GREG buffer1 11248 LDOU $42,tmpreg,(buffer2-buffer1) 11249 11250 Global registers allocated with this directive are allocated in 11251 order higher-to-lower within a file. Other than that, the exact 11252 order of register allocation and elimination is undefined. For 11253 example, the order is undefined when more than one file with such 11254 directives are linked together. With the options `-x' and 11255 `--linker-allocated-gregs', `GREG' directives for two-operand 11256 cases like the one mentioned above can be omitted. Sufficient 11257 global registers will then be allocated by the linker. 11258 11259 `BYTE' 11260 The `BYTE' directive takes a series of operands separated by a 11261 comma. If an operand is a string (*note Strings::), each 11262 character of that string is emitted as a byte. Other operands 11263 must be constant expressions without forward references, in the 11264 range 0...255. If you need operands having expressions with 11265 forward references, use `.byte' (*note Byte::). An operand can be 11266 omitted, defaulting to a zero value. 11267 11268 `WYDE' 11269 `TETRA' 11270 `OCTA' 11271 The directives `WYDE', `TETRA' and `OCTA' emit constants of two, 11272 four and eight bytes size respectively. Before anything else 11273 happens for the directive, the current location is aligned to the 11274 respective constant-size boundary. If a label is defined at the 11275 beginning of the line, its value will be that after the alignment. 11276 A single operand can be omitted, defaulting to a zero value 11277 emitted for the directive. Operands can be expressed as strings 11278 (*note Strings::), in which case each character in the string is 11279 emitted as a separate constant of the size indicated by the 11280 directive. 11281 11282 `PREFIX' 11283 The `PREFIX' directive sets a symbol name prefix to be prepended to 11284 all symbols (except local symbols, *note MMIX-Symbols::), that are 11285 not prefixed with `:', until the next `PREFIX' directive. Such 11286 prefixes accumulate. For example, 11287 PREFIX a 11288 PREFIX b 11289 c IS 0 11290 defines a symbol `abc' with the value 0. 11291 11292 `BSPEC' 11293 `ESPEC' 11294 A pair of `BSPEC' and `ESPEC' directives delimit a section of 11295 special contents (without specified semantics). Example: 11296 BSPEC 42 11297 TETRA 1,2,3 11298 ESPEC 11299 The single operand to `BSPEC' must be number in the range 0...255. 11300 The `BSPEC' number 80 is used by the GNU binutils implementation. 11301 11302 11303 File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent 11304 11305 8.21.4 Differences to `mmixal' 11306 ------------------------------ 11307 11308 The binutils `as' and `ld' combination has a few differences in 11309 function compared to `mmixal' (*note mmixsite::). 11310 11311 The replacement of a symbol with a GREG-allocated register (*note 11312 GREG-base::) is not handled the exactly same way in `as' as in 11313 `mmixal'. This is apparent in the `mmixal' example file `inout.mms', 11314 where different registers with different offsets, eventually yielding 11315 the same address, are used in the first instruction. This type of 11316 difference should however not affect the function of any program unless 11317 it has specific assumptions about the allocated register number. 11318 11319 Line numbers (in the `mmo' object format) are currently not 11320 supported. 11321 11322 Expression operator precedence is not that of mmixal: operator 11323 precedence is that of the C programming language. It's recommended to 11324 use parentheses to explicitly specify wanted operator precedence 11325 whenever more than one type of operators are used. 11326 11327 The serialize unary operator `&', the fractional division operator 11328 `//', the logical not operator `!' and the modulus operator `%' are not 11329 available. 11330 11331 Symbols are not global by default, unless the option 11332 `--globalize-symbols' is passed. Use the `.global' directive to 11333 globalize symbols (*note Global::). 11334 11335 Operand syntax is a bit stricter with `as' than `mmixal'. For 11336 example, you can't say `addu 1,2,3', instead you must write `addu 11337 $1,$2,3'. 11338 11339 You can't LOC to a lower address than those already visited (i.e. 11340 "backwards"). 11341 11342 A LOC directive must come before any emitted code. 11343 11344 Predefined symbols are visible as file-local symbols after use. (In 11345 the ELF file, that is--the linked mmo file has no notion of a file-local 11346 symbol.) 11347 11348 Some mapping of constant expressions to sections in LOC expressions 11349 is attempted, but that functionality is easily confused and should be 11350 avoided unless compatibility with `mmixal' is required. A LOC 11351 expression to `0x2000000000000000' or higher, maps to the `.data' 11352 section and lower addresses map to the `.text' section (*note 11353 MMIX-loc::). 11354 11355 The code and data areas are each contiguous. Sparse programs with 11356 far-away LOC directives will take up the same amount of space as a 11357 contiguous program with zeros filled in the gaps between the LOC 11358 directives. If you need sparse programs, you might try and get the 11359 wanted effect with a linker script and splitting up the code parts into 11360 sections (*note Section::). Assembly code for this, to be compatible 11361 with `mmixal', would look something like: 11362 .if 0 11363 LOC away_expression 11364 .else 11365 .section away,"ax" 11366 .fi 11367 `as' will not execute the LOC directive and `mmixal' ignores the 11368 lines with `.'. This construct can be used generally to help 11369 compatibility. 11370 11371 Symbols can't be defined twice-not even to the same value. 11372 11373 Instruction mnemonics are recognized case-insensitive, though the 11374 `IS' and `GREG' pseudo-operations must be specified in upper-case 11375 characters. 11376 11377 There's no unicode support. 11378 11379 The following is a list of programs in `mmix.tar.gz', available at 11380 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last 11381 checked with the version dated 2001-08-25 (md5sum 11382 c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do 11383 not assemble with `as': 11384 11385 `silly.mms' 11386 LOC to a previous address. 11387 11388 `sim.mms' 11389 Redefines symbol `Done'. 11390 11391 `test.mms' 11392 Uses the serial operator `&'. 11393 11394 11395 File: as.info, Node: MSP430-Dependent, Next: SH-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies 11396 11397 8.22 MSP 430 Dependent Features 11398 =============================== 11399 11400 * Menu: 11401 11402 * MSP430 Options:: Options 11403 * MSP430 Syntax:: Syntax 11404 * MSP430 Floating Point:: Floating Point 11405 * MSP430 Directives:: MSP 430 Machine Directives 11406 * MSP430 Opcodes:: Opcodes 11407 * MSP430 Profiling Capability:: Profiling Capability 11408 11409 11410 File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent 11411 11412 8.22.1 Options 11413 -------------- 11414 11415 `-m' 11416 select the mpu arch. Currently has no effect. 11417 11418 `-mP' 11419 enables polymorph instructions handler. 11420 11421 `-mQ' 11422 enables relaxation at assembly time. DANGEROUS! 11423 11424 11425 11426 File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent 11427 11428 8.22.2 Syntax 11429 ------------- 11430 11431 * Menu: 11432 11433 * MSP430-Macros:: Macros 11434 * MSP430-Chars:: Special Characters 11435 * MSP430-Regs:: Register Names 11436 * MSP430-Ext:: Assembler Extensions 11437 11438 11439 File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax 11440 11441 8.22.2.1 Macros 11442 ............... 11443 11444 The macro syntax used on the MSP 430 is like that described in the MSP 11445 430 Family Assembler Specification. Normal `as' macros should still 11446 work. 11447 11448 Additional built-in macros are: 11449 11450 `llo(exp)' 11451 Extracts least significant word from 32-bit expression 'exp'. 11452 11453 `lhi(exp)' 11454 Extracts most significant word from 32-bit expression 'exp'. 11455 11456 `hlo(exp)' 11457 Extracts 3rd word from 64-bit expression 'exp'. 11458 11459 `hhi(exp)' 11460 Extracts 4rd word from 64-bit expression 'exp'. 11461 11462 11463 They normally being used as an immediate source operand. 11464 mov #llo(1), r10 ; == mov #1, r10 11465 mov #lhi(1), r10 ; == mov #0, r10 11466 11467 11468 File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax 11469 11470 8.22.2.2 Special Characters 11471 ........................... 11472 11473 `;' is the line comment character. 11474 11475 The character `$' in jump instructions indicates current location and 11476 implemented only for TI syntax compatibility. 11477 11478 11479 File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax 11480 11481 8.22.2.3 Register Names 11482 ....................... 11483 11484 General-purpose registers are represented by predefined symbols of the 11485 form `rN' (for global registers), where N represents a number between 11486 `0' and `15'. The leading letters may be in either upper or lower 11487 case; for example, `r13' and `R7' are both valid register names. 11488 11489 Register names `PC', `SP' and `SR' cannot be used as register names 11490 and will be treated as variables. Use `r0', `r1', and `r2' instead. 11491 11492 11493 File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax 11494 11495 8.22.2.4 Assembler Extensions 11496 ............................. 11497 11498 `@rN' 11499 As destination operand being treated as `0(rn)' 11500 11501 `0(rN)' 11502 As source operand being treated as `@rn' 11503 11504 `jCOND +N' 11505 Skips next N bytes followed by jump instruction and equivalent to 11506 `jCOND $+N+2' 11507 11508 11509 Also, there are some instructions, which cannot be found in other 11510 assemblers. These are branch instructions, which has different opcodes 11511 upon jump distance. They all got PC relative addressing mode. 11512 11513 `beq label' 11514 A polymorph instruction which is `jeq label' in case if jump 11515 distance within allowed range for cpu's jump instruction. If not, 11516 this unrolls into a sequence of 11517 jne $+6 11518 br label 11519 11520 `bne label' 11521 A polymorph instruction which is `jne label' or `jeq +4; br label' 11522 11523 `blt label' 11524 A polymorph instruction which is `jl label' or `jge +4; br label' 11525 11526 `bltn label' 11527 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br 11528 label' 11529 11530 `bltu label' 11531 A polymorph instruction which is `jlo label' or `jhs +2; br label' 11532 11533 `bge label' 11534 A polymorph instruction which is `jge label' or `jl +4; br label' 11535 11536 `bgeu label' 11537 A polymorph instruction which is `jhs label' or `jlo +4; br label' 11538 11539 `bgt label' 11540 A polymorph instruction which is `jeq +2; jge label' or `jeq +6; 11541 jl +4; br label' 11542 11543 `bgtu label' 11544 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6; 11545 jlo +4; br label' 11546 11547 `bleu label' 11548 A polymorph instruction which is `jeq label; jlo label' or `jeq 11549 +2; jhs +4; br label' 11550 11551 `ble label' 11552 A polymorph instruction which is `jeq label; jl label' or `jeq 11553 +2; jge +4; br label' 11554 11555 `jump label' 11556 A polymorph instruction which is `jmp label' or `br label' 11557 11558 11559 File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent 11560 11561 8.22.3 Floating Point 11562 --------------------- 11563 11564 The MSP 430 family uses IEEE 32-bit floating-point numbers. 11565 11566 11567 File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent 11568 11569 8.22.4 MSP 430 Machine Directives 11570 --------------------------------- 11571 11572 `.file' 11573 This directive is ignored; it is accepted for compatibility with 11574 other MSP 430 assemblers. 11575 11576 _Warning:_ in other versions of the GNU assembler, `.file' is 11577 used for the directive called `.app-file' in the MSP 430 11578 support. 11579 11580 `.line' 11581 This directive is ignored; it is accepted for compatibility with 11582 other MSP 430 assemblers. 11583 11584 `.arch' 11585 Currently this directive is ignored; it is accepted for 11586 compatibility with other MSP 430 assemblers. 11587 11588 `.profiler' 11589 This directive instructs assembler to add new profile entry to the 11590 object file. 11591 11592 11593 11594 File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent 11595 11596 8.22.5 Opcodes 11597 -------------- 11598 11599 `as' implements all the standard MSP 430 opcodes. No additional 11600 pseudo-instructions are needed on this family. 11601 11602 For information on the 430 machine instruction set, see `MSP430 11603 User's Manual, document slau049d', Texas Instrument, Inc. 11604 11605 11606 File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent 11607 11608 8.22.6 Profiling Capability 11609 --------------------------- 11610 11611 It is a performance hit to use gcc's profiling approach for this tiny 11612 target. Even more - jtag hardware facility does not perform any 11613 profiling functions. However we've got gdb's built-in simulator where 11614 we can do anything. 11615 11616 We define new section `.profiler' which holds all profiling 11617 information. We define new pseudo operation `.profiler' which will 11618 instruct assembler to add new profile entry to the object file. Profile 11619 should take place at the present address. 11620 11621 Pseudo operation format: 11622 11623 `.profiler flags,function_to_profile [, cycle_corrector, extra]' 11624 11625 where: 11626 11627 `flags' is a combination of the following characters: 11628 11629 `s' 11630 function entry 11631 11632 `x' 11633 function exit 11634 11635 `i' 11636 function is in init section 11637 11638 `f' 11639 function is in fini section 11640 11641 `l' 11642 library call 11643 11644 `c' 11645 libc standard call 11646 11647 `d' 11648 stack value demand 11649 11650 `I' 11651 interrupt service routine 11652 11653 `P' 11654 prologue start 11655 11656 `p' 11657 prologue end 11658 11659 `E' 11660 epilogue start 11661 11662 `e' 11663 epilogue end 11664 11665 `j' 11666 long jump / sjlj unwind 11667 11668 `a' 11669 an arbitrary code fragment 11670 11671 `t' 11672 extra parameter saved (a constant value like frame size) 11673 11674 `function_to_profile' 11675 a function address 11676 11677 `cycle_corrector' 11678 a value which should be added to the cycle counter, zero if 11679 omitted. 11680 11681 `extra' 11682 any extra parameter, zero if omitted. 11683 11684 11685 For example: 11686 .global fxx 11687 .type fxx,@function 11688 fxx: 11689 .LFrameOffset_fxx=0x08 11690 .profiler "scdP", fxx ; function entry. 11691 ; we also demand stack value to be saved 11692 push r11 11693 push r10 11694 push r9 11695 push r8 11696 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point 11697 ; (this is a prologue end) 11698 ; note, that spare var filled with 11699 ; the farme size 11700 mov r15,r8 11701 ... 11702 .profiler cdE,fxx ; check stack 11703 pop r8 11704 pop r9 11705 pop r10 11706 pop r11 11707 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter 11708 ret ; cause 'ret' insn takes 3 cycles 11709 11710 11711 File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies 11712 11713 8.23 PDP-11 Dependent Features 11714 ============================== 11715 11716 * Menu: 11717 11718 * PDP-11-Options:: Options 11719 * PDP-11-Pseudos:: Assembler Directives 11720 * PDP-11-Syntax:: DEC Syntax versus BSD Syntax 11721 * PDP-11-Mnemonics:: Instruction Naming 11722 * PDP-11-Synthetic:: Synthetic Instructions 11723 11724 11725 File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent 11726 11727 8.23.1 Options 11728 -------------- 11729 11730 The PDP-11 version of `as' has a rich set of machine dependent options. 11731 11732 8.23.1.1 Code Generation Options 11733 ................................ 11734 11735 `-mpic | -mno-pic' 11736 Generate position-independent (or position-dependent) code. 11737 11738 The default is to generate position-independent code. 11739 11740 8.23.1.2 Instruction Set Extension Options 11741 .......................................... 11742 11743 These options enables or disables the use of extensions over the base 11744 line instruction set as introduced by the first PDP-11 CPU: the KA11. 11745 Most options come in two variants: a `-m'EXTENSION that enables 11746 EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION. 11747 11748 The default is to enable all extensions. 11749 11750 `-mall | -mall-extensions' 11751 Enable all instruction set extensions. 11752 11753 `-mno-extensions' 11754 Disable all instruction set extensions. 11755 11756 `-mcis | -mno-cis' 11757 Enable (or disable) the use of the commercial instruction set, 11758 which consists of these instructions: `ADDNI', `ADDN', `ADDPI', 11759 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC', 11760 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI', 11761 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL', 11762 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI', 11763 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC', 11764 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI', 11765 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'. 11766 11767 `-mcsm | -mno-csm' 11768 Enable (or disable) the use of the `CSM' instruction. 11769 11770 `-meis | -mno-eis' 11771 Enable (or disable) the use of the extended instruction set, which 11772 consists of these instructions: `ASHC', `ASH', `DIV', `MARK', 11773 `MUL', `RTT', `SOB' `SXT', and `XOR'. 11774 11775 `-mfis | -mkev11' 11776 `-mno-fis | -mno-kev11' 11777 Enable (or disable) the use of the KEV11 floating-point 11778 instructions: `FADD', `FDIV', `FMUL', and `FSUB'. 11779 11780 `-mfpp | -mfpu | -mfp-11' 11781 `-mno-fpp | -mno-fpu | -mno-fp-11' 11782 Enable (or disable) the use of FP-11 floating-point instructions: 11783 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF', 11784 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF', 11785 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST', 11786 `SUBF', and `TSTF'. 11787 11788 `-mlimited-eis | -mno-limited-eis' 11789 Enable (or disable) the use of the limited extended instruction 11790 set: `MARK', `RTT', `SOB', `SXT', and `XOR'. 11791 11792 The -mno-limited-eis options also implies -mno-eis. 11793 11794 `-mmfpt | -mno-mfpt' 11795 Enable (or disable) the use of the `MFPT' instruction. 11796 11797 `-mmultiproc | -mno-multiproc' 11798 Enable (or disable) the use of multiprocessor instructions: 11799 `TSTSET' and `WRTLCK'. 11800 11801 `-mmxps | -mno-mxps' 11802 Enable (or disable) the use of the `MFPS' and `MTPS' instructions. 11803 11804 `-mspl | -mno-spl' 11805 Enable (or disable) the use of the `SPL' instruction. 11806 11807 Enable (or disable) the use of the microcode instructions: `LDUB', 11808 `MED', and `XFC'. 11809 11810 8.23.1.3 CPU Model Options 11811 .......................... 11812 11813 These options enable the instruction set extensions supported by a 11814 particular CPU, and disables all other extensions. 11815 11816 `-mka11' 11817 KA11 CPU. Base line instruction set only. 11818 11819 `-mkb11' 11820 KB11 CPU. Enable extended instruction set and `SPL'. 11821 11822 `-mkd11a' 11823 KD11-A CPU. Enable limited extended instruction set. 11824 11825 `-mkd11b' 11826 KD11-B CPU. Base line instruction set only. 11827 11828 `-mkd11d' 11829 KD11-D CPU. Base line instruction set only. 11830 11831 `-mkd11e' 11832 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'. 11833 11834 `-mkd11f | -mkd11h | -mkd11q' 11835 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended 11836 instruction set, `MFPS', and `MTPS'. 11837 11838 `-mkd11k' 11839 KD11-K CPU. Enable extended instruction set, `LDUB', `MED', 11840 `MFPS', `MFPT', `MTPS', and `XFC'. 11841 11842 `-mkd11z' 11843 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS', 11844 `MFPT', `MTPS', and `SPL'. 11845 11846 `-mf11' 11847 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and 11848 `MTPS'. 11849 11850 `-mj11' 11851 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT', 11852 `MTPS', `SPL', `TSTSET', and `WRTLCK'. 11853 11854 `-mt11' 11855 T11 CPU. Enable limited extended instruction set, `MFPS', and 11856 `MTPS'. 11857 11858 8.23.1.4 Machine Model Options 11859 .............................. 11860 11861 These options enable the instruction set extensions supported by a 11862 particular machine model, and disables all other extensions. 11863 11864 `-m11/03' 11865 Same as `-mkd11f'. 11866 11867 `-m11/04' 11868 Same as `-mkd11d'. 11869 11870 `-m11/05 | -m11/10' 11871 Same as `-mkd11b'. 11872 11873 `-m11/15 | -m11/20' 11874 Same as `-mka11'. 11875 11876 `-m11/21' 11877 Same as `-mt11'. 11878 11879 `-m11/23 | -m11/24' 11880 Same as `-mf11'. 11881 11882 `-m11/34' 11883 Same as `-mkd11e'. 11884 11885 `-m11/34a' 11886 Ame as `-mkd11e' `-mfpp'. 11887 11888 `-m11/35 | -m11/40' 11889 Same as `-mkd11a'. 11890 11891 `-m11/44' 11892 Same as `-mkd11z'. 11893 11894 `-m11/45 | -m11/50 | -m11/55 | -m11/70' 11895 Same as `-mkb11'. 11896 11897 `-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94' 11898 Same as `-mj11'. 11899 11900 `-m11/60' 11901 Same as `-mkd11k'. 11902 11903 11904 File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent 11905 11906 8.23.2 Assembler Directives 11907 --------------------------- 11908 11909 The PDP-11 version of `as' has a few machine dependent assembler 11910 directives. 11911 11912 `.bss' 11913 Switch to the `bss' section. 11914 11915 `.even' 11916 Align the location counter to an even number. 11917 11918 11919 File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent 11920 11921 8.23.3 PDP-11 Assembly Language Syntax 11922 -------------------------------------- 11923 11924 `as' supports both DEC syntax and BSD syntax. The only difference is 11925 that in DEC syntax, a `#' character is used to denote an immediate 11926 constants, while in BSD syntax the character for this purpose is `$'. 11927 11928 eneral-purpose registers are named `r0' through `r7'. Mnemonic 11929 alternatives for `r6' and `r7' are `sp' and `pc', respectively. 11930 11931 Floating-point registers are named `ac0' through `ac3', or 11932 alternatively `fr0' through `fr3'. 11933 11934 Comments are started with a `#' or a `/' character, and extend to 11935 the end of the line. (FIXME: clash with immediates?) 11936 11937 11938 File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent 11939 11940 8.23.4 Instruction Naming 11941 ------------------------- 11942 11943 Some instructions have alternative names. 11944 11945 `BCC' 11946 `BHIS' 11947 11948 `BCS' 11949 `BLO' 11950 11951 `L2DR' 11952 `L2D' 11953 11954 `L3DR' 11955 `L3D' 11956 11957 `SYS' 11958 `TRAP' 11959 11960 11961 File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent 11962 11963 8.23.5 Synthetic Instructions 11964 ----------------------------- 11965 11966 The `JBR' and `J'CC synthetic instructions are not supported yet. 11967 11968 11969 File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies 11970 11971 8.24 picoJava Dependent Features 11972 ================================ 11973 11974 * Menu: 11975 11976 * PJ Options:: Options 11977 11978 11979 File: as.info, Node: PJ Options, Up: PJ-Dependent 11980 11981 8.24.1 Options 11982 -------------- 11983 11984 `as' has two additional command-line options for the picoJava 11985 architecture. 11986 `-ml' 11987 This option selects little endian data output. 11988 11989 `-mb' 11990 This option selects big endian data output. 11991 11992 11993 File: as.info, Node: PPC-Dependent, Next: Sparc-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies 11994 11995 8.25 PowerPC Dependent Features 11996 =============================== 11997 11998 * Menu: 11999 12000 * PowerPC-Opts:: Options 12001 * PowerPC-Pseudo:: PowerPC Assembler Directives 12002 12003 12004 File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent 12005 12006 8.25.1 Options 12007 -------------- 12008 12009 The PowerPC chip family includes several successive levels, using the 12010 same core instruction set, but including a few additional instructions 12011 at each level. There are exceptions to this however. For details on 12012 what instructions each variant supports, please see the chip's 12013 architecture reference manual. 12014 12015 The following table lists all available PowerPC options. 12016 12017 `-mpwrx | -mpwr2' 12018 Generate code for POWER/2 (RIOS2). 12019 12020 `-mpwr' 12021 Generate code for POWER (RIOS1) 12022 12023 `-m601' 12024 Generate code for PowerPC 601. 12025 12026 `-mppc, -mppc32, -m603, -m604' 12027 Generate code for PowerPC 603/604. 12028 12029 `-m403, -m405' 12030 Generate code for PowerPC 403/405. 12031 12032 `-m440' 12033 Generate code for PowerPC 440. BookE and some 405 instructions. 12034 12035 `-m7400, -m7410, -m7450, -m7455' 12036 Generate code for PowerPC 7400/7410/7450/7455. 12037 12038 `-mppc64, -m620' 12039 Generate code for PowerPC 620/625/630. 12040 12041 `-mppc64bridge' 12042 Generate code for PowerPC 64, including bridge insns. 12043 12044 `-mbooke64' 12045 Generate code for 64-bit BookE. 12046 12047 `-mbooke, mbooke32' 12048 Generate code for 32-bit BookE. 12049 12050 `-me300' 12051 Generate code for PowerPC e300 family. 12052 12053 `-maltivec' 12054 Generate code for processors with AltiVec instructions. 12055 12056 `-mpower4' 12057 Generate code for Power4 architecture. 12058 12059 `-mpower5' 12060 Generate code for Power5 architecture. 12061 12062 `-mcom' 12063 Generate code Power/PowerPC common instructions. 12064 12065 `-many' 12066 Generate code for any architecture (PWR/PWRX/PPC). 12067 12068 `-mregnames' 12069 Allow symbolic names for registers. 12070 12071 `-mno-regnames' 12072 Do not allow symbolic names for registers. 12073 12074 `-mrelocatable' 12075 Support for GCC's -mrelocatble option. 12076 12077 `-mrelocatable-lib' 12078 Support for GCC's -mrelocatble-lib option. 12079 12080 `-memb' 12081 Set PPC_EMB bit in ELF flags. 12082 12083 `-mlittle, -mlittle-endian' 12084 Generate code for a little endian machine. 12085 12086 `-mbig, -mbig-endian' 12087 Generate code for a big endian machine. 12088 12089 `-msolaris' 12090 Generate code for Solaris. 12091 12092 `-mno-solaris' 12093 Do not generate code for Solaris. 12094 12095 12096 File: as.info, Node: PowerPC-Pseudo, Prev: PowerPC-Opts, Up: PPC-Dependent 12097 12098 8.25.2 PowerPC Assembler Directives 12099 ----------------------------------- 12100 12101 A number of assembler directives are available for PowerPC. The 12102 following table is far from complete. 12103 12104 `.machine "string"' 12105 This directive allows you to change the machine for which code is 12106 generated. `"string"' may be any of the -m cpu selection options 12107 (without the -m) enclosed in double quotes, `"push"', or `"pop"'. 12108 `.machine "push"' saves the currently selected cpu, which may be 12109 restored with `.machine "pop"'. 12110 12111 12112 File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies 12113 12114 8.26 Renesas / SuperH SH Dependent Features 12115 =========================================== 12116 12117 * Menu: 12118 12119 * SH Options:: Options 12120 * SH Syntax:: Syntax 12121 * SH Floating Point:: Floating Point 12122 * SH Directives:: SH Machine Directives 12123 * SH Opcodes:: Opcodes 12124 12125 12126 File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent 12127 12128 8.26.1 Options 12129 -------------- 12130 12131 `as' has following command-line options for the Renesas (formerly 12132 Hitachi) / SuperH SH family. 12133 12134 `--little' 12135 Generate little endian code. 12136 12137 `--big' 12138 Generate big endian code. 12139 12140 `--relax' 12141 Alter jump instructions for long displacements. 12142 12143 `--small' 12144 Align sections to 4 byte boundaries, not 16. 12145 12146 `--dsp' 12147 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12148 12149 `--renesas' 12150 Disable optimization with section symbol for compatibility with 12151 Renesas assembler. 12152 12153 `--allow-reg-prefix' 12154 Allow '$' as a register name prefix. 12155 12156 `--isa=sh4 | sh4a' 12157 Specify the sh4 or sh4a instruction set. 12158 12159 `--isa=dsp' 12160 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12161 12162 `--isa=fp' 12163 Enable sh2e, sh3e, sh4, and sh4a insn sets. 12164 12165 `--isa=all' 12166 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 12167 12168 12169 12170 File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent 12171 12172 8.26.2 Syntax 12173 ------------- 12174 12175 * Menu: 12176 12177 * SH-Chars:: Special Characters 12178 * SH-Regs:: Register Names 12179 * SH-Addressing:: Addressing Modes 12180 12181 12182 File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax 12183 12184 8.26.2.1 Special Characters 12185 ........................... 12186 12187 `!' is the line comment character. 12188 12189 You can use `;' instead of a newline to separate statements. 12190 12191 Since `$' has no special meaning, you may use it in symbol names. 12192 12193 12194 File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax 12195 12196 8.26.2.2 Register Names 12197 ....................... 12198 12199 You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', 12200 `r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to 12201 refer to the SH registers. 12202 12203 The SH also has these control registers: 12204 12205 `pr' 12206 procedure register (holds return address) 12207 12208 `pc' 12209 program counter 12210 12211 `mach' 12212 `macl' 12213 high and low multiply accumulator registers 12214 12215 `sr' 12216 status register 12217 12218 `gbr' 12219 global base register 12220 12221 `vbr' 12222 vector base register (for interrupt vectors) 12223 12224 12225 File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax 12226 12227 8.26.2.3 Addressing Modes 12228 ......................... 12229 12230 `as' understands the following addressing modes for the SH. `RN' in 12231 the following refers to any of the numbered registers, but _not_ the 12232 control registers. 12233 12234 `RN' 12235 Register direct 12236 12237 `@RN' 12238 Register indirect 12239 12240 `@-RN' 12241 Register indirect with pre-decrement 12242 12243 `@RN+' 12244 Register indirect with post-increment 12245 12246 `@(DISP, RN)' 12247 Register indirect with displacement 12248 12249 `@(R0, RN)' 12250 Register indexed 12251 12252 `@(DISP, GBR)' 12253 `GBR' offset 12254 12255 `@(R0, GBR)' 12256 GBR indexed 12257 12258 `ADDR' 12259 `@(DISP, PC)' 12260 PC relative address (for branch or for addressing memory). The 12261 `as' implementation allows you to use the simpler form ADDR 12262 anywhere a PC relative address is called for; the alternate form 12263 is supported for compatibility with other assemblers. 12264 12265 `#IMM' 12266 Immediate data 12267 12268 12269 File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent 12270 12271 8.26.3 Floating Point 12272 --------------------- 12273 12274 SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other 12275 SH groups can use `.float' directive to generate IEEE floating-point 12276 numbers. 12277 12278 SH2E and SH3E support single-precision floating point calculations as 12279 well as entirely PCAPI compatible emulation of double-precision 12280 floating point calculations. SH2E and SH3E instructions are a subset of 12281 the floating point calculations conforming to the IEEE754 standard. 12282 12283 In addition to single-precision and double-precision floating-point 12284 operation capability, the on-chip FPU of SH4 has a 128-bit graphic 12285 engine that enables 32-bit floating-point data to be processed 128 bits 12286 at a time. It also supports 4 * 4 array operations and inner product 12287 operations. Also, a superscalar architecture is employed that enables 12288 simultaneous execution of two instructions (including FPU 12289 instructions), providing performance of up to twice that of 12290 conventional architectures at the same frequency. 12291 12292 12293 File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent 12294 12295 8.26.4 SH Machine Directives 12296 ---------------------------- 12297 12298 `uaword' 12299 `ualong' 12300 `as' will issue a warning when a misaligned `.word' or `.long' 12301 directive is used. You may use `.uaword' or `.ualong' to indicate 12302 that the value is intentionally misaligned. 12303 12304 12305 File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent 12306 12307 8.26.5 Opcodes 12308 -------------- 12309 12310 For detailed information on the SH machine instruction set, see 12311 `SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core 12312 Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH). 12313 12314 `as' implements all the standard SH opcodes. No additional 12315 pseudo-instructions are needed on this family. Note, however, that 12316 because `as' supports a simpler form of PC-relative addressing, you may 12317 simply write (for example) 12318 12319 mov.l bar,r0 12320 12321 where other assemblers might require an explicit displacement to `bar' 12322 from the program counter: 12323 12324 mov.l @(DISP, PC) 12325 12326 Here is a summary of SH opcodes: 12327 12328 Legend: 12329 Rn a numbered register 12330 Rm another numbered register 12331 #imm immediate data 12332 disp displacement 12333 disp8 8-bit displacement 12334 disp12 12-bit displacement 12335 12336 add #imm,Rn lds.l @Rn+,PR 12337 add Rm,Rn mac.w @Rm+,@Rn+ 12338 addc Rm,Rn mov #imm,Rn 12339 addv Rm,Rn mov Rm,Rn 12340 and #imm,R0 mov.b Rm,@(R0,Rn) 12341 and Rm,Rn mov.b Rm,@-Rn 12342 and.b #imm,@(R0,GBR) mov.b Rm,@Rn 12343 bf disp8 mov.b @(disp,Rm),R0 12344 bra disp12 mov.b @(disp,GBR),R0 12345 bsr disp12 mov.b @(R0,Rm),Rn 12346 bt disp8 mov.b @Rm+,Rn 12347 clrmac mov.b @Rm,Rn 12348 clrt mov.b R0,@(disp,Rm) 12349 cmp/eq #imm,R0 mov.b R0,@(disp,GBR) 12350 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn) 12351 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn) 12352 cmp/gt Rm,Rn mov.l Rm,@-Rn 12353 cmp/hi Rm,Rn mov.l Rm,@Rn 12354 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm 12355 cmp/pl Rn mov.l @(disp,GBR),R0 12356 cmp/pz Rn mov.l @(disp,PC),Rn 12357 cmp/str Rm,Rn mov.l @(R0,Rm),Rn 12358 div0s Rm,Rn mov.l @Rm+,Rn 12359 div0u mov.l @Rm,Rn 12360 div1 Rm,Rn mov.l R0,@(disp,GBR) 12361 exts.b Rm,Rn mov.w Rm,@(R0,Rn) 12362 exts.w Rm,Rn mov.w Rm,@-Rn 12363 extu.b Rm,Rn mov.w Rm,@Rn 12364 extu.w Rm,Rn mov.w @(disp,Rm),R0 12365 jmp @Rn mov.w @(disp,GBR),R0 12366 jsr @Rn mov.w @(disp,PC),Rn 12367 ldc Rn,GBR mov.w @(R0,Rm),Rn 12368 ldc Rn,SR mov.w @Rm+,Rn 12369 ldc Rn,VBR mov.w @Rm,Rn 12370 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm) 12371 ldc.l @Rn+,SR mov.w R0,@(disp,GBR) 12372 ldc.l @Rn+,VBR mova @(disp,PC),R0 12373 lds Rn,MACH movt Rn 12374 lds Rn,MACL muls Rm,Rn 12375 lds Rn,PR mulu Rm,Rn 12376 lds.l @Rn+,MACH neg Rm,Rn 12377 lds.l @Rn+,MACL negc Rm,Rn 12378 12379 nop stc VBR,Rn 12380 not Rm,Rn stc.l GBR,@-Rn 12381 or #imm,R0 stc.l SR,@-Rn 12382 or Rm,Rn stc.l VBR,@-Rn 12383 or.b #imm,@(R0,GBR) sts MACH,Rn 12384 rotcl Rn sts MACL,Rn 12385 rotcr Rn sts PR,Rn 12386 rotl Rn sts.l MACH,@-Rn 12387 rotr Rn sts.l MACL,@-Rn 12388 rte sts.l PR,@-Rn 12389 rts sub Rm,Rn 12390 sett subc Rm,Rn 12391 shal Rn subv Rm,Rn 12392 shar Rn swap.b Rm,Rn 12393 shll Rn swap.w Rm,Rn 12394 shll16 Rn tas.b @Rn 12395 shll2 Rn trapa #imm 12396 shll8 Rn tst #imm,R0 12397 shlr Rn tst Rm,Rn 12398 shlr16 Rn tst.b #imm,@(R0,GBR) 12399 shlr2 Rn xor #imm,R0 12400 shlr8 Rn xor Rm,Rn 12401 sleep xor.b #imm,@(R0,GBR) 12402 stc GBR,Rn xtrct Rm,Rn 12403 stc SR,Rn 12404 12405 12406 File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies 12407 12408 8.27 SuperH SH64 Dependent Features 12409 =================================== 12410 12411 * Menu: 12412 12413 * SH64 Options:: Options 12414 * SH64 Syntax:: Syntax 12415 * SH64 Directives:: SH64 Machine Directives 12416 * SH64 Opcodes:: Opcodes 12417 12418 12419 File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent 12420 12421 8.27.1 Options 12422 -------------- 12423 12424 `-isa=sh4 | sh4a' 12425 Specify the sh4 or sh4a instruction set. 12426 12427 `-isa=dsp' 12428 Enable sh-dsp insns, and disable sh3e / sh4 insns. 12429 12430 `-isa=fp' 12431 Enable sh2e, sh3e, sh4, and sh4a insn sets. 12432 12433 `-isa=all' 12434 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 12435 12436 `-isa=shmedia | -isa=shcompact' 12437 Specify the default instruction set. `SHmedia' specifies the 12438 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes 12439 compatible with previous SH families. The default depends on the 12440 ABI selected; the default for the 64-bit ABI is SHmedia, and the 12441 default for the 32-bit ABI is SHcompact. If neither the ABI nor 12442 the ISA is specified, the default is 32-bit SHcompact. 12443 12444 Note that the `.mode' pseudo-op is not permitted if the ISA is not 12445 specified on the command line. 12446 12447 `-abi=32 | -abi=64' 12448 Specify the default ABI. If the ISA is specified and the ABI is 12449 not, the default ABI depends on the ISA, with SHmedia defaulting 12450 to 64-bit and SHcompact defaulting to 32-bit. 12451 12452 Note that the `.abi' pseudo-op is not permitted if the ABI is not 12453 specified on the command line. When the ABI is specified on the 12454 command line, any `.abi' pseudo-ops in the source must match it. 12455 12456 `-shcompact-const-crange' 12457 Emit code-range descriptors for constants in SHcompact code 12458 sections. 12459 12460 `-no-mix' 12461 Disallow SHmedia code in the same section as constants and 12462 SHcompact code. 12463 12464 `-no-expand' 12465 Do not expand MOVI, PT, PTA or PTB instructions. 12466 12467 `-expand-pt32' 12468 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only. 12469 12470 12471 12472 File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent 12473 12474 8.27.2 Syntax 12475 ------------- 12476 12477 * Menu: 12478 12479 * SH64-Chars:: Special Characters 12480 * SH64-Regs:: Register Names 12481 * SH64-Addressing:: Addressing Modes 12482 12483 12484 File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax 12485 12486 8.27.2.1 Special Characters 12487 ........................... 12488 12489 `!' is the line comment character. 12490 12491 You can use `;' instead of a newline to separate statements. 12492 12493 Since `$' has no special meaning, you may use it in symbol names. 12494 12495 12496 File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax 12497 12498 8.27.2.2 Register Names 12499 ....................... 12500 12501 You can use the predefined symbols `r0' through `r63' to refer to the 12502 SH64 general registers, `cr0' through `cr63' for control registers, 12503 `tr0' through `tr7' for target address registers, `fr0' through `fr63' 12504 for single-precision floating point registers, `dr0' through `dr62' 12505 (even numbered registers only) for double-precision floating point 12506 registers, `fv0' through `fv60' (multiples of four only) for 12507 single-precision floating point vectors, `fp0' through `fp62' (even 12508 numbered registers only) for single-precision floating point pairs, 12509 `mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of 12510 single-precision floating point registers, `pc' for the program 12511 counter, and `fpscr' for the floating point status and control register. 12512 12513 You can also refer to the control registers by the mnemonics `sr', 12514 `ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc', 12515 `resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'. 12516 12517 12518 File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax 12519 12520 8.27.2.3 Addressing Modes 12521 ......................... 12522 12523 SH64 operands consist of either a register or immediate value. The 12524 immediate value can be a constant or label reference (or portion of a 12525 label reference), as in this example: 12526 12527 movi 4,r2 12528 pt function, tr4 12529 movi (function >> 16) & 65535,r0 12530 shori function & 65535, r0 12531 ld.l r0,4,r0 12532 12533 Instruction label references can reference labels in either SHmedia 12534 or SHcompact. To differentiate between the two, labels in SHmedia 12535 sections will always have the least significant bit set (i.e. they will 12536 be odd), which SHcompact labels will have the least significant bit 12537 reset (i.e. they will be even). If you need to reference the actual 12538 address of a label, you can use the `datalabel' modifier, as in this 12539 example: 12540 12541 .long function 12542 .long datalabel function 12543 12544 In that example, the first longword may or may not have the least 12545 significant bit set depending on whether the label is an SHmedia label 12546 or an SHcompact label. The second longword will be the actual address 12547 of the label, regardless of what type of label it is. 12548 12549 12550 File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent 12551 12552 8.27.3 SH64 Machine Directives 12553 ------------------------------ 12554 12555 In addition to the SH directives, the SH64 provides the following 12556 directives: 12557 12558 `.mode [shmedia|shcompact]' 12559 `.isa [shmedia|shcompact]' 12560 Specify the ISA for the following instructions (the two directives 12561 are equivalent). Note that programs such as `objdump' rely on 12562 symbolic labels to determine when such mode switches occur (by 12563 checking the least significant bit of the label's address), so 12564 such mode/isa changes should always be followed by a label (in 12565 practice, this is true anyway). Note that you cannot use these 12566 directives if you didn't specify an ISA on the command line. 12567 12568 `.abi [32|64]' 12569 Specify the ABI for the following instructions. Note that you 12570 cannot use this directive unless you specified an ABI on the 12571 command line, and the ABIs specified must match. 12572 12573 `.uaquad' 12574 Like .uaword and .ualong, this allows you to specify an 12575 intentionally unaligned quadword (64 bit word). 12576 12577 12578 12579 File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent 12580 12581 8.27.4 Opcodes 12582 -------------- 12583 12584 For detailed information on the SH64 machine instruction set, see 12585 `SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.). 12586 12587 `as' implements all the standard SH64 opcodes. In addition, the 12588 following pseudo-opcodes may be expanded into one or more alternate 12589 opcodes: 12590 12591 `movi' 12592 If the value doesn't fit into a standard `movi' opcode, `as' will 12593 replace the `movi' with a sequence of `movi' and `shori' opcodes. 12594 12595 `pt' 12596 This expands to a sequence of `movi' and `shori' opcode, followed 12597 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on 12598 the label referenced. 12599 12600 12601 12602 File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies 12603 12604 8.28 SPARC Dependent Features 12605 ============================= 12606 12607 * Menu: 12608 12609 * Sparc-Opts:: Options 12610 * Sparc-Aligned-Data:: Option to enforce aligned data 12611 * Sparc-Float:: Floating Point 12612 * Sparc-Directives:: Sparc Machine Directives 12613 12614 12615 File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent 12616 12617 8.28.1 Options 12618 -------------- 12619 12620 The SPARC chip family includes several successive levels, using the same 12621 core instruction set, but including a few additional instructions at 12622 each level. There are exceptions to this however. For details on what 12623 instructions each variant supports, please see the chip's architecture 12624 reference manual. 12625 12626 By default, `as' assumes the core instruction set (SPARC v6), but 12627 "bumps" the architecture level as needed: it switches to successively 12628 higher architectures as it encounters instructions that only exist in 12629 the higher levels. 12630 12631 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump 12632 passed sparclite by default, an option must be passed to enable the v9 12633 instructions. 12634 12635 GAS treats sparclite as being compatible with v8, unless an 12636 architecture is explicitly requested. SPARC v9 is always incompatible 12637 with sparclite. 12638 12639 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 12640 `-Av8plus | -Av8plusa | -Av9 | -Av9a' 12641 Use one of the `-A' options to select one of the SPARC 12642 architectures explicitly. If you select an architecture 12643 explicitly, `as' reports a fatal error if it encounters an 12644 instruction or feature requiring an incompatible or higher level. 12645 12646 `-Av8plus' and `-Av8plusa' select a 32 bit environment. 12647 12648 `-Av9' and `-Av9a' select a 64 bit environment and are not 12649 available unless GAS is explicitly configured with 64 bit 12650 environment support. 12651 12652 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 12653 UltraSPARC extensions. 12654 12655 `-xarch=v8plus | -xarch=v8plusa' 12656 For compatibility with the Solaris v9 assembler. These options are 12657 equivalent to -Av8plus and -Av8plusa, respectively. 12658 12659 `-bump' 12660 Warn whenever it is necessary to switch to another level. If an 12661 architecture level is explicitly requested, GAS will not issue 12662 warnings until that level is reached, and will then bump the level 12663 as required (except between incompatible levels). 12664 12665 `-32 | -64' 12666 Select the word size, either 32 bits or 64 bits. These options 12667 are only available with the ELF object file format, and require 12668 that the necessary BFD support has been included. 12669 12670 12671 File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Float, Prev: Sparc-Opts, Up: Sparc-Dependent 12672 12673 8.28.2 Enforcing aligned data 12674 ----------------------------- 12675 12676 SPARC GAS normally permits data to be misaligned. For example, it 12677 permits the `.long' pseudo-op to be used on a byte boundary. However, 12678 the native SunOS and Solaris assemblers issue an error when they see 12679 misaligned data. 12680 12681 You can use the `--enforce-aligned-data' option to make SPARC GAS 12682 also issue an error about misaligned data, just as the SunOS and Solaris 12683 assemblers do. 12684 12685 The `--enforce-aligned-data' option is not the default because gcc 12686 issues misaligned data pseudo-ops when it initializes certain packed 12687 data structures (structures defined using the `packed' attribute). You 12688 may have to assemble with GAS in order to initialize packed data 12689 structures in your own code. 12690 12691 12692 File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent 12693 12694 8.28.3 Floating Point 12695 --------------------- 12696 12697 The Sparc uses IEEE floating-point numbers. 12698 12699 12700 File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent 12701 12702 8.28.4 Sparc Machine Directives 12703 ------------------------------- 12704 12705 The Sparc version of `as' supports the following additional machine 12706 directives: 12707 12708 `.align' 12709 This must be followed by the desired alignment in bytes. 12710 12711 `.common' 12712 This must be followed by a symbol name, a positive number, and 12713 `"bss"'. This behaves somewhat like `.comm', but the syntax is 12714 different. 12715 12716 `.half' 12717 This is functionally identical to `.short'. 12718 12719 `.nword' 12720 On the Sparc, the `.nword' directive produces native word sized 12721 value, ie. if assembling with -32 it is equivalent to `.word', if 12722 assembling with -64 it is equivalent to `.xword'. 12723 12724 `.proc' 12725 This directive is ignored. Any text following it on the same line 12726 is also ignored. 12727 12728 `.register' 12729 This directive declares use of a global application or system 12730 register. It must be followed by a register name %g2, %g3, %g6 or 12731 %g7, comma and the symbol name for that register. If symbol name 12732 is `#scratch', it is a scratch register, if it is `#ignore', it 12733 just suppresses any errors about using undeclared global register, 12734 but does not emit any information about it into the object file. 12735 This can be useful e.g. if you save the register before use and 12736 restore it after. 12737 12738 `.reserve' 12739 This must be followed by a symbol name, a positive number, and 12740 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is 12741 different. 12742 12743 `.seg' 12744 This must be followed by `"text"', `"data"', or `"data1"'. It 12745 behaves like `.text', `.data', or `.data 1'. 12746 12747 `.skip' 12748 This is functionally identical to the `.space' directive. 12749 12750 `.word' 12751 On the Sparc, the `.word' directive produces 32 bit values, 12752 instead of the 16 bit values it produces on many other machines. 12753 12754 `.xword' 12755 On the Sparc V9 processor, the `.xword' directive produces 64 bit 12756 values. 12757 12758 12759 File: as.info, Node: TIC54X-Dependent, Next: V850-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies 12760 12761 8.29 TIC54X Dependent Features 12762 ============================== 12763 12764 * Menu: 12765 12766 * TIC54X-Opts:: Command-line Options 12767 * TIC54X-Block:: Blocking 12768 * TIC54X-Env:: Environment Settings 12769 * TIC54X-Constants:: Constants Syntax 12770 * TIC54X-Subsyms:: String Substitution 12771 * TIC54X-Locals:: Local Label Syntax 12772 * TIC54X-Builtins:: Builtin Assembler Math Functions 12773 * TIC54X-Ext:: Extended Addressing Support 12774 * TIC54X-Directives:: Directives 12775 * TIC54X-Macros:: Macro Features 12776 * TIC54X-MMRegs:: Memory-mapped Registers 12777 12778 12779 File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent 12780 12781 8.29.1 Options 12782 -------------- 12783 12784 The TMS320C54x version of `as' has a few machine-dependent options. 12785 12786 You can use the `-mfar-mode' option to enable extended addressing 12787 mode. All addresses will be assumed to be > 16 bits, and the 12788 appropriate relocation types will be used. This option is equivalent 12789 to using the `.far_mode' directive in the assembly code. If you do not 12790 use the `-mfar-mode' option, all references will be assumed to be 16 12791 bits. This option may be abbreviated to `-mf'. 12792 12793 You can use the `-mcpu' option to specify a particular CPU. This 12794 option is equivalent to using the `.version' directive in the assembly 12795 code. For recognized CPU codes, see *Note `.version': 12796 TIC54X-Directives. The default CPU version is `542'. 12797 12798 You can use the `-merrors-to-file' option to redirect error output 12799 to a file (this provided for those deficient environments which don't 12800 provide adequate output redirection). This option may be abbreviated to 12801 `-me'. 12802 12803 12804 File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent 12805 12806 8.29.2 Blocking 12807 --------------- 12808 12809 A blocked section or memory block is guaranteed not to cross the 12810 blocking boundary (usually a page, or 128 words) if it is smaller than 12811 the blocking size, or to start on a page boundary if it is larger than 12812 the blocking size. 12813 12814 12815 File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent 12816 12817 8.29.3 Environment Settings 12818 --------------------------- 12819 12820 `C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added 12821 to the list of directories normally searched for source and include 12822 files. `C54XDSP_DIR' will override `A_DIR'. 12823 12824 12825 File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent 12826 12827 8.29.4 Constants Syntax 12828 ----------------------- 12829 12830 The TIC54X version of `as' allows the following additional constant 12831 formats, using a suffix to indicate the radix: 12832 12833 Binary `000000B, 011000b' 12834 Octal `10Q, 224q' 12835 Hexadecimal `45h, 0FH' 12836 12837 12838 File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent 12839 12840 8.29.5 String Substitution 12841 -------------------------- 12842 12843 A subset of allowable symbols (which we'll call subsyms) may be assigned 12844 arbitrary string values. This is roughly equivalent to C preprocessor 12845 #define macros. When `as' encounters one of these symbols, the symbol 12846 is replaced in the input stream by its string value. Subsym names 12847 *must* begin with a letter. 12848 12849 Subsyms may be defined using the `.asg' and `.eval' directives 12850 (*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives. 12851 12852 Expansion is recursive until a previously encountered symbol is 12853 seen, at which point substitution stops. 12854 12855 In this example, x is replaced with SYM2; SYM2 is replaced with 12856 SYM1, and SYM1 is replaced with x. At this point, x has already been 12857 encountered and the substitution stops. 12858 12859 .asg "x",SYM1 12860 .asg "SYM1",SYM2 12861 .asg "SYM2",x 12862 add x,a ; final code assembled is "add x, a" 12863 12864 Macro parameters are converted to subsyms; a side effect of this is 12865 the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms 12866 defined within a macro will have global scope, unless the `.var' 12867 directive is used to identify the subsym as a local macro variable 12868 *note `.var': TIC54X-Directives. 12869 12870 Substitution may be forced in situations where replacement might be 12871 ambiguous by placing colons on either side of the subsym. The following 12872 code: 12873 12874 .eval "10",x 12875 LAB:X: add #x, a 12876 12877 When assembled becomes: 12878 12879 LAB10 add #10, a 12880 12881 Smaller parts of the string assigned to a subsym may be accessed with 12882 the following syntax: 12883 12884 ``:SYMBOL(CHAR_INDEX):'' 12885 Evaluates to a single-character string, the character at 12886 CHAR_INDEX. 12887 12888 ``:SYMBOL(START,LENGTH):'' 12889 Evaluates to a substring of SYMBOL beginning at START with length 12890 LENGTH. 12891 12892 12893 File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent 12894 12895 8.29.6 Local Labels 12896 ------------------- 12897 12898 Local labels may be defined in two ways: 12899 12900 * $N, where N is a decimal number between 0 and 9 12901 12902 * LABEL?, where LABEL is any legal symbol name. 12903 12904 Local labels thus defined may be redefined or automatically 12905 generated. The scope of a local label is based on when it may be 12906 undefined or reset. This happens when one of the following situations 12907 is encountered: 12908 12909 * .newblock directive *note `.newblock': TIC54X-Directives. 12910 12911 * The current section is changed (.sect, .text, or .data) 12912 12913 * Entering or leaving an included file 12914 12915 * The macro scope where the label was defined is exited 12916 12917 12918 File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent 12919 12920 8.29.7 Math Builtins 12921 -------------------- 12922 12923 The following built-in functions may be used to generate a 12924 floating-point value. All return a floating-point value except `$cvi', 12925 `$int', and `$sgn', which return an integer value. 12926 12927 ``$acos(EXPR)'' 12928 Returns the floating point arccosine of EXPR. 12929 12930 ``$asin(EXPR)'' 12931 Returns the floating point arcsine of EXPR. 12932 12933 ``$atan(EXPR)'' 12934 Returns the floating point arctangent of EXPR. 12935 12936 ``$atan2(EXPR1,EXPR2)'' 12937 Returns the floating point arctangent of EXPR1 / EXPR2. 12938 12939 ``$ceil(EXPR)'' 12940 Returns the smallest integer not less than EXPR as floating point. 12941 12942 ``$cosh(EXPR)'' 12943 Returns the floating point hyperbolic cosine of EXPR. 12944 12945 ``$cos(EXPR)'' 12946 Returns the floating point cosine of EXPR. 12947 12948 ``$cvf(EXPR)'' 12949 Returns the integer value EXPR converted to floating-point. 12950 12951 ``$cvi(EXPR)'' 12952 Returns the floating point value EXPR converted to integer. 12953 12954 ``$exp(EXPR)'' 12955 Returns the floating point value e ^ EXPR. 12956 12957 ``$fabs(EXPR)'' 12958 Returns the floating point absolute value of EXPR. 12959 12960 ``$floor(EXPR)'' 12961 Returns the largest integer that is not greater than EXPR as 12962 floating point. 12963 12964 ``$fmod(EXPR1,EXPR2)'' 12965 Returns the floating point remainder of EXPR1 / EXPR2. 12966 12967 ``$int(EXPR)'' 12968 Returns 1 if EXPR evaluates to an integer, zero otherwise. 12969 12970 ``$ldexp(EXPR1,EXPR2)'' 12971 Returns the floating point value EXPR1 * 2 ^ EXPR2. 12972 12973 ``$log10(EXPR)'' 12974 Returns the base 10 logarithm of EXPR. 12975 12976 ``$log(EXPR)'' 12977 Returns the natural logarithm of EXPR. 12978 12979 ``$max(EXPR1,EXPR2)'' 12980 Returns the floating point maximum of EXPR1 and EXPR2. 12981 12982 ``$min(EXPR1,EXPR2)'' 12983 Returns the floating point minimum of EXPR1 and EXPR2. 12984 12985 ``$pow(EXPR1,EXPR2)'' 12986 Returns the floating point value EXPR1 ^ EXPR2. 12987 12988 ``$round(EXPR)'' 12989 Returns the nearest integer to EXPR as a floating point number. 12990 12991 ``$sgn(EXPR)'' 12992 Returns -1, 0, or 1 based on the sign of EXPR. 12993 12994 ``$sin(EXPR)'' 12995 Returns the floating point sine of EXPR. 12996 12997 ``$sinh(EXPR)'' 12998 Returns the floating point hyperbolic sine of EXPR. 12999 13000 ``$sqrt(EXPR)'' 13001 Returns the floating point square root of EXPR. 13002 13003 ``$tan(EXPR)'' 13004 Returns the floating point tangent of EXPR. 13005 13006 ``$tanh(EXPR)'' 13007 Returns the floating point hyperbolic tangent of EXPR. 13008 13009 ``$trunc(EXPR)'' 13010 Returns the integer value of EXPR truncated towards zero as 13011 floating point. 13012 13013 13014 13015 File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent 13016 13017 8.29.8 Extended Addressing 13018 -------------------------- 13019 13020 The `LDX' pseudo-op is provided for loading the extended addressing bits 13021 of a label or address. For example, if an address `_label' resides in 13022 extended program memory, the value of `_label' may be loaded as follows: 13023 ldx #_label,16,a ; loads extended bits of _label 13024 or #_label,a ; loads lower 16 bits of _label 13025 bacc a ; full address is in accumulator A 13026 13027 13028 File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent 13029 13030 8.29.9 Directives 13031 ----------------- 13032 13033 `.align [SIZE]' 13034 `.even' 13035 Align the section program counter on the next boundary, based on 13036 SIZE. SIZE may be any power of 2. `.even' is equivalent to 13037 `.align' with a SIZE of 2. 13038 `1' 13039 Align SPC to word boundary 13040 13041 `2' 13042 Align SPC to longword boundary (same as .even) 13043 13044 `128' 13045 Align SPC to page boundary 13046 13047 `.asg STRING, NAME' 13048 Assign NAME the string STRING. String replacement is performed on 13049 STRING before assignment. 13050 13051 `.eval STRING, NAME' 13052 Evaluate the contents of string STRING and assign the result as a 13053 string to the subsym NAME. String replacement is performed on 13054 STRING before assignment. 13055 13056 `.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 13057 Reserve space for SYMBOL in the .bss section. SIZE is in words. 13058 If present, BLOCKING_FLAG indicates the allocated space should be 13059 aligned on a page boundary if it would otherwise cross a page 13060 boundary. If present, ALIGNMENT_FLAG causes the assembler to 13061 allocate SIZE on a long word boundary. 13062 13063 `.byte VALUE [,...,VALUE_N]' 13064 `.ubyte VALUE [,...,VALUE_N]' 13065 `.char VALUE [,...,VALUE_N]' 13066 `.uchar VALUE [,...,VALUE_N]' 13067 Place one or more bytes into consecutive words of the current 13068 section. The upper 8 bits of each word is zero-filled. If a 13069 label is used, it points to the word allocated for the first byte 13070 encountered. 13071 13072 `.clink ["SECTION_NAME"]' 13073 Set STYP_CLINK flag for this section, which indicates to the 13074 linker that if no symbols from this section are referenced, the 13075 section should not be included in the link. If SECTION_NAME is 13076 omitted, the current section is used. 13077 13078 `.c_mode' 13079 TBD. 13080 13081 `.copy "FILENAME" | FILENAME' 13082 `.include "FILENAME" | FILENAME' 13083 Read source statements from FILENAME. The normal include search 13084 path is used. Normally .copy will cause statements from the 13085 included file to be printed in the assembly listing and .include 13086 will not, but this distinction is not currently implemented. 13087 13088 `.data' 13089 Begin assembling code into the .data section. 13090 13091 `.double VALUE [,...,VALUE_N]' 13092 `.ldouble VALUE [,...,VALUE_N]' 13093 `.float VALUE [,...,VALUE_N]' 13094 `.xfloat VALUE [,...,VALUE_N]' 13095 Place an IEEE single-precision floating-point representation of 13096 one or more floating-point values into the current section. All 13097 but `.xfloat' align the result on a longword boundary. Values are 13098 stored most-significant word first. 13099 13100 `.drlist' 13101 `.drnolist' 13102 Control printing of directives to the listing file. Ignored. 13103 13104 `.emsg STRING' 13105 `.mmsg STRING' 13106 `.wmsg STRING' 13107 Emit a user-defined error, message, or warning, respectively. 13108 13109 `.far_mode' 13110 Use extended addressing when assembling statements. This should 13111 appear only once per file, and is equivalent to the -mfar-mode 13112 option *note `-mfar-mode': TIC54X-Opts. 13113 13114 `.fclist' 13115 `.fcnolist' 13116 Control printing of false conditional blocks to the listing file. 13117 13118 `.field VALUE [,SIZE]' 13119 Initialize a bitfield of SIZE bits in the current section. If 13120 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16 13121 bits. If VALUE does not fit into SIZE bits, the value will be 13122 truncated. Successive `.field' directives will pack starting at 13123 the current word, filling the most significant bits first, and 13124 aligning to the start of the next word if the field size does not 13125 fit into the space remaining in the current word. A `.align' 13126 directive with an operand of 1 will force the next `.field' 13127 directive to begin packing into a new word. If a label is used, it 13128 points to the word that contains the specified field. 13129 13130 `.global SYMBOL [,...,SYMBOL_N]' 13131 `.def SYMBOL [,...,SYMBOL_N]' 13132 `.ref SYMBOL [,...,SYMBOL_N]' 13133 `.def' nominally identifies a symbol defined in the current file 13134 and availalbe to other files. `.ref' identifies a symbol used in 13135 the current file but defined elsewhere. Both map to the standard 13136 `.global' directive. 13137 13138 `.half VALUE [,...,VALUE_N]' 13139 `.uhalf VALUE [,...,VALUE_N]' 13140 `.short VALUE [,...,VALUE_N]' 13141 `.ushort VALUE [,...,VALUE_N]' 13142 `.int VALUE [,...,VALUE_N]' 13143 `.uint VALUE [,...,VALUE_N]' 13144 `.word VALUE [,...,VALUE_N]' 13145 `.uword VALUE [,...,VALUE_N]' 13146 Place one or more values into consecutive words of the current 13147 section. If a label is used, it points to the word allocated for 13148 the first value encountered. 13149 13150 `.label SYMBOL' 13151 Define a special SYMBOL to refer to the load time address of the 13152 current section program counter. 13153 13154 `.length' 13155 `.width' 13156 Set the page length and width of the output listing file. Ignored. 13157 13158 `.list' 13159 `.nolist' 13160 Control whether the source listing is printed. Ignored. 13161 13162 `.long VALUE [,...,VALUE_N]' 13163 `.ulong VALUE [,...,VALUE_N]' 13164 `.xlong VALUE [,...,VALUE_N]' 13165 Place one or more 32-bit values into consecutive words in the 13166 current section. The most significant word is stored first. 13167 `.long' and `.ulong' align the result on a longword boundary; 13168 `xlong' does not. 13169 13170 `.loop [COUNT]' 13171 `.break [CONDITION]' 13172 `.endloop' 13173 Repeatedly assemble a block of code. `.loop' begins the block, and 13174 `.endloop' marks its termination. COUNT defaults to 1024, and 13175 indicates the number of times the block should be repeated. 13176 `.break' terminates the loop so that assembly begins after the 13177 `.endloop' directive. The optional CONDITION will cause the loop 13178 to terminate only if it evaluates to zero. 13179 13180 `MACRO_NAME .macro [PARAM1][,...PARAM_N]' 13181 `[.mexit]' 13182 `.endm' 13183 See the section on macros for more explanation (*Note 13184 TIC54X-Macros::. 13185 13186 `.mlib "FILENAME" | FILENAME' 13187 Load the macro library FILENAME. FILENAME must be an archived 13188 library (BFD ar-compatible) of text files, expected to contain 13189 only macro definitions. The standard include search path is used. 13190 13191 `.mlist' 13192 13193 `.mnolist' 13194 Control whether to include macro and loop block expansions in the 13195 listing output. Ignored. 13196 13197 `.mmregs' 13198 Define global symbolic names for the 'c54x registers. Supposedly 13199 equivalent to executing `.set' directives for each register with 13200 its memory-mapped value, but in reality is provided only for 13201 compatibility and does nothing. 13202 13203 `.newblock' 13204 This directive resets any TIC54X local labels currently defined. 13205 Normal `as' local labels are unaffected. 13206 13207 `.option OPTION_LIST' 13208 Set listing options. Ignored. 13209 13210 `.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]' 13211 Designate SECTION_NAME for blocking. Blocking guarantees that a 13212 section will start on a page boundary (128 words) if it would 13213 otherwise cross a page boundary. Only initialized sections may be 13214 designated with this directive. See also *Note TIC54X-Block::. 13215 13216 `.sect "SECTION_NAME"' 13217 Define a named initialized section and make it the current section. 13218 13219 `SYMBOL .set "VALUE"' 13220 `SYMBOL .equ "VALUE"' 13221 Equate a constant VALUE to a SYMBOL, which is placed in the symbol 13222 table. SYMBOL may not be previously defined. 13223 13224 `.space SIZE_IN_BITS' 13225 `.bes SIZE_IN_BITS' 13226 Reserve the given number of bits in the current section and 13227 zero-fill them. If a label is used with `.space', it points to the 13228 *first* word reserved. With `.bes', the label points to the 13229 *last* word reserved. 13230 13231 `.sslist' 13232 `.ssnolist' 13233 Controls the inclusion of subsym replacement in the listing 13234 output. Ignored. 13235 13236 `.string "STRING" [,...,"STRING_N"]' 13237 `.pstring "STRING" [,...,"STRING_N"]' 13238 Place 8-bit characters from STRING into the current section. 13239 `.string' zero-fills the upper 8 bits of each word, while 13240 `.pstring' puts two characters into each word, filling the 13241 most-significant bits first. Unused space is zero-filled. If a 13242 label is used, it points to the first word initialized. 13243 13244 `[STAG] .struct [OFFSET]' 13245 `[NAME_1] element [COUNT_1]' 13246 `[NAME_2] element [COUNT_2]' 13247 `[TNAME] .tag STAGX [TCOUNT]' 13248 `...' 13249 `[NAME_N] element [COUNT_N]' 13250 `[SSIZE] .endstruct' 13251 `LABEL .tag [STAG]' 13252 Assign symbolic offsets to the elements of a structure. STAG 13253 defines a symbol to use to reference the structure. OFFSET 13254 indicates a starting value to use for the first element 13255 encountered; otherwise it defaults to zero. Each element can have 13256 a named offset, NAME, which is a symbol assigned the value of the 13257 element's offset into the structure. If STAG is missing, these 13258 become global symbols. COUNT adjusts the offset that many times, 13259 as if `element' were an array. `element' may be one of `.byte', 13260 `.word', `.long', `.float', or any equivalent of those, and the 13261 structure offset is adjusted accordingly. `.field' and `.string' 13262 are also allowed; the size of `.field' is one bit, and `.string' 13263 is considered to be one word in size. Only element descriptors, 13264 structure/union tags, `.align' and conditional assembly directives 13265 are allowed within `.struct'/`.endstruct'. `.align' aligns member 13266 offsets to word boundaries only. SSIZE, if provided, will always 13267 be assigned the size of the structure. 13268 13269 The `.tag' directive, in addition to being used to define a 13270 structure/union element within a structure, may be used to apply a 13271 structure to a symbol. Once applied to LABEL, the individual 13272 structure elements may be applied to LABEL to produce the desired 13273 offsets using LABEL as the structure base. 13274 13275 `.tab' 13276 Set the tab size in the output listing. Ignored. 13277 13278 `[UTAG] .union' 13279 `[NAME_1] element [COUNT_1]' 13280 `[NAME_2] element [COUNT_2]' 13281 `[TNAME] .tag UTAGX[,TCOUNT]' 13282 `...' 13283 `[NAME_N] element [COUNT_N]' 13284 `[USIZE] .endstruct' 13285 `LABEL .tag [UTAG]' 13286 Similar to `.struct', but the offset after each element is reset to 13287 zero, and the USIZE is set to the maximum of all defined elements. 13288 Starting offset for the union is always zero. 13289 13290 `[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 13291 Reserve space for variables in a named, uninitialized section 13292 (similar to .bss). `.usect' allows definitions sections 13293 independent of .bss. SYMBOL points to the first location reserved 13294 by this allocation. The symbol may be used as a variable name. 13295 SIZE is the allocated size in words. BLOCKING_FLAG indicates 13296 whether to block this section on a page boundary (128 words) 13297 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the 13298 section should be longword-aligned. 13299 13300 `.var SYM[,..., SYM_N]' 13301 Define a subsym to be a local variable within a macro. See *Note 13302 TIC54X-Macros::. 13303 13304 `.version VERSION' 13305 Set which processor to build instructions for. Though the 13306 following values are accepted, the op is ignored. 13307 `541' 13308 `542' 13309 `543' 13310 `545' 13311 `545LP' 13312 `546LP' 13313 `548' 13314 `549' 13315 13316 13317 File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent 13318 13319 8.29.10 Macros 13320 -------------- 13321 13322 Macros do not require explicit dereferencing of arguments (i.e. \ARG). 13323 13324 During macro expansion, the macro parameters are converted to 13325 subsyms. If the number of arguments passed the macro invocation 13326 exceeds the number of parameters defined, the last parameter is 13327 assigned the string equivalent of all remaining arguments. If fewer 13328 arguments are given than parameters, the missing parameters are 13329 assigned empty strings. To include a comma in an argument, you must 13330 enclose the argument in quotes. 13331 13332 The following built-in subsym functions allow examination of the 13333 string value of subsyms (or ordinary strings). The arguments are 13334 strings unless otherwise indicated (subsyms passed as args will be 13335 replaced by the strings they represent). 13336 ``$symlen(STR)'' 13337 Returns the length of STR. 13338 13339 ``$symcmp(STR1,STR2)'' 13340 Returns 0 if STR1 == STR2, non-zero otherwise. 13341 13342 ``$firstch(STR,CH)'' 13343 Returns index of the first occurrence of character constant CH in 13344 STR. 13345 13346 ``$lastch(STR,CH)'' 13347 Returns index of the last occurrence of character constant CH in 13348 STR. 13349 13350 ``$isdefed(SYMBOL)'' 13351 Returns zero if the symbol SYMBOL is not in the symbol table, 13352 non-zero otherwise. 13353 13354 ``$ismember(SYMBOL,LIST)'' 13355 Assign the first member of comma-separated string LIST to SYMBOL; 13356 LIST is reassigned the remainder of the list. Returns zero if 13357 LIST is a null string. Both arguments must be subsyms. 13358 13359 ``$iscons(EXPR)'' 13360 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal, 13361 4 if a character, 5 if decimal, and zero if not an integer. 13362 13363 ``$isname(NAME)'' 13364 Returns 1 if NAME is a valid symbol name, zero otherwise. 13365 13366 ``$isreg(REG)'' 13367 Returns 1 if REG is a valid predefined register name (AR0-AR7 13368 only). 13369 13370 ``$structsz(STAG)'' 13371 Returns the size of the structure or union represented by STAG. 13372 13373 ``$structacc(STAG)'' 13374 Returns the reference point of the structure or union represented 13375 by STAG. Always returns zero. 13376 13377 13378 13379 File: as.info, Node: TIC54X-MMRegs, Prev: TIC54X-Macros, Up: TIC54X-Dependent 13380 13381 8.29.11 Memory-mapped Registers 13382 ------------------------------- 13383 13384 The following symbols are recognized as memory-mapped registers: 13385 13386 13387 13388 File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies 13389 13390 8.30 Z80 Dependent Features 13391 =========================== 13392 13393 * Menu: 13394 13395 * Z80 Options:: Options 13396 * Z80 Syntax:: Syntax 13397 * Z80 Floating Point:: Floating Point 13398 * Z80 Directives:: Z80 Machine Directives 13399 * Z80 Opcodes:: Opcodes 13400 13401 13402 File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent 13403 13404 8.30.1 Options 13405 -------------- 13406 13407 The Zilog Z80 and Ascii R800 version of `as' have a few machine 13408 dependent options. 13409 `-z80' 13410 Produce code for the Z80 processor. There are additional options to 13411 request warnings and error messages for undocumented instructions. 13412 13413 `-ignore-undocumented-instructions' 13414 `-Wnud' 13415 Silently assemble undocumented Z80-instructions that have been 13416 adopted as documented R800-instructions. 13417 13418 `-ignore-unportable-instructions' 13419 `-Wnup' 13420 Silently assemble all undocumented Z80-instructions. 13421 13422 `-warn-undocumented-instructions' 13423 `-Wud' 13424 Issue warnings for undocumented Z80-instructions that work on 13425 R800, do not assemble other undocumented instructions without 13426 warning. 13427 13428 `-warn-unportable-instructions' 13429 `-Wup' 13430 Issue warnings for other undocumented Z80-instructions, do not 13431 treat any undocumented instructions as errors. 13432 13433 `-forbid-undocumented-instructions' 13434 `-Fud' 13435 Treat all undocumented z80-instructions as errors. 13436 13437 `-forbid-unportable-instructions' 13438 `-Fup' 13439 Treat undocumented z80-instructions that do not work on R800 as 13440 errors. 13441 13442 `-r800' 13443 Produce code for the R800 processor. The assembler does not support 13444 undocumented instructions for the R800. In line with common 13445 practice, `as' uses Z80 instriction names for the R800 processor, 13446 as far as they exist. 13447 13448 13449 File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent 13450 13451 8.30.2 Syntax 13452 ------------- 13453 13454 The assembler syntax closely follows the 'Z80 family CPU User Manual' by 13455 Zilog. In expressions a single `=' may be used as "is equal to" 13456 comparison operator. 13457 13458 Suffices can be used to indicate the radix of integer constants; `H' 13459 or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o' 13460 for octal, and `B' for binary. 13461 13462 The suffix `b' denotes a backreference to local label. 13463 13464 * Menu: 13465 13466 * Z80-Chars:: Special Characters 13467 * Z80-Regs:: Register Names 13468 * Z80-Case:: Case Sensitivity 13469 13470 13471 File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax 13472 13473 8.30.2.1 Special Characters 13474 ........................... 13475 13476 The semicolon `;' is the line comment character; 13477 13478 The dollar sign `$' can be used as a prefix for hexadecimal numbers 13479 and as a symbol denoting the current location counter. 13480 13481 A backslash `\' is an ordinary character for the Z80 assembler. 13482 13483 The single quote `'' must be followed by a closing quote. If there 13484 is one character inbetween, it is a character constant, otherwise it is 13485 a string constant. 13486 13487 13488 File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax 13489 13490 8.30.2.2 Register Names 13491 ....................... 13492 13493 The registers are referred to with the letters assigned to them by 13494 Zilog. In addition `as' recognises `ixl' and `ixh' as the least and 13495 most significant octet in `ix', and similarly `iyl' and `iyh' as parts 13496 of `iy'. 13497 13498 13499 File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax 13500 13501 8.30.2.3 Case Sensitivity 13502 ......................... 13503 13504 Upper and lower case are equivalent in register names, opcodes, 13505 condition codes and assembler directives. The case of letters is 13506 significant in labels and symbol names. The case is also important to 13507 distinguish the suffix `b' for a backward reference to a local label 13508 from the suffix `B' for a number in binary notation. 13509 13510 13511 File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent 13512 13513 8.30.3 Floating Point 13514 --------------------- 13515 13516 Floating-point numbers are not supported. 13517 13518 13519 File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent 13520 13521 8.30.4 Z80 Assembler Directives 13522 ------------------------------- 13523 13524 `as' for the Z80 supports some additional directives for compatibility 13525 with other assemblers. 13526 13527 These are the additional directives in `as' for the Z80: 13528 13529 `db EXPRESSION|STRING[,EXPRESSION|STRING...]' 13530 `defb EXPRESSION|STRING[,EXPRESSION|STRING...]' 13531 For each STRING the characters are copied to the object file, for 13532 each other EXPRESSION the value is stored in one byte. A warning 13533 is issued in case of an overflow. 13534 13535 `dw EXPRESSION[,EXPRESSION...]' 13536 `defw EXPRESSION[,EXPRESSION...]' 13537 For each EXPRESSION the value is stored in two bytes, ignoring 13538 overflow. 13539 13540 `d24 EXPRESSION[,EXPRESSION...]' 13541 `def24 EXPRESSION[,EXPRESSION...]' 13542 For each EXPRESSION the value is stored in three bytes, ignoring 13543 overflow. 13544 13545 `d32 EXPRESSION[,EXPRESSION...]' 13546 `def32 EXPRESSION[,EXPRESSION...]' 13547 For each EXPRESSION the value is stored in four bytes, ignoring 13548 overflow. 13549 13550 `ds COUNT[, VALUE]' 13551 `defs COUNT[, VALUE]' 13552 Fill COUNT bytes in the object file with VALUE, if VALUE is 13553 omitted it defaults to zero. 13554 13555 `SYMBOL equ EXPRESSION' 13556 `SYMBOL defl EXPRESSION' 13557 These directives set the value of SYMBOL to EXPRESSION. If `equ' 13558 is used, it is an error if SYMBOL is already defined. Symbols 13559 defined with `equ' are not protected from redefinition. 13560 13561 `set' 13562 This is a normal instruction on Z80, and not an assembler 13563 directive. 13564 13565 `psect NAME' 13566 A synonym for *Note Section::, no second argument should be given. 13567 13568 13569 13570 File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent 13571 13572 8.30.5 Opcodes 13573 -------------- 13574 13575 In line with commmon practice Z80 mnonics are used for both the Z80 and 13576 the R800. 13577 13578 In many instructions it is possible to use one of the half index 13579 registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general 13580 purpose register. This yields instructions that are documented on the 13581 R800 and undocumented on the Z80. Similarly `in f,(c)' is documented 13582 on the R800 and undocumented on the Z80. 13583 13584 The assembler also supports the following undocumented 13585 Z80-instructions, that have not been adopted in the R800 instruction 13586 set: 13587 `out (c),0' 13588 Sends zero to the port pointed to by register c. 13589 13590 `sli M' 13591 Equivalent to `M = (M<<1)+1', the operand M can be any operand 13592 that is valid for `sla'. One can use `sll' as a synonym for `sli'. 13593 13594 `OP (ix+D), R' 13595 This is equivalent to 13596 13597 ld R, (ix+D) 13598 OPC R 13599 ld (ix+D), R 13600 13601 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc', 13602 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R' 13603 may be any of `a', `b', `c', `d', `e', `h' and `l'. 13604 13605 `OPC (iy+D), R' 13606 As above, but with `iy' instead of `ix'. 13607 13608 The web site at `http://www.z80.info' is a good starting place to 13609 find more information on programming the Z80. 13610 13611 13612 File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies 13613 13614 8.31 Z8000 Dependent Features 13615 ============================= 13616 13617 The Z8000 as supports both members of the Z8000 family: the 13618 unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 13619 24 bit addresses. 13620 13621 When the assembler is in unsegmented mode (specified with the 13622 `unsegm' directive), an address takes up one word (16 bit) sized 13623 register. When the assembler is in segmented mode (specified with the 13624 `segm' directive), a 24-bit address takes up a long (32 bit) register. 13625 *Note Assembler Directives for the Z8000: Z8000 Directives, for a list 13626 of other Z8000 specific assembler directives. 13627 13628 * Menu: 13629 13630 * Z8000 Options:: Command-line options for the Z8000 13631 * Z8000 Syntax:: Assembler syntax for the Z8000 13632 * Z8000 Directives:: Special directives for the Z8000 13633 * Z8000 Opcodes:: Opcodes 13634 13635 13636 File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent 13637 13638 8.31.1 Options 13639 -------------- 13640 13641 `-z8001' 13642 Generate segmented code by default. 13643 13644 `-z8002' 13645 Generate unsegmented code by default. 13646 13647 13648 File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent 13649 13650 8.31.2 Syntax 13651 ------------- 13652 13653 * Menu: 13654 13655 * Z8000-Chars:: Special Characters 13656 * Z8000-Regs:: Register Names 13657 * Z8000-Addressing:: Addressing Modes 13658 13659 13660 File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax 13661 13662 8.31.2.1 Special Characters 13663 ........................... 13664 13665 `!' is the line comment character. 13666 13667 You can use `;' instead of a newline to separate statements. 13668 13669 13670 File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax 13671 13672 8.31.2.2 Register Names 13673 ....................... 13674 13675 The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer 13676 to different sized groups of registers by register number, with the 13677 prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for 13678 64 bit registers. You can also refer to the contents of the first 13679 eight (of the sixteen 16 bit registers) by bytes. They are named `rlN' 13680 and `rhN'. 13681 13682 _byte registers_ 13683 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3 13684 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7 13685 13686 _word registers_ 13687 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 13688 13689 _long word registers_ 13690 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 13691 13692 _quad word registers_ 13693 rq0 rq4 rq8 rq12 13694 13695 13696 File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax 13697 13698 8.31.2.3 Addressing Modes 13699 ......................... 13700 13701 as understands the following addressing modes for the Z8000: 13702 13703 `rlN' 13704 `rhN' 13705 `rN' 13706 `rrN' 13707 `rqN' 13708 Register direct: 8bit, 16bit, 32bit, and 64bit registers. 13709 13710 `@rN' 13711 `@rrN' 13712 Indirect register: @rrN in segmented mode, @rN in unsegmented 13713 mode. 13714 13715 `ADDR' 13716 Direct: the 16 bit or 24 bit address (depending on whether the 13717 assembler is in segmented or unsegmented mode) of the operand is 13718 in the instruction. 13719 13720 `address(rN)' 13721 Indexed: the 16 or 24 bit address is added to the 16 bit register 13722 to produce the final address in memory of the operand. 13723 13724 `rN(#IMM)' 13725 `rrN(#IMM)' 13726 Base Address: the 16 or 24 bit register is added to the 16 bit sign 13727 extended immediate displacement to produce the final address in 13728 memory of the operand. 13729 13730 `rN(rM)' 13731 `rrN(rM)' 13732 Base Index: the 16 or 24 bit register rN or rrN is added to the 13733 sign extended 16 bit index register rM to produce the final 13734 address in memory of the operand. 13735 13736 `#XX' 13737 Immediate data XX. 13738 13739 13740 File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent 13741 13742 8.31.3 Assembler Directives for the Z8000 13743 ----------------------------------------- 13744 13745 The Z8000 port of as includes additional assembler directives, for 13746 compatibility with other Z8000 assemblers. These do not begin with `.' 13747 (unlike the ordinary as directives). 13748 13749 `segm' 13750 `.z8001' 13751 Generate code for the segmented Z8001. 13752 13753 `unsegm' 13754 `.z8002' 13755 Generate code for the unsegmented Z8002. 13756 13757 `name' 13758 Synonym for `.file' 13759 13760 `global' 13761 Synonym for `.global' 13762 13763 `wval' 13764 Synonym for `.word' 13765 13766 `lval' 13767 Synonym for `.long' 13768 13769 `bval' 13770 Synonym for `.byte' 13771 13772 `sval' 13773 Assemble a string. `sval' expects one string literal, delimited by 13774 single quotes. It assembles each byte of the string into 13775 consecutive addresses. You can use the escape sequence `%XX' 13776 (where XX represents a two-digit hexadecimal number) to represent 13777 the character whose ASCII value is XX. Use this feature to 13778 describe single quote and other characters that may not appear in 13779 string literals as themselves. For example, the C statement 13780 `char *a = "he said \"it's 50% off\"";' is represented in Z8000 13781 assembly language (shown with the assembler output in hex at the 13782 left) as 13783 13784 68652073 sval 'he said %22it%27s 50%25 off%22%00' 13785 61696420 13786 22697427 13787 73203530 13788 25206F66 13789 662200 13790 13791 `rsect' 13792 synonym for `.section' 13793 13794 `block' 13795 synonym for `.space' 13796 13797 `even' 13798 special case of `.align'; aligns output to even byte boundary. 13799 13800 13801 File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent 13802 13803 8.31.4 Opcodes 13804 -------------- 13805 13806 For detailed information on the Z8000 machine instruction set, see 13807 `Z8000 Technical Manual'. 13808 13809 The following table summarizes the opcodes and their arguments: 13810 13811 rs 16 bit source register 13812 rd 16 bit destination register 13813 rbs 8 bit source register 13814 rbd 8 bit destination register 13815 rrs 32 bit source register 13816 rrd 32 bit destination register 13817 rqs 64 bit source register 13818 rqd 64 bit destination register 13819 addr 16/24 bit address 13820 imm immediate data 13821 13822 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc 13823 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc 13824 add rd,@rs clrb rbd dab rbd 13825 add rd,addr com @rd dbjnz rbd,disp7 13826 add rd,addr(rs) com addr dec @rd,imm4m1 13827 add rd,imm16 com addr(rd) dec addr(rd),imm4m1 13828 add rd,rs com rd dec addr,imm4m1 13829 addb rbd,@rs comb @rd dec rd,imm4m1 13830 addb rbd,addr comb addr decb @rd,imm4m1 13831 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1 13832 addb rbd,imm8 comb rbd decb addr,imm4m1 13833 addb rbd,rbs comflg flags decb rbd,imm4m1 13834 addl rrd,@rs cp @rd,imm16 di i2 13835 addl rrd,addr cp addr(rd),imm16 div rrd,@rs 13836 addl rrd,addr(rs) cp addr,imm16 div rrd,addr 13837 addl rrd,imm32 cp rd,@rs div rrd,addr(rs) 13838 addl rrd,rrs cp rd,addr div rrd,imm16 13839 and rd,@rs cp rd,addr(rs) div rrd,rs 13840 and rd,addr cp rd,imm16 divl rqd,@rs 13841 and rd,addr(rs) cp rd,rs divl rqd,addr 13842 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs) 13843 and rd,rs cpb addr(rd),imm8 divl rqd,imm32 13844 andb rbd,@rs cpb addr,imm8 divl rqd,rrs 13845 andb rbd,addr cpb rbd,@rs djnz rd,disp7 13846 andb rbd,addr(rs) cpb rbd,addr ei i2 13847 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs 13848 andb rbd,rbs cpb rbd,imm8 ex rd,addr 13849 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs) 13850 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs 13851 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs 13852 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr 13853 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs) 13854 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs 13855 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8 13856 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8 13857 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8 13858 bitb rbd,rs cpl rrd,@rs ext8f imm8 13859 bpt cpl rrd,addr exts rrd 13860 call @rd cpl rrd,addr(rs) extsb rd 13861 call addr cpl rrd,imm32 extsl rqd 13862 call addr(rd) cpl rrd,rrs halt 13863 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs 13864 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16 13865 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs 13866 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16 13867 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1 13868 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1 13869 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) 13870 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 13871 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs 13872 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs 13873 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr 13874 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs) 13875 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32 13876 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs 13877 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd 13878 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr 13879 iret ldib @rd,@rs,rr neg addr(rd) 13880 jp cc,@rd ldir @rd,@rs,rr neg rd 13881 jp cc,addr ldirb @rd,@rs,rr negb @rd 13882 jp cc,addr(rd) ldk rd,imm4 negb addr 13883 jr cc,disp8 ldl @rd,rrs negb addr(rd) 13884 ld @rd,imm16 ldl addr(rd),rrs negb rbd 13885 ld @rd,rs ldl addr,rrs nop 13886 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs 13887 ld addr(rd),rs ldl rd(rx),rrs or rd,addr 13888 ld addr,imm16 ldl rrd,@rs or rd,addr(rs) 13889 ld addr,rs ldl rrd,addr or rd,imm16 13890 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs 13891 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs 13892 ld rd,@rs ldl rrd,rrs orb rbd,addr 13893 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs) 13894 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8 13895 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs 13896 ld rd,rs ldm addr(rd),rs,n out @rd,rs 13897 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs 13898 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs 13899 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs 13900 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra 13901 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba 13902 lda rd,rs(rx) ldps addr outib @rd,@rs,ra 13903 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra 13904 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs 13905 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs 13906 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs 13907 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs 13908 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs 13909 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs 13910 ldb rbd,@rs mbit popl addr,@rs 13911 ldb rbd,addr mreq rd popl rrd,@rs 13912 ldb rbd,addr(rs) mres push @rd,@rs 13913 ldb rbd,imm8 mset push @rd,addr 13914 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs) 13915 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16 13916 push @rd,rs set addr,imm4 subl rrd,imm32 13917 pushl @rd,@rs set rd,imm4 subl rrd,rrs 13918 pushl @rd,addr set rd,rs tcc cc,rd 13919 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd 13920 pushl @rd,rrs setb addr(rd),imm4 test @rd 13921 res @rd,imm4 setb addr,imm4 test addr 13922 res addr(rd),imm4 setb rbd,imm4 test addr(rd) 13923 res addr,imm4 setb rbd,rs test rd 13924 res rd,imm4 setflg imm4 testb @rd 13925 res rd,rs sinb rbd,imm16 testb addr 13926 resb @rd,imm4 sinb rd,imm16 testb addr(rd) 13927 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd 13928 resb addr,imm4 sindb @rd,@rs,rba testl @rd 13929 resb rbd,imm4 sinib @rd,@rs,ra testl addr 13930 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd) 13931 resflg imm4 sla rd,imm8 testl rrd 13932 ret cc slab rbd,imm8 trdb @rd,@rs,rba 13933 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba 13934 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr 13935 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr 13936 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr 13937 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr 13938 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr 13939 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr 13940 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd 13941 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr 13942 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd) 13943 rsvd36 sra rd,imm8 tset rd 13944 rsvd38 srab rbd,imm8 tsetb @rd 13945 rsvd78 sral rrd,imm8 tsetb addr 13946 rsvd7e srl rd,imm8 tsetb addr(rd) 13947 rsvd9d srlb rbd,imm8 tsetb rbd 13948 rsvd9f srll rrd,imm8 xor rd,@rs 13949 rsvdb9 sub rd,@rs xor rd,addr 13950 rsvdbf sub rd,addr xor rd,addr(rs) 13951 sbc rd,rs sub rd,addr(rs) xor rd,imm16 13952 sbcb rbd,rbs sub rd,imm16 xor rd,rs 13953 sc imm8 sub rd,rs xorb rbd,@rs 13954 sda rd,rs subb rbd,@rs xorb rbd,addr 13955 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs) 13956 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8 13957 sdl rd,rs subb rbd,imm8 xorb rbd,rbs 13958 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs 13959 sdll rrd,rs subl rrd,@rs 13960 set @rd,imm4 subl rrd,addr 13961 set addr(rd),imm4 subl rrd,addr(rs) 13962 13963 13964 File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies 13965 13966 8.32 VAX Dependent Features 13967 =========================== 13968 13969 * Menu: 13970 13971 * VAX-Opts:: VAX Command-Line Options 13972 * VAX-float:: VAX Floating Point 13973 * VAX-directives:: Vax Machine Directives 13974 * VAX-opcodes:: VAX Opcodes 13975 * VAX-branch:: VAX Branch Improvement 13976 * VAX-operands:: VAX Operands 13977 * VAX-no:: Not Supported on VAX 13978 13979 13980 File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent 13981 13982 8.32.1 VAX Command-Line Options 13983 ------------------------------- 13984 13985 The Vax version of `as' accepts any of the following options, gives a 13986 warning message that the option was ignored and proceeds. These 13987 options are for compatibility with scripts designed for other people's 13988 assemblers. 13989 13990 ``-D' (Debug)' 13991 ``-S' (Symbol Table)' 13992 ``-T' (Token Trace)' 13993 These are obsolete options used to debug old assemblers. 13994 13995 ``-d' (Displacement size for JUMPs)' 13996 This option expects a number following the `-d'. Like options 13997 that expect filenames, the number may immediately follow the `-d' 13998 (old standard) or constitute the whole of the command line 13999 argument that follows `-d' (GNU standard). 14000 14001 ``-V' (Virtualize Interpass Temporary File)' 14002 Some other assemblers use a temporary file. This option commanded 14003 them to keep the information in active memory rather than in a 14004 disk file. `as' always does this, so this option is redundant. 14005 14006 ``-J' (JUMPify Longer Branches)' 14007 Many 32-bit computers permit a variety of branch instructions to 14008 do the same job. Some of these instructions are short (and fast) 14009 but have a limited range; others are long (and slow) but can 14010 branch anywhere in virtual memory. Often there are 3 flavors of 14011 branch: short, medium and long. Some other assemblers would emit 14012 short and medium branches, unless told by this option to emit 14013 short and long branches. 14014 14015 ``-t' (Temporary File Directory)' 14016 Some other assemblers may use a temporary file, and this option 14017 takes a filename being the directory to site the temporary file. 14018 Since `as' does not use a temporary disk file, this option makes 14019 no difference. `-t' needs exactly one filename. 14020 14021 The Vax version of the assembler accepts additional options when 14022 compiled for VMS: 14023 14024 `-h N' 14025 External symbol or section (used for global variables) names are 14026 not case sensitive on VAX/VMS and always mapped to upper case. 14027 This is contrary to the C language definition which explicitly 14028 distinguishes upper and lower case. To implement a standard 14029 conforming C compiler, names must be changed (mapped) to preserve 14030 the case information. The default mapping is to convert all lower 14031 case characters to uppercase and adding an underscore followed by 14032 a 6 digit hex value, representing a 24 digit binary value. The 14033 one digits in the binary value represent which characters are 14034 uppercase in the original symbol name. 14035 14036 The `-h N' option determines how we map names. This takes several 14037 values. No `-h' switch at all allows case hacking as described 14038 above. A value of zero (`-h0') implies names should be upper 14039 case, and inhibits the case hack. A value of 2 (`-h2') implies 14040 names should be all lower case, with no case hack. A value of 3 14041 (`-h3') implies that case should be preserved. The value 1 is 14042 unused. The `-H' option directs `as' to display every mapped 14043 symbol during assembly. 14044 14045 Symbols whose names include a dollar sign `$' are exceptions to the 14046 general name mapping. These symbols are normally only used to 14047 reference VMS library names. Such symbols are always mapped to 14048 upper case. 14049 14050 `-+' 14051 The `-+' option causes `as' to truncate any symbol name larger 14052 than 31 characters. The `-+' option also prevents some code 14053 following the `_main' symbol normally added to make the object 14054 file compatible with Vax-11 "C". 14055 14056 `-1' 14057 This option is ignored for backward compatibility with `as' 14058 version 1.x. 14059 14060 `-H' 14061 The `-H' option causes `as' to print every symbol which was 14062 changed by case mapping. 14063 14064 14065 File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent 14066 14067 8.32.2 VAX Floating Point 14068 ------------------------- 14069 14070 Conversion of flonums to floating point is correct, and compatible with 14071 previous assemblers. Rounding is towards zero if the remainder is 14072 exactly half the least significant bit. 14073 14074 `D', `F', `G' and `H' floating point formats are understood. 14075 14076 Immediate floating literals (_e.g._ `S`$6.9') are rendered 14077 correctly. Again, rounding is towards zero in the boundary case. 14078 14079 The `.float' directive produces `f' format numbers. The `.double' 14080 directive produces `d' format numbers. 14081 14082 14083 File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent 14084 14085 8.32.3 Vax Machine Directives 14086 ----------------------------- 14087 14088 The Vax version of the assembler supports four directives for 14089 generating Vax floating point constants. They are described in the 14090 table below. 14091 14092 `.dfloat' 14093 This expects zero or more flonums, separated by commas, and 14094 assembles Vax `d' format 64-bit floating point constants. 14095 14096 `.ffloat' 14097 This expects zero or more flonums, separated by commas, and 14098 assembles Vax `f' format 32-bit floating point constants. 14099 14100 `.gfloat' 14101 This expects zero or more flonums, separated by commas, and 14102 assembles Vax `g' format 64-bit floating point constants. 14103 14104 `.hfloat' 14105 This expects zero or more flonums, separated by commas, and 14106 assembles Vax `h' format 128-bit floating point constants. 14107 14108 14109 14110 File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent 14111 14112 8.32.4 VAX Opcodes 14113 ------------------ 14114 14115 All DEC mnemonics are supported. Beware that `case...' instructions 14116 have exactly 3 operands. The dispatch table that follows the `case...' 14117 instruction should be made with `.word' statements. This is compatible 14118 with all unix assemblers we know of. 14119 14120 14121 File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent 14122 14123 8.32.5 VAX Branch Improvement 14124 ----------------------------- 14125 14126 Certain pseudo opcodes are permitted. They are for branch 14127 instructions. They expand to the shortest branch instruction that 14128 reaches the target. Generally these mnemonics are made by substituting 14129 `j' for `b' at the start of a DEC mnemonic. This feature is included 14130 both for compatibility and to help compilers. If you do not need this 14131 feature, avoid these opcodes. Here are the mnemonics, and the code 14132 they can expand into. 14133 14134 `jbsb' 14135 `Jsb' is already an instruction mnemonic, so we chose `jbsb'. 14136 (byte displacement) 14137 `bsbb ...' 14138 14139 (word displacement) 14140 `bsbw ...' 14141 14142 (long displacement) 14143 `jsb ...' 14144 14145 `jbr' 14146 `jr' 14147 Unconditional branch. 14148 (byte displacement) 14149 `brb ...' 14150 14151 (word displacement) 14152 `brw ...' 14153 14154 (long displacement) 14155 `jmp ...' 14156 14157 `jCOND' 14158 COND may be any one of the conditional branches `neq', `nequ', 14159 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs', 14160 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests 14161 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs', 14162 `lbc'. NOTCOND is the opposite condition to COND. 14163 (byte displacement) 14164 `bCOND ...' 14165 14166 (word displacement) 14167 `bNOTCOND foo ; brw ... ; foo:' 14168 14169 (long displacement) 14170 `bNOTCOND foo ; jmp ... ; foo:' 14171 14172 `jacbX' 14173 X may be one of `b d f g h l w'. 14174 (word displacement) 14175 `OPCODE ...' 14176 14177 (long displacement) 14178 OPCODE ..., foo ; 14179 brb bar ; 14180 foo: jmp ... ; 14181 bar: 14182 14183 `jaobYYY' 14184 YYY may be one of `lss leq'. 14185 14186 `jsobZZZ' 14187 ZZZ may be one of `geq gtr'. 14188 (byte displacement) 14189 `OPCODE ...' 14190 14191 (word displacement) 14192 OPCODE ..., foo ; 14193 brb bar ; 14194 foo: brw DESTINATION ; 14195 bar: 14196 14197 (long displacement) 14198 OPCODE ..., foo ; 14199 brb bar ; 14200 foo: jmp DESTINATION ; 14201 bar: 14202 14203 `aobleq' 14204 `aoblss' 14205 `sobgeq' 14206 `sobgtr' 14207 14208 (byte displacement) 14209 `OPCODE ...' 14210 14211 (word displacement) 14212 OPCODE ..., foo ; 14213 brb bar ; 14214 foo: brw DESTINATION ; 14215 bar: 14216 14217 (long displacement) 14218 OPCODE ..., foo ; 14219 brb bar ; 14220 foo: jmp DESTINATION ; 14221 bar: 14222 14223 14224 File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent 14225 14226 8.32.6 VAX Operands 14227 ------------------- 14228 14229 The immediate character is `$' for Unix compatibility, not `#' as DEC 14230 writes it. 14231 14232 The indirect character is `*' for Unix compatibility, not `@' as DEC 14233 writes it. 14234 14235 The displacement sizing character is ``' (an accent grave) for Unix 14236 compatibility, not `^' as DEC writes it. The letter preceding ``' may 14237 have either case. `G' is not understood, but all other letters (`b i l 14238 s w') are understood. 14239 14240 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper 14241 and lower case letters are equivalent. 14242 14243 For instance 14244 tstb *w`$4(r5) 14245 14246 Any expression is permitted in an operand. Operands are comma 14247 separated. 14248 14249 14250 File: as.info, Node: VAX-no, Prev: VAX-operands, Up: Vax-Dependent 14251 14252 8.32.7 Not Supported on VAX 14253 --------------------------- 14254 14255 Vax bit fields can not be assembled with `as'. Someone can add the 14256 required code if they really need it. 14257 14258 14259 File: as.info, Node: V850-Dependent, Next: Xtensa-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies 14260 14261 8.33 v850 Dependent Features 14262 ============================ 14263 14264 * Menu: 14265 14266 * V850 Options:: Options 14267 * V850 Syntax:: Syntax 14268 * V850 Floating Point:: Floating Point 14269 * V850 Directives:: V850 Machine Directives 14270 * V850 Opcodes:: Opcodes 14271 14272 14273 File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent 14274 14275 8.33.1 Options 14276 -------------- 14277 14278 `as' supports the following additional command-line options for the 14279 V850 processor family: 14280 14281 `-wsigned_overflow' 14282 Causes warnings to be produced when signed immediate values 14283 overflow the space available for then within their opcodes. By 14284 default this option is disabled as it is possible to receive 14285 spurious warnings due to using exact bit patterns as immediate 14286 constants. 14287 14288 `-wunsigned_overflow' 14289 Causes warnings to be produced when unsigned immediate values 14290 overflow the space available for then within their opcodes. By 14291 default this option is disabled as it is possible to receive 14292 spurious warnings due to using exact bit patterns as immediate 14293 constants. 14294 14295 `-mv850' 14296 Specifies that the assembled code should be marked as being 14297 targeted at the V850 processor. This allows the linker to detect 14298 attempts to link such code with code assembled for other 14299 processors. 14300 14301 `-mv850e' 14302 Specifies that the assembled code should be marked as being 14303 targeted at the V850E processor. This allows the linker to detect 14304 attempts to link such code with code assembled for other 14305 processors. 14306 14307 `-mv850e1' 14308 Specifies that the assembled code should be marked as being 14309 targeted at the V850E1 processor. This allows the linker to 14310 detect attempts to link such code with code assembled for other 14311 processors. 14312 14313 `-mv850any' 14314 Specifies that the assembled code should be marked as being 14315 targeted at the V850 processor but support instructions that are 14316 specific to the extended variants of the process. This allows the 14317 production of binaries that contain target specific code, but 14318 which are also intended to be used in a generic fashion. For 14319 example libgcc.a contains generic routines used by the code 14320 produced by GCC for all versions of the v850 architecture, 14321 together with support routines only used by the V850E architecture. 14322 14323 `-mrelax' 14324 Enables relaxation. This allows the .longcall and .longjump pseudo 14325 ops to be used in the assembler source code. These ops label 14326 sections of code which are either a long function call or a long 14327 branch. The assembler will then flag these sections of code and 14328 the linker will attempt to relax them. 14329 14330 14331 14332 File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent 14333 14334 8.33.2 Syntax 14335 ------------- 14336 14337 * Menu: 14338 14339 * V850-Chars:: Special Characters 14340 * V850-Regs:: Register Names 14341 14342 14343 File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax 14344 14345 8.33.2.1 Special Characters 14346 ........................... 14347 14348 `#' is the line comment character. 14349 14350 14351 File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax 14352 14353 8.33.2.2 Register Names 14354 ....................... 14355 14356 `as' supports the following names for registers: 14357 `general register 0' 14358 r0, zero 14359 14360 `general register 1' 14361 r1 14362 14363 `general register 2' 14364 r2, hp 14365 14366 `general register 3' 14367 r3, sp 14368 14369 `general register 4' 14370 r4, gp 14371 14372 `general register 5' 14373 r5, tp 14374 14375 `general register 6' 14376 r6 14377 14378 `general register 7' 14379 r7 14380 14381 `general register 8' 14382 r8 14383 14384 `general register 9' 14385 r9 14386 14387 `general register 10' 14388 r10 14389 14390 `general register 11' 14391 r11 14392 14393 `general register 12' 14394 r12 14395 14396 `general register 13' 14397 r13 14398 14399 `general register 14' 14400 r14 14401 14402 `general register 15' 14403 r15 14404 14405 `general register 16' 14406 r16 14407 14408 `general register 17' 14409 r17 14410 14411 `general register 18' 14412 r18 14413 14414 `general register 19' 14415 r19 14416 14417 `general register 20' 14418 r20 14419 14420 `general register 21' 14421 r21 14422 14423 `general register 22' 14424 r22 14425 14426 `general register 23' 14427 r23 14428 14429 `general register 24' 14430 r24 14431 14432 `general register 25' 14433 r25 14434 14435 `general register 26' 14436 r26 14437 14438 `general register 27' 14439 r27 14440 14441 `general register 28' 14442 r28 14443 14444 `general register 29' 14445 r29 14446 14447 `general register 30' 14448 r30, ep 14449 14450 `general register 31' 14451 r31, lp 14452 14453 `system register 0' 14454 eipc 14455 14456 `system register 1' 14457 eipsw 14458 14459 `system register 2' 14460 fepc 14461 14462 `system register 3' 14463 fepsw 14464 14465 `system register 4' 14466 ecr 14467 14468 `system register 5' 14469 psw 14470 14471 `system register 16' 14472 ctpc 14473 14474 `system register 17' 14475 ctpsw 14476 14477 `system register 18' 14478 dbpc 14479 14480 `system register 19' 14481 dbpsw 14482 14483 `system register 20' 14484 ctbp 14485 14486 14487 File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent 14488 14489 8.33.3 Floating Point 14490 --------------------- 14491 14492 The V850 family uses IEEE floating-point numbers. 14493 14494 14495 File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent 14496 14497 8.33.4 V850 Machine Directives 14498 ------------------------------ 14499 14500 `.offset <EXPRESSION>' 14501 Moves the offset into the current section to the specified amount. 14502 14503 `.section "name", <type>' 14504 This is an extension to the standard .section directive. It sets 14505 the current section to be <type> and creates an alias for this 14506 section called "name". 14507 14508 `.v850' 14509 Specifies that the assembled code should be marked as being 14510 targeted at the V850 processor. This allows the linker to detect 14511 attempts to link such code with code assembled for other 14512 processors. 14513 14514 `.v850e' 14515 Specifies that the assembled code should be marked as being 14516 targeted at the V850E processor. This allows the linker to detect 14517 attempts to link such code with code assembled for other 14518 processors. 14519 14520 `.v850e1' 14521 Specifies that the assembled code should be marked as being 14522 targeted at the V850E1 processor. This allows the linker to 14523 detect attempts to link such code with code assembled for other 14524 processors. 14525 14526 14527 14528 File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent 14529 14530 8.33.5 Opcodes 14531 -------------- 14532 14533 `as' implements all the standard V850 opcodes. 14534 14535 `as' also implements the following pseudo ops: 14536 14537 `hi0()' 14538 Computes the higher 16 bits of the given expression and stores it 14539 into the immediate operand field of the given instruction. For 14540 example: 14541 14542 `mulhi hi0(here - there), r5, r6' 14543 14544 computes the difference between the address of labels 'here' and 14545 'there', takes the upper 16 bits of this difference, shifts it 14546 down 16 bits and then mutliplies it by the lower 16 bits in 14547 register 5, putting the result into register 6. 14548 14549 `lo()' 14550 Computes the lower 16 bits of the given expression and stores it 14551 into the immediate operand field of the given instruction. For 14552 example: 14553 14554 `addi lo(here - there), r5, r6' 14555 14556 computes the difference between the address of labels 'here' and 14557 'there', takes the lower 16 bits of this difference and adds it to 14558 register 5, putting the result into register 6. 14559 14560 `hi()' 14561 Computes the higher 16 bits of the given expression and then adds 14562 the value of the most significant bit of the lower 16 bits of the 14563 expression and stores the result into the immediate operand field 14564 of the given instruction. For example the following code can be 14565 used to compute the address of the label 'here' and store it into 14566 register 6: 14567 14568 `movhi hi(here), r0, r6' `movea lo(here), r6, r6' 14569 14570 The reason for this special behaviour is that movea performs a sign 14571 extension on its immediate operand. So for example if the address 14572 of 'here' was 0xFFFFFFFF then without the special behaviour of the 14573 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6, 14574 then the movea instruction would takes its immediate operand, 14575 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it 14576 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E). 14577 With the hi() pseudo op adding in the top bit of the lo() pseudo 14578 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 = 14579 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 - 14580 the right value. 14581 14582 `hilo()' 14583 Computes the 32 bit value of the given expression and stores it 14584 into the immediate operand field of the given instruction (which 14585 must be a mov instruction). For example: 14586 14587 `mov hilo(here), r6' 14588 14589 computes the absolute address of label 'here' and puts the result 14590 into register 6. 14591 14592 `sdaoff()' 14593 Computes the offset of the named variable from the start of the 14594 Small Data Area (whoes address is held in register 4, the GP 14595 register) and stores the result as a 16 bit signed value in the 14596 immediate operand field of the given instruction. For example: 14597 14598 `ld.w sdaoff(_a_variable)[gp],r6' 14599 14600 loads the contents of the location pointed to by the label 14601 '_a_variable' into register 6, provided that the label is located 14602 somewhere within +/- 32K of the address held in the GP register. 14603 [Note the linker assumes that the GP register contains a fixed 14604 address set to the address of the label called '__gp'. This can 14605 either be set up automatically by the linker, or specifically set 14606 by using the `--defsym __gp=<value>' command line option]. 14607 14608 `tdaoff()' 14609 Computes the offset of the named variable from the start of the 14610 Tiny Data Area (whoes address is held in register 30, the EP 14611 register) and stores the result as a 4,5, 7 or 8 bit unsigned 14612 value in the immediate operand field of the given instruction. 14613 For example: 14614 14615 `sld.w tdaoff(_a_variable)[ep],r6' 14616 14617 loads the contents of the location pointed to by the label 14618 '_a_variable' into register 6, provided that the label is located 14619 somewhere within +256 bytes of the address held in the EP 14620 register. [Note the linker assumes that the EP register contains 14621 a fixed address set to the address of the label called '__ep'. 14622 This can either be set up automatically by the linker, or 14623 specifically set by using the `--defsym __ep=<value>' command line 14624 option]. 14625 14626 `zdaoff()' 14627 Computes the offset of the named variable from address 0 and 14628 stores the result as a 16 bit signed value in the immediate 14629 operand field of the given instruction. For example: 14630 14631 `movea zdaoff(_a_variable),zero,r6' 14632 14633 puts the address of the label '_a_variable' into register 6, 14634 assuming that the label is somewhere within the first 32K of 14635 memory. (Strictly speaking it also possible to access the last 14636 32K of memory as well, as the offsets are signed). 14637 14638 `ctoff()' 14639 Computes the offset of the named variable from the start of the 14640 Call Table Area (whoes address is helg in system register 20, the 14641 CTBP register) and stores the result a 6 or 16 bit unsigned value 14642 in the immediate field of then given instruction or piece of data. 14643 For example: 14644 14645 `callt ctoff(table_func1)' 14646 14647 will put the call the function whoes address is held in the call 14648 table at the location labeled 'table_func1'. 14649 14650 `.longcall `name'' 14651 Indicates that the following sequence of instructions is a long 14652 call to function `name'. The linker will attempt to shorten this 14653 call sequence if `name' is within a 22bit offset of the call. Only 14654 valid if the `-mrelax' command line switch has been enabled. 14655 14656 `.longjump `name'' 14657 Indicates that the following sequence of instructions is a long 14658 jump to label `name'. The linker will attempt to shorten this code 14659 sequence if `name' is within a 22bit offset of the jump. Only 14660 valid if the `-mrelax' command line switch has been enabled. 14661 14662 14663 For information on the V850 instruction set, see `V850 Family 14664 32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC. 14665 Ltd. 14666 14667 14668 File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: V850-Dependent, Up: Machine Dependencies 14669 14670 8.34 Xtensa Dependent Features 14671 ============================== 14672 14673 This chapter covers features of the GNU assembler that are specific 14674 to the Xtensa architecture. For details about the Xtensa instruction 14675 set, please consult the `Xtensa Instruction Set Architecture (ISA) 14676 Reference Manual'. 14677 14678 * Menu: 14679 14680 * Xtensa Options:: Command-line Options. 14681 * Xtensa Syntax:: Assembler Syntax for Xtensa Processors. 14682 * Xtensa Optimizations:: Assembler Optimizations. 14683 * Xtensa Relaxation:: Other Automatic Transformations. 14684 * Xtensa Directives:: Directives for Xtensa Processors. 14685 14686 14687 File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent 14688 14689 8.34.1 Command Line Options 14690 --------------------------- 14691 14692 The Xtensa version of the GNU assembler supports these special options: 14693 14694 `--text-section-literals | --no-text-section-literals' 14695 Control the treatment of literal pools. The default is 14696 `--no-text-section-literals', which places literals in a separate 14697 section in the output file. This allows the literal pool to be 14698 placed in a data RAM/ROM. With `--text-section-literals', the 14699 literals are interspersed in the text section in order to keep 14700 them as close as possible to their references. This may be 14701 necessary for large assembly files, where the literals would 14702 otherwise be out of range of the `L32R' instructions in the text 14703 section. These options only affect literals referenced via 14704 PC-relative `L32R' instructions; literals for absolute mode `L32R' 14705 instructions are handled separately. 14706 14707 `--absolute-literals | --no-absolute-literals' 14708 Indicate to the assembler whether `L32R' instructions use absolute 14709 or PC-relative addressing. If the processor includes the absolute 14710 addressing option, the default is to use absolute `L32R' 14711 relocations. Otherwise, only the PC-relative `L32R' relocations 14712 can be used. 14713 14714 `--target-align | --no-target-align' 14715 Enable or disable automatic alignment to reduce branch penalties 14716 at some expense in code size. *Note Automatic Instruction 14717 Alignment: Xtensa Automatic Alignment. This optimization is 14718 enabled by default. Note that the assembler will always align 14719 instructions like `LOOP' that have fixed alignment requirements. 14720 14721 `--longcalls | --no-longcalls' 14722 Enable or disable transformation of call instructions to allow 14723 calls across a greater range of addresses. *Note Function Call 14724 Relaxation: Xtensa Call Relaxation. This option should be used 14725 when call targets can potentially be out of range. It may degrade 14726 both code size and performance, but the linker can generally 14727 optimize away the unnecessary overhead when a call ends up within 14728 range. The default is `--no-longcalls'. 14729 14730 `--transform | --no-transform' 14731 Enable or disable all assembler transformations of Xtensa 14732 instructions, including both relaxation and optimization. The 14733 default is `--transform'; `--no-transform' should only be used in 14734 the rare cases when the instructions must be exactly as specified 14735 in the assembly source. Using `--no-transform' causes out of range 14736 instruction operands to be errors. 14737 14738 `--rename-section OLDNAME=NEWNAME' 14739 Rename the OLDNAME section to NEWNAME. This option can be used 14740 multiple times to rename multiple sections. 14741 14742 14743 File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent 14744 14745 8.34.2 Assembler Syntax 14746 ----------------------- 14747 14748 Block comments are delimited by `/*' and `*/'. End of line comments 14749 may be introduced with either `#' or `//'. 14750 14751 Instructions consist of a leading opcode or macro name followed by 14752 whitespace and an optional comma-separated list of operands: 14753 14754 OPCODE [OPERAND, ...] 14755 14756 Instructions must be separated by a newline or semicolon. 14757 14758 FLIX instructions, which bundle multiple opcodes together in a single 14759 instruction, are specified by enclosing the bundled opcodes inside 14760 braces: 14761 14762 { 14763 [FORMAT] 14764 OPCODE0 [OPERANDS] 14765 OPCODE1 [OPERANDS] 14766 OPCODE2 [OPERANDS] 14767 ... 14768 } 14769 14770 The opcodes in a FLIX instruction are listed in the same order as the 14771 corresponding instruction slots in the TIE format declaration. 14772 Directives and labels are not allowed inside the braces of a FLIX 14773 instruction. A particular TIE format name can optionally be specified 14774 immediately after the opening brace, but this is usually unnecessary. 14775 The assembler will automatically search for a format that can encode the 14776 specified opcodes, so the format name need only be specified in rare 14777 cases where there is more than one applicable format and where it 14778 matters which of those formats is used. A FLIX instruction can also be 14779 specified on a single line by separating the opcodes with semicolons: 14780 14781 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... } 14782 14783 The assembler can automatically bundle opcodes into FLIX 14784 instructions. It encodes the opcodes in order, one at a time, choosing 14785 the smallest format where each opcode can be encoded and filling unused 14786 instruction slots with no-ops. 14787 14788 * Menu: 14789 14790 * Xtensa Opcodes:: Opcode Naming Conventions. 14791 * Xtensa Registers:: Register Naming. 14792 14793 14794 File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax 14795 14796 8.34.2.1 Opcode Names 14797 ..................... 14798 14799 See the `Xtensa Instruction Set Architecture (ISA) Reference Manual' 14800 for a complete list of opcodes and descriptions of their semantics. 14801 14802 If an opcode name is prefixed with an underscore character (`_'), 14803 `as' will not transform that instruction in any way. The underscore 14804 prefix disables both optimization (*note Xtensa Optimizations: Xtensa 14805 Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa 14806 Relaxation.) for that particular instruction. Only use the underscore 14807 prefix when it is essential to select the exact opcode produced by the 14808 assembler. Using this feature unnecessarily makes the code less 14809 efficient by disabling assembler optimization and less flexible by 14810 disabling relaxation. 14811 14812 Note that this special handling of underscore prefixes only applies 14813 to Xtensa opcodes, not to either built-in macros or user-defined macros. 14814 When an underscore prefix is used with a macro (e.g., `_MOV'), it 14815 refers to a different macro. The assembler generally provides built-in 14816 macros both with and without the underscore prefix, where the underscore 14817 versions behave as if the underscore carries through to the instructions 14818 in the macros. For example, `_MOV' may expand to `_MOV.N'. 14819 14820 The underscore prefix only applies to individual instructions, not to 14821 series of instructions. For example, if a series of instructions have 14822 underscore prefixes, the assembler will not transform the individual 14823 instructions, but it may insert other instructions between them (e.g., 14824 to align a `LOOP' instruction). To prevent the assembler from 14825 modifying a series of instructions as a whole, use the `no-transform' 14826 directive. *Note transform: Transform Directive. 14827 14828 14829 File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax 14830 14831 8.34.2.2 Register Names 14832 ....................... 14833 14834 The assembly syntax for a register file entry is the "short" name for a 14835 TIE register file followed by the index into that register file. For 14836 example, the general-purpose `AR' register file has a short name of 14837 `a', so these registers are named `a0'...`a15'. As a special feature, 14838 `sp' is also supported as a synonym for `a1'. Additional registers may 14839 be added by processor configuration options and by designer-defined TIE 14840 extensions. An initial `$' character is optional in all register names. 14841 14842 14843 File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent 14844 14845 8.34.3 Xtensa Optimizations 14846 --------------------------- 14847 14848 The optimizations currently supported by `as' are generation of density 14849 instructions where appropriate and automatic branch target alignment. 14850 14851 * Menu: 14852 14853 * Density Instructions:: Using Density Instructions. 14854 * Xtensa Automatic Alignment:: Automatic Instruction Alignment. 14855 14856 14857 File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations 14858 14859 8.34.3.1 Using Density Instructions 14860 ................................... 14861 14862 The Xtensa instruction set has a code density option that provides 14863 16-bit versions of some of the most commonly used opcodes. Use of these 14864 opcodes can significantly reduce code size. When possible, the 14865 assembler automatically translates instructions from the core Xtensa 14866 instruction set into equivalent instructions from the Xtensa code 14867 density option. This translation can be disabled by using underscore 14868 prefixes (*note Opcode Names: Xtensa Opcodes.), by using the 14869 `--no-transform' command-line option (*note Command Line Options: 14870 Xtensa Options.), or by using the `no-transform' directive (*note 14871 transform: Transform Directive.). 14872 14873 It is a good idea _not_ to use the density instructions directly. 14874 The assembler will automatically select dense instructions where 14875 possible. If you later need to use an Xtensa processor without the code 14876 density option, the same assembly code will then work without 14877 modification. 14878 14879 14880 File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations 14881 14882 8.34.3.2 Automatic Instruction Alignment 14883 ........................................ 14884 14885 The Xtensa assembler will automatically align certain instructions, both 14886 to optimize performance and to satisfy architectural requirements. 14887 14888 As an optimization to improve performance, the assembler attempts to 14889 align branch targets so they do not cross instruction fetch boundaries. 14890 (Xtensa processors can be configured with either 32-bit or 64-bit 14891 instruction fetch widths.) An instruction immediately following a call 14892 is treated as a branch target in this context, because it will be the 14893 target of a return from the call. This alignment has the potential to 14894 reduce branch penalties at some expense in code size. The assembler 14895 will not attempt to align labels with the prefixes `.Ln' and `.LM', 14896 since these labels are used for debugging information and are not 14897 typically branch targets. This optimization is enabled by default. 14898 You can disable it with the `--no-target-align' command-line option 14899 (*note Command Line Options: Xtensa Options.). 14900 14901 The target alignment optimization is done without adding instructions 14902 that could increase the execution time of the program. If there are 14903 density instructions in the code preceding a target, the assembler can 14904 change the target alignment by widening some of those instructions to 14905 the equivalent 24-bit instructions. Extra bytes of padding can be 14906 inserted immediately following unconditional jump and return 14907 instructions. This approach is usually successful in aligning many, 14908 but not all, branch targets. 14909 14910 The `LOOP' family of instructions must be aligned such that the 14911 first instruction in the loop body does not cross an instruction fetch 14912 boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be 14913 on either a 1 or 2 mod 4 byte boundary). The assembler knows about 14914 this restriction and inserts the minimal number of 2 or 3 byte no-op 14915 instructions to satisfy it. When no-op instructions are added, any 14916 label immediately preceding the original loop will be moved in order to 14917 refer to the loop instruction, not the newly generated no-op 14918 instruction. To preserve binary compatibility across processors with 14919 different fetch widths, the assembler conservatively assumes a 32-bit 14920 fetch width when aligning `LOOP' instructions (except if the first 14921 instruction in the loop is a 64-bit instruction). 14922 14923 Similarly, the `ENTRY' instruction must be aligned on a 0 mod 4 byte 14924 boundary. The assembler satisfies this requirement by inserting zero 14925 bytes when required. In addition, labels immediately preceding the 14926 `ENTRY' instruction will be moved to the newly aligned instruction 14927 location. 14928 14929 14930 File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent 14931 14932 8.34.4 Xtensa Relaxation 14933 ------------------------ 14934 14935 When an instruction operand is outside the range allowed for that 14936 particular instruction field, `as' can transform the code to use a 14937 functionally-equivalent instruction or sequence of instructions. This 14938 process is known as "relaxation". This is typically done for branch 14939 instructions because the distance of the branch targets is not known 14940 until assembly-time. The Xtensa assembler offers branch relaxation and 14941 also extends this concept to function calls, `MOVI' instructions and 14942 other instructions with immediate fields. 14943 14944 * Menu: 14945 14946 * Xtensa Branch Relaxation:: Relaxation of Branches. 14947 * Xtensa Call Relaxation:: Relaxation of Function Calls. 14948 * Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields. 14949 14950 14951 File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation 14952 14953 8.34.4.1 Conditional Branch Relaxation 14954 ...................................... 14955 14956 When the target of a branch is too far away from the branch itself, 14957 i.e., when the offset from the branch to the target is too large to fit 14958 in the immediate field of the branch instruction, it may be necessary to 14959 replace the branch with a branch around a jump. For example, 14960 14961 beqz a2, L 14962 14963 may result in: 14964 14965 bnez.n a2, M 14966 j L 14967 M: 14968 14969 (The `BNEZ.N' instruction would be used in this example only if the 14970 density option is available. Otherwise, `BNEZ' would be used.) 14971 14972 This relaxation works well because the unconditional jump instruction 14973 has a much larger offset range than the various conditional branches. 14974 However, an error will occur if a branch target is beyond the range of a 14975 jump instruction. `as' cannot relax unconditional jumps. Similarly, 14976 an error will occur if the original input contains an unconditional 14977 jump to a target that is out of range. 14978 14979 Branch relaxation is enabled by default. It can be disabled by using 14980 underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the 14981 `--no-transform' command-line option (*note Command Line Options: 14982 Xtensa Options.), or the `no-transform' directive (*note transform: 14983 Transform Directive.). 14984 14985 14986 File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation 14987 14988 8.34.4.2 Function Call Relaxation 14989 ................................. 14990 14991 Function calls may require relaxation because the Xtensa immediate call 14992 instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a 14993 PC-relative offset of only 512 Kbytes in either direction. For larger 14994 programs, it may be necessary to use indirect calls (`CALLX0', 14995 `CALLX4', `CALLX8' and `CALLX12') where the target address is specified 14996 in a register. The Xtensa assembler can automatically relax immediate 14997 call instructions into indirect call instructions. This relaxation is 14998 done by loading the address of the called function into the callee's 14999 return address register and then using a `CALLX' instruction. So, for 15000 example: 15001 15002 call8 func 15003 15004 might be relaxed to: 15005 15006 .literal .L1, func 15007 l32r a8, .L1 15008 callx8 a8 15009 15010 Because the addresses of targets of function calls are not generally 15011 known until link-time, the assembler must assume the worst and relax all 15012 the calls to functions in other source files, not just those that really 15013 will be out of range. The linker can recognize calls that were 15014 unnecessarily relaxed, and it will remove the overhead introduced by the 15015 assembler for those cases where direct calls are sufficient. 15016 15017 Call relaxation is disabled by default because it can have a negative 15018 effect on both code size and performance, although the linker can 15019 usually eliminate the unnecessary overhead. If a program is too large 15020 and some of the calls are out of range, function call relaxation can be 15021 enabled using the `--longcalls' command-line option or the `longcalls' 15022 directive (*note longcalls: Longcalls Directive.). 15023 15024 15025 File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation 15026 15027 8.34.4.3 Other Immediate Field Relaxation 15028 ......................................... 15029 15030 The assembler normally performs the following other relaxations. They 15031 can be disabled by using underscore prefixes (*note Opcode Names: 15032 Xtensa Opcodes.), the `--no-transform' command-line option (*note 15033 Command Line Options: Xtensa Options.), or the `no-transform' directive 15034 (*note transform: Transform Directive.). 15035 15036 The `MOVI' machine instruction can only materialize values in the 15037 range from -2048 to 2047. Values outside this range are best 15038 materialized with `L32R' instructions. Thus: 15039 15040 movi a0, 100000 15041 15042 is assembled into the following machine code: 15043 15044 .literal .L1, 100000 15045 l32r a0, .L1 15046 15047 The `L8UI' machine instruction can only be used with immediate 15048 offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine 15049 instructions can only be used with offsets from 0 to 510. The `L32I' 15050 machine instruction can only be used with offsets from 0 to 1020. A 15051 load offset outside these ranges can be materalized with an `L32R' 15052 instruction if the destination register of the load is different than 15053 the source address register. For example: 15054 15055 l32i a1, a0, 2040 15056 15057 is translated to: 15058 15059 .literal .L1, 2040 15060 l32r a1, .L1 15061 addi a1, a0, a1 15062 l32i a1, a1, 0 15063 15064 If the load destination and source address register are the same, an 15065 out-of-range offset causes an error. 15066 15067 The Xtensa `ADDI' instruction only allows immediate operands in the 15068 range from -128 to 127. There are a number of alternate instruction 15069 sequences for the `ADDI' operation. First, if the immediate is 0, the 15070 `ADDI' will be turned into a `MOV.N' instruction (or the equivalent 15071 `OR' instruction if the code density option is not available). If the 15072 `ADDI' immediate is outside of the range -128 to 127, but inside the 15073 range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI' 15074 sequence will be used. Finally, if the immediate is outside of this 15075 range and a free register is available, an `L32R'/`ADD' sequence will 15076 be used with a literal allocated from the literal pool. 15077 15078 For example: 15079 15080 addi a5, a6, 0 15081 addi a5, a6, 512 15082 addi a5, a6, 513 15083 addi a5, a6, 50000 15084 15085 is assembled into the following: 15086 15087 .literal .L1, 50000 15088 mov.n a5, a6 15089 addmi a5, a6, 0x200 15090 addmi a5, a6, 0x200 15091 addi a5, a5, 1 15092 l32r a5, .L1 15093 add a5, a6, a5 15094 15095 15096 File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent 15097 15098 8.34.5 Directives 15099 ----------------- 15100 15101 The Xtensa assember supports a region-based directive syntax: 15102 15103 .begin DIRECTIVE [OPTIONS] 15104 ... 15105 .end DIRECTIVE 15106 15107 All the Xtensa-specific directives that apply to a region of code use 15108 this syntax. 15109 15110 The directive applies to code between the `.begin' and the `.end'. 15111 The state of the option after the `.end' reverts to what it was before 15112 the `.begin'. A nested `.begin'/`.end' region can further change the 15113 state of the directive without having to be aware of its outer state. 15114 For example, consider: 15115 15116 .begin no-transform 15117 L: add a0, a1, a2 15118 .begin transform 15119 M: add a0, a1, a2 15120 .end transform 15121 N: add a0, a1, a2 15122 .end no-transform 15123 15124 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region 15125 both result in `ADD' machine instructions, but the assembler selects an 15126 `ADD.N' instruction for the `ADD' at `M' in the inner `transform' 15127 region. 15128 15129 The advantage of this style is that it works well inside macros 15130 which can preserve the context of their callers. 15131 15132 The following directives are available: 15133 15134 * Menu: 15135 15136 * Schedule Directive:: Enable instruction scheduling. 15137 * Longcalls Directive:: Use Indirect Calls for Greater Range. 15138 * Transform Directive:: Disable All Assembler Transformations. 15139 * Literal Directive:: Intermix Literals with Instructions. 15140 * Literal Position Directive:: Specify Inline Literal Pool Locations. 15141 * Literal Prefix Directive:: Specify Literal Section Name Prefix. 15142 * Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals. 15143 15144 15145 File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives 15146 15147 8.34.5.1 schedule 15148 ................. 15149 15150 The `schedule' directive is recognized only for compatibility with 15151 Tensilica's assembler. 15152 15153 .begin [no-]schedule 15154 .end [no-]schedule 15155 15156 This directive is ignored and has no effect on `as'. 15157 15158 15159 File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives 15160 15161 8.34.5.2 longcalls 15162 .................. 15163 15164 The `longcalls' directive enables or disables function call relaxation. 15165 *Note Function Call Relaxation: Xtensa Call Relaxation. 15166 15167 .begin [no-]longcalls 15168 .end [no-]longcalls 15169 15170 Call relaxation is disabled by default unless the `--longcalls' 15171 command-line option is specified. The `longcalls' directive overrides 15172 the default determined by the command-line options. 15173 15174 15175 File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives 15176 15177 8.34.5.3 transform 15178 .................. 15179 15180 This directive enables or disables all assembler transformation, 15181 including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and 15182 optimization (*note Xtensa Optimizations: Xtensa Optimizations.). 15183 15184 .begin [no-]transform 15185 .end [no-]transform 15186 15187 Transformations are enabled by default unless the `--no-transform' 15188 option is used. The `transform' directive overrides the default 15189 determined by the command-line options. An underscore opcode prefix, 15190 disabling transformation of that opcode, always takes precedence over 15191 both directives and command-line flags. 15192 15193 15194 File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives 15195 15196 8.34.5.4 literal 15197 ................ 15198 15199 The `.literal' directive is used to define literal pool data, i.e., 15200 read-only 32-bit data accessed via `L32R' instructions. 15201 15202 .literal LABEL, VALUE[, VALUE...] 15203 15204 This directive is similar to the standard `.word' directive, except 15205 that the actual location of the literal data is determined by the 15206 assembler and linker, not by the position of the `.literal' directive. 15207 Using this directive gives the assembler freedom to locate the literal 15208 data in the most appropriate place and possibly to combine identical 15209 literals. For example, the code: 15210 15211 entry sp, 40 15212 .literal .L1, sym 15213 l32r a4, .L1 15214 15215 can be used to load a pointer to the symbol `sym' into register 15216 `a4'. The value of `sym' will not be placed between the `ENTRY' and 15217 `L32R' instructions; instead, the assembler puts the data in a literal 15218 pool. 15219 15220 Literal pools for absolute mode `L32R' instructions (*note Absolute 15221 Literals Directive::) are placed in a separate `.lit4' section. By 15222 default literal pools for PC-relative mode `L32R' instructions are 15223 placed in a separate `.literal' section; however, when using the 15224 `--text-section-literals' option (*note Command Line Options: Xtensa 15225 Options.), the literal pools are placed in the current section. These 15226 text section literal pools are created automatically before `ENTRY' 15227 instructions and manually after `.literal_position' directives (*note 15228 literal_position: Literal Position Directive.). If there are no 15229 preceding `ENTRY' instructions, explicit `.literal_position' directives 15230 must be used to place the text section literal pools; otherwise, `as' 15231 will report an error. 15232 15233 15234 File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives 15235 15236 8.34.5.5 literal_position 15237 ......................... 15238 15239 When using `--text-section-literals' to place literals inline in the 15240 section being assembled, the `.literal_position' directive can be used 15241 to mark a potential location for a literal pool. 15242 15243 .literal_position 15244 15245 The `.literal_position' directive is ignored when the 15246 `--text-section-literals' option is not used or when `L32R' 15247 instructions use the absolute addressing mode. 15248 15249 The assembler will automatically place text section literal pools 15250 before `ENTRY' instructions, so the `.literal_position' directive is 15251 only needed to specify some other location for a literal pool. You may 15252 need to add an explicit jump instruction to skip over an inline literal 15253 pool. 15254 15255 For example, an interrupt vector does not begin with an `ENTRY' 15256 instruction so the assembler will be unable to automatically find a good 15257 place to put a literal pool. Moreover, the code for the interrupt 15258 vector must be at a specific starting address, so the literal pool 15259 cannot come before the start of the code. The literal pool for the 15260 vector must be explicitly positioned in the middle of the vector (before 15261 any uses of the literals, due to the negative offsets used by 15262 PC-relative `L32R' instructions). The `.literal_position' directive 15263 can be used to do this. In the following code, the literal for `M' 15264 will automatically be aligned correctly and is placed after the 15265 unconditional jump. 15266 15267 .global M 15268 code_start: 15269 j continue 15270 .literal_position 15271 .align 4 15272 continue: 15273 movi a4, M 15274 15275 15276 File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives 15277 15278 8.34.5.6 literal_prefix 15279 ....................... 15280 15281 The `literal_prefix' directive allows you to specify different sections 15282 to hold literals from different portions of an assembly file. With 15283 this directive, a single assembly file can be used to generate code 15284 into multiple sections, including literals generated by the assembler. 15285 15286 .begin literal_prefix [NAME] 15287 .end literal_prefix 15288 15289 By default the assembler places literal pools in sections separate 15290 from the instructions, using the default literal section names of 15291 `.literal' for PC-relative mode `L32R' instructions and `.lit4' for 15292 absolute mode `L32R' instructions (*note Absolute Literals 15293 Directive::). The `literal_prefix' directive causes different literal 15294 sections to be used for the code inside the delimited region. The new 15295 literal sections are determined by including NAME as a prefix to the 15296 default literal section names. If the NAME argument is omitted, the 15297 literal sections revert to the defaults. This directive has no effect 15298 when using the `--text-section-literals' option (*note Command Line 15299 Options: Xtensa Options.). 15300 15301 Except for two special cases, the assembler determines the new 15302 literal sections by simply prepending NAME to the default section names, 15303 resulting in `NAME.literal' and `NAME.lit4' sections. The 15304 `literal_prefix' directive is often used with the name of the current 15305 text section as the prefix argument. To facilitate this usage, the 15306 assembler uses special case rules when it recognizes NAME as a text 15307 section name. First, if NAME ends with `.text', that suffix is not 15308 included in the literal section name. For example, if NAME is 15309 `.iram0.text', then the literal sections will be `.iram0.literal' and 15310 `.iram0.lit4'. Second, if NAME begins with `.gnu.linkonce.t.', then 15311 the literal section names are formed by replacing the `.t' substring 15312 with `.literal' and `.lit4'. For example, if NAME is 15313 `.gnu.linkonce.t.func', the literal sections will be 15314 `.gnu.linkonce.literal.func' and `.gnu.linkonce.lit4.func'. 15315 15316 15317 File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives 15318 15319 8.34.5.7 absolute-literals 15320 .......................... 15321 15322 The `absolute-literals' and `no-absolute-literals' directives control 15323 the absolute vs. PC-relative mode for `L32R' instructions. These are 15324 relevant only for Xtensa configurations that include the absolute 15325 addressing option for `L32R' instructions. 15326 15327 .begin [no-]absolute-literals 15328 .end [no-]absolute-literals 15329 15330 These directives do not change the `L32R' mode--they only cause the 15331 assembler to emit the appropriate kind of relocation for `L32R' 15332 instructions and to place the literal values in the appropriate section. 15333 To change the `L32R' mode, the program must write the `LITBASE' special 15334 register. It is the programmer's responsibility to keep track of the 15335 mode and indicate to the assembler which mode is used in each region of 15336 code. 15337 15338 If the Xtensa configuration includes the absolute `L32R' addressing 15339 option, the default is to assume absolute `L32R' addressing unless the 15340 `--no-absolute-literals' command-line option is specified. Otherwise, 15341 the default is to assume PC-relative `L32R' addressing. The 15342 `absolute-literals' directive can then be used to override the default 15343 determined by the command-line options. 15344 15345 15346 File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top 15347 15348 9 Reporting Bugs 15349 **************** 15350 15351 Your bug reports play an essential role in making `as' reliable. 15352 15353 Reporting a bug may help you by bringing a solution to your problem, 15354 or it may not. But in any case the principal function of a bug report 15355 is to help the entire community by making the next version of `as' work 15356 better. Bug reports are your contribution to the maintenance of `as'. 15357 15358 In order for a bug report to serve its purpose, you must include the 15359 information that enables us to fix the bug. 15360 15361 * Menu: 15362 15363 * Bug Criteria:: Have you found a bug? 15364 * Bug Reporting:: How to report bugs 15365 15366 15367 File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs 15368 15369 9.1 Have You Found a Bug? 15370 ========================= 15371 15372 If you are not sure whether you have found a bug, here are some 15373 guidelines: 15374 15375 * If the assembler gets a fatal signal, for any input whatever, that 15376 is a `as' bug. Reliable assemblers never crash. 15377 15378 * If `as' produces an error message for valid input, that is a bug. 15379 15380 * If `as' does not produce an error message for invalid input, that 15381 is a bug. However, you should note that your idea of "invalid 15382 input" might be our idea of "an extension" or "support for 15383 traditional practice". 15384 15385 * If you are an experienced user of assemblers, your suggestions for 15386 improvement of `as' are welcome in any case. 15387 15388 15389 File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs 15390 15391 9.2 How to Report Bugs 15392 ====================== 15393 15394 A number of companies and individuals offer support for GNU products. 15395 If you obtained `as' from a support organization, we recommend you 15396 contact that organization first. 15397 15398 You can find contact information for many support companies and 15399 individuals in the file `etc/SERVICE' in the GNU Emacs distribution. 15400 15401 In any event, we also recommend that you send bug reports for `as' 15402 to `bug-binutils (a] gnu.org'. 15403 15404 The fundamental principle of reporting bugs usefully is this: 15405 *report all the facts*. If you are not sure whether to state a fact or 15406 leave it out, state it! 15407 15408 Often people omit facts because they think they know what causes the 15409 problem and assume that some details do not matter. Thus, you might 15410 assume that the name of a symbol you use in an example does not matter. 15411 Well, probably it does not, but one cannot be sure. Perhaps the bug 15412 is a stray memory reference which happens to fetch from the location 15413 where that name is stored in memory; perhaps, if the name were 15414 different, the contents of that location would fool the assembler into 15415 doing the right thing despite the bug. Play it safe and give a 15416 specific, complete example. That is the easiest thing for you to do, 15417 and the most helpful. 15418 15419 Keep in mind that the purpose of a bug report is to enable us to fix 15420 the bug if it is new to us. Therefore, always write your bug reports 15421 on the assumption that the bug has not been reported previously. 15422 15423 Sometimes people give a few sketchy facts and ask, "Does this ring a 15424 bell?" This cannot help us fix a bug, so it is basically useless. We 15425 respond by asking for enough details to enable us to investigate. You 15426 might as well expedite matters by sending them to begin with. 15427 15428 To enable us to fix the bug, you should include all these things: 15429 15430 * The version of `as'. `as' announces it if you start it with the 15431 `--version' argument. 15432 15433 Without this, we will not know whether there is any point in 15434 looking for the bug in the current version of `as'. 15435 15436 * Any patches you may have applied to the `as' source. 15437 15438 * The type of machine you are using, and the operating system name 15439 and version number. 15440 15441 * What compiler (and its version) was used to compile `as'--e.g. 15442 "`gcc-2.7'". 15443 15444 * The command arguments you gave the assembler to assemble your 15445 example and observe the bug. To guarantee you will not omit 15446 something important, list them all. A copy of the Makefile (or 15447 the output from make) is sufficient. 15448 15449 If we were to try to guess the arguments, we would probably guess 15450 wrong and then we might not encounter the bug. 15451 15452 * A complete input file that will reproduce the bug. If the bug is 15453 observed when the assembler is invoked via a compiler, send the 15454 assembler source, not the high level language source. Most 15455 compilers will produce the assembler source when run with the `-S' 15456 option. If you are using `gcc', use the options `-v 15457 --save-temps'; this will save the assembler source in a file with 15458 an extension of `.s', and also show you exactly how `as' is being 15459 run. 15460 15461 * A description of what behavior you observe that you believe is 15462 incorrect. For example, "It gets a fatal signal." 15463 15464 Of course, if the bug is that `as' gets a fatal signal, then we 15465 will certainly notice it. But if the bug is incorrect output, we 15466 might not notice unless it is glaringly wrong. You might as well 15467 not give us a chance to make a mistake. 15468 15469 Even if the problem you experience is a fatal signal, you should 15470 still say so explicitly. Suppose something strange is going on, 15471 such as, your copy of `as' is out of synch, or you have 15472 encountered a bug in the C library on your system. (This has 15473 happened!) Your copy might crash and ours would not. If you told 15474 us to expect a crash, then when ours fails to crash, we would know 15475 that the bug was not happening for us. If you had not told us to 15476 expect a crash, then we would not be able to draw any conclusion 15477 from our observations. 15478 15479 * If you wish to suggest changes to the `as' source, send us context 15480 diffs, as generated by `diff' with the `-u', `-c', or `-p' option. 15481 Always send diffs from the old file to the new file. If you even 15482 discuss something in the `as' source, refer to it by context, not 15483 by line number. 15484 15485 The line numbers in our development sources will not match those 15486 in your sources. Your line numbers would convey no useful 15487 information to us. 15488 15489 Here are some things that are not necessary: 15490 15491 * A description of the envelope of the bug. 15492 15493 Often people who encounter a bug spend a lot of time investigating 15494 which changes to the input file will make the bug go away and which 15495 changes will not affect it. 15496 15497 This is often time consuming and not very useful, because the way 15498 we will find the bug is by running a single example under the 15499 debugger with breakpoints, not by pure deduction from a series of 15500 examples. We recommend that you save your time for something else. 15501 15502 Of course, if you can find a simpler example to report _instead_ 15503 of the original one, that is a convenience for us. Errors in the 15504 output will be easier to spot, running under the debugger will take 15505 less time, and so on. 15506 15507 However, simplification is not vital; if you do not want to do 15508 this, report the bug anyway and send us the entire test case you 15509 used. 15510 15511 * A patch for the bug. 15512 15513 A patch for the bug does help us if it is a good one. But do not 15514 omit the necessary information, such as the test case, on the 15515 assumption that a patch is all we need. We might see problems 15516 with your patch and decide to fix the problem another way, or we 15517 might not understand it at all. 15518 15519 Sometimes with a program as complicated as `as' it is very hard to 15520 construct an example that will make the program follow a certain 15521 path through the code. If you do not send us the example, we will 15522 not be able to construct one, so we will not be able to verify 15523 that the bug is fixed. 15524 15525 And if we cannot understand what bug you are trying to fix, or why 15526 your patch should be an improvement, we will not install it. A 15527 test case will help us to understand. 15528 15529 * A guess about what the bug is or what it depends on. 15530 15531 Such guesses are usually wrong. Even we cannot guess right about 15532 such things without first using the debugger to find the facts. 15533 15534 15535 File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top 15536 15537 10 Acknowledgements 15538 ******************* 15539 15540 If you have contributed to GAS and your name isn't listed here, it is 15541 not meant as a slight. We just don't know about it. Send mail to the 15542 maintainer, and we'll correct the situation. Currently the maintainer 15543 is Ken Raeburn (email address `raeburn (a] cygnus.com'). 15544 15545 Dean Elsner wrote the original GNU assembler for the VAX.(1) 15546 15547 Jay Fenlason maintained GAS for a while, adding support for 15548 GDB-specific debug information and the 68k series machines, most of the 15549 preprocessing pass, and extensive changes in `messages.c', 15550 `input-file.c', `write.c'. 15551 15552 K. Richard Pixley maintained GAS for a while, adding various 15553 enhancements and many bug fixes, including merging support for several 15554 processors, breaking GAS up to handle multiple object file format back 15555 ends (including heavy rewrite, testing, an integration of the coff and 15556 b.out back ends), adding configuration including heavy testing and 15557 verification of cross assemblers and file splits and renaming, 15558 converted GAS to strictly ANSI C including full prototypes, added 15559 support for m680[34]0 and cpu32, did considerable work on i960 15560 including a COFF port (including considerable amounts of reverse 15561 engineering), a SPARC opcode file rewrite, DECstation, rs6000, and 15562 hp300hpux host ports, updated "know" assertions and made them work, 15563 much other reorganization, cleanup, and lint. 15564 15565 Ken Raeburn wrote the high-level BFD interface code to replace most 15566 of the code in format-specific I/O modules. 15567 15568 The original VMS support was contributed by David L. Kashtan. Eric 15569 Youngdale has done much work with it since. 15570 15571 The Intel 80386 machine description was written by Eliot Dresselhaus. 15572 15573 Minh Tran-Le at IntelliCorp contributed some AIX 386 support. 15574 15575 The Motorola 88k machine description was contributed by Devon Bowen 15576 of Buffalo University and Torbjorn Granlund of the Swedish Institute of 15577 Computer Science. 15578 15579 Keith Knowles at the Open Software Foundation wrote the original 15580 MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format 15581 support (which hasn't been merged in yet). Ralph Campbell worked with 15582 the MIPS code to support a.out format. 15583 15584 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k, 15585 tc-h8300), and IEEE 695 object file format (obj-ieee), was written by 15586 Steve Chamberlain of Cygnus Support. Steve also modified the COFF back 15587 end to use BFD for some low-level operations, for use with the H8/300 15588 and AMD 29k targets. 15589 15590 John Gilmore built the AMD 29000 support, added `.include' support, 15591 and simplified the configuration of which versions accept which 15592 directives. He updated the 68k machine description so that Motorola's 15593 opcodes always produced fixed-size instructions (e.g., `jsr'), while 15594 synthetic instructions remained shrinkable (`jbsr'). John fixed many 15595 bugs, including true tested cross-compilation support, and one bug in 15596 relaxation that took a week and required the proverbial one-bit fix. 15597 15598 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT 15599 syntax for the 68k, completed support for some COFF targets (68k, i386 15600 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, 15601 wrote the initial RS/6000 and PowerPC assembler, and made a few other 15602 minor patches. 15603 15604 Steve Chamberlain made GAS able to generate listings. 15605 15606 Hewlett-Packard contributed support for the HP9000/300. 15607 15608 Jeff Law wrote GAS and BFD support for the native HPPA object format 15609 (SOM) along with a fairly extensive HPPA testsuite (for both SOM and 15610 ELF object formats). This work was supported by both the Center for 15611 Software Science at the University of Utah and Cygnus Support. 15612 15613 Support for ELF format files has been worked on by Mark Eichin of 15614 Cygnus Support (original, incomplete implementation for SPARC), Pete 15615 Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), 15616 Michael Meissner of the Open Software Foundation (i386 mainly), and Ken 15617 Raeburn of Cygnus Support (sparc, and some initial 64-bit support). 15618 15619 Linas Vepstas added GAS support for the ESA/390 "IBM 370" 15620 architecture. 15621 15622 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote 15623 GAS and BFD support for openVMS/Alpha. 15624 15625 Timothy Wall, Michael Hayes, and Greg Smart contributed to the 15626 various tic* flavors. 15627 15628 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from 15629 Tensilica, Inc. added support for Xtensa processors. 15630 15631 Several engineers at Cygnus Support have also provided many small 15632 bug fixes and configuration enhancements. 15633 15634 Many others have contributed large or small bugfixes and 15635 enhancements. If you have contributed significant work and are not 15636 mentioned on this list, and want to be, let us know. Some of the 15637 history has been lost; we are not intentionally leaving anyone out. 15638 15639 ---------- Footnotes ---------- 15640 15641 (1) Any more details? 15642 15643 15644 File: as.info, Node: GNU Free Documentation License, Next: Index, Prev: Acknowledgements, Up: Top 15645 15646 Appendix A GNU Free Documentation License 15647 ***************************************** 15648 15649 Version 1.1, March 2000 15650 15651 Copyright (C) 2000, 2003 Free Software Foundation, Inc. 15652 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 15653 15654 Everyone is permitted to copy and distribute verbatim copies 15655 of this license document, but changing it is not allowed. 15656 15657 15658 0. PREAMBLE 15659 15660 The purpose of this License is to make a manual, textbook, or other 15661 written document "free" in the sense of freedom: to assure everyone 15662 the effective freedom to copy and redistribute it, with or without 15663 modifying it, either commercially or noncommercially. Secondarily, 15664 this License preserves for the author and publisher a way to get 15665 credit for their work, while not being considered responsible for 15666 modifications made by others. 15667 15668 This License is a kind of "copyleft", which means that derivative 15669 works of the document must themselves be free in the same sense. 15670 It complements the GNU General Public License, which is a copyleft 15671 license designed for free software. 15672 15673 We have designed this License in order to use it for manuals for 15674 free software, because free software needs free documentation: a 15675 free program should come with manuals providing the same freedoms 15676 that the software does. But this License is not limited to 15677 software manuals; it can be used for any textual work, regardless 15678 of subject matter or whether it is published as a printed book. 15679 We recommend this License principally for works whose purpose is 15680 instruction or reference. 15681 15682 15683 1. APPLICABILITY AND DEFINITIONS 15684 15685 This License applies to any manual or other work that contains a 15686 notice placed by the copyright holder saying it can be distributed 15687 under the terms of this License. The "Document", below, refers to 15688 any such manual or work. Any member of the public is a licensee, 15689 and is addressed as "you." 15690 15691 A "Modified Version" of the Document means any work containing the 15692 Document or a portion of it, either copied verbatim, or with 15693 modifications and/or translated into another language. 15694 15695 A "Secondary Section" is a named appendix or a front-matter 15696 section of the Document that deals exclusively with the 15697 relationship of the publishers or authors of the Document to the 15698 Document's overall subject (or to related matters) and contains 15699 nothing that could fall directly within that overall subject. 15700 (For example, if the Document is in part a textbook of 15701 mathematics, a Secondary Section may not explain any mathematics.) 15702 The relationship could be a matter of historical connection with 15703 the subject or with related matters, or of legal, commercial, 15704 philosophical, ethical or political position regarding them. 15705 15706 The "Invariant Sections" are certain Secondary Sections whose 15707 titles are designated, as being those of Invariant Sections, in 15708 the notice that says that the Document is released under this 15709 License. 15710 15711 The "Cover Texts" are certain short passages of text that are 15712 listed, as Front-Cover Texts or Back-Cover Texts, in the notice 15713 that says that the Document is released under this License. 15714 15715 A "Transparent" copy of the Document means a machine-readable copy, 15716 represented in a format whose specification is available to the 15717 general public, whose contents can be viewed and edited directly 15718 and straightforwardly with generic text editors or (for images 15719 composed of pixels) generic paint programs or (for drawings) some 15720 widely available drawing editor, and that is suitable for input to 15721 text formatters or for automatic translation to a variety of 15722 formats suitable for input to text formatters. A copy made in an 15723 otherwise Transparent file format whose markup has been designed 15724 to thwart or discourage subsequent modification by readers is not 15725 Transparent. A copy that is not "Transparent" is called "Opaque." 15726 15727 Examples of suitable formats for Transparent copies include plain 15728 ASCII without markup, Texinfo input format, LaTeX input format, 15729 SGML or XML using a publicly available DTD, and 15730 standard-conforming simple HTML designed for human modification. 15731 Opaque formats include PostScript, PDF, proprietary formats that 15732 can be read and edited only by proprietary word processors, SGML 15733 or XML for which the DTD and/or processing tools are not generally 15734 available, and the machine-generated HTML produced by some word 15735 processors for output purposes only. 15736 15737 The "Title Page" means, for a printed book, the title page itself, 15738 plus such following pages as are needed to hold, legibly, the 15739 material this License requires to appear in the title page. For 15740 works in formats which do not have any title page as such, "Title 15741 Page" means the text near the most prominent appearance of the 15742 work's title, preceding the beginning of the body of the text. 15743 15744 2. VERBATIM COPYING 15745 15746 You may copy and distribute the Document in any medium, either 15747 commercially or noncommercially, provided that this License, the 15748 copyright notices, and the license notice saying this License 15749 applies to the Document are reproduced in all copies, and that you 15750 add no other conditions whatsoever to those of this License. You 15751 may not use technical measures to obstruct or control the reading 15752 or further copying of the copies you make or distribute. However, 15753 you may accept compensation in exchange for copies. If you 15754 distribute a large enough number of copies you must also follow 15755 the conditions in section 3. 15756 15757 You may also lend copies, under the same conditions stated above, 15758 and you may publicly display copies. 15759 15760 3. COPYING IN QUANTITY 15761 15762 If you publish printed copies of the Document numbering more than 15763 100, and the Document's license notice requires Cover Texts, you 15764 must enclose the copies in covers that carry, clearly and legibly, 15765 all these Cover Texts: Front-Cover Texts on the front cover, and 15766 Back-Cover Texts on the back cover. Both covers must also clearly 15767 and legibly identify you as the publisher of these copies. The 15768 front cover must present the full title with all words of the 15769 title equally prominent and visible. You may add other material 15770 on the covers in addition. Copying with changes limited to the 15771 covers, as long as they preserve the title of the Document and 15772 satisfy these conditions, can be treated as verbatim copying in 15773 other respects. 15774 15775 If the required texts for either cover are too voluminous to fit 15776 legibly, you should put the first ones listed (as many as fit 15777 reasonably) on the actual cover, and continue the rest onto 15778 adjacent pages. 15779 15780 If you publish or distribute Opaque copies of the Document 15781 numbering more than 100, you must either include a 15782 machine-readable Transparent copy along with each Opaque copy, or 15783 state in or with each Opaque copy a publicly-accessible 15784 computer-network location containing a complete Transparent copy 15785 of the Document, free of added material, which the general 15786 network-using public has access to download anonymously at no 15787 charge using public-standard network protocols. If you use the 15788 latter option, you must take reasonably prudent steps, when you 15789 begin distribution of Opaque copies in quantity, to ensure that 15790 this Transparent copy will remain thus accessible at the stated 15791 location until at least one year after the last time you 15792 distribute an Opaque copy (directly or through your agents or 15793 retailers) of that edition to the public. 15794 15795 It is requested, but not required, that you contact the authors of 15796 the Document well before redistributing any large number of 15797 copies, to give them a chance to provide you with an updated 15798 version of the Document. 15799 15800 4. MODIFICATIONS 15801 15802 You may copy and distribute a Modified Version of the Document 15803 under the conditions of sections 2 and 3 above, provided that you 15804 release the Modified Version under precisely this License, with 15805 the Modified Version filling the role of the Document, thus 15806 licensing distribution and modification of the Modified Version to 15807 whoever possesses a copy of it. In addition, you must do these 15808 things in the Modified Version: 15809 15810 A. Use in the Title Page (and on the covers, if any) a title 15811 distinct from that of the Document, and from those of previous 15812 versions (which should, if there were any, be listed in the 15813 History section of the Document). You may use the same title 15814 as a previous version if the original publisher of that version 15815 gives permission. 15816 B. List on the Title Page, as authors, one or more persons or 15817 entities responsible for authorship of the modifications in the 15818 Modified Version, together with at least five of the principal 15819 authors of the Document (all of its principal authors, if it 15820 has less than five). 15821 C. State on the Title page the name of the publisher of the 15822 Modified Version, as the publisher. 15823 D. Preserve all the copyright notices of the Document. 15824 E. Add an appropriate copyright notice for your modifications 15825 adjacent to the other copyright notices. 15826 F. Include, immediately after the copyright notices, a license 15827 notice giving the public permission to use the Modified Version 15828 under the terms of this License, in the form shown in the 15829 Addendum below. 15830 G. Preserve in that license notice the full lists of Invariant 15831 Sections and required Cover Texts given in the Document's 15832 license notice. 15833 H. Include an unaltered copy of this License. 15834 I. Preserve the section entitled "History", and its title, and add 15835 to it an item stating at least the title, year, new authors, and 15836 publisher of the Modified Version as given on the Title Page. 15837 If there is no section entitled "History" in the Document, 15838 create one stating the title, year, authors, and publisher of 15839 the Document as given on its Title Page, then add an item 15840 describing the Modified Version as stated in the previous 15841 sentence. 15842 J. Preserve the network location, if any, given in the Document for 15843 public access to a Transparent copy of the Document, and 15844 likewise the network locations given in the Document for 15845 previous versions it was based on. These may be placed in the 15846 "History" section. You may omit a network location for a work 15847 that was published at least four years before the Document 15848 itself, or if the original publisher of the version it refers 15849 to gives permission. 15850 K. In any section entitled "Acknowledgements" or "Dedications", 15851 preserve the section's title, and preserve in the section all the 15852 substance and tone of each of the contributor acknowledgements 15853 and/or dedications given therein. 15854 L. Preserve all the Invariant Sections of the Document, 15855 unaltered in their text and in their titles. Section numbers 15856 or the equivalent are not considered part of the section titles. 15857 M. Delete any section entitled "Endorsements." Such a section 15858 may not be included in the Modified Version. 15859 N. Do not retitle any existing section as "Endorsements" or to 15860 conflict in title with any Invariant Section. 15861 15862 If the Modified Version includes new front-matter sections or 15863 appendices that qualify as Secondary Sections and contain no 15864 material copied from the Document, you may at your option 15865 designate some or all of these sections as invariant. To do this, 15866 add their titles to the list of Invariant Sections in the Modified 15867 Version's license notice. These titles must be distinct from any 15868 other section titles. 15869 15870 You may add a section entitled "Endorsements", provided it contains 15871 nothing but endorsements of your Modified Version by various 15872 parties-for example, statements of peer review or that the text has 15873 been approved by an organization as the authoritative definition 15874 of a standard. 15875 15876 You may add a passage of up to five words as a Front-Cover Text, 15877 and a passage of up to 25 words as a Back-Cover Text, to the end 15878 of the list of Cover Texts in the Modified Version. Only one 15879 passage of Front-Cover Text and one of Back-Cover Text may be 15880 added by (or through arrangements made by) any one entity. If the 15881 Document already includes a cover text for the same cover, 15882 previously added by you or by arrangement made by the same entity 15883 you are acting on behalf of, you may not add another; but you may 15884 replace the old one, on explicit permission from the previous 15885 publisher that added the old one. 15886 15887 The author(s) and publisher(s) of the Document do not by this 15888 License give permission to use their names for publicity for or to 15889 assert or imply endorsement of any Modified Version. 15890 15891 5. COMBINING DOCUMENTS 15892 15893 You may combine the Document with other documents released under 15894 this License, under the terms defined in section 4 above for 15895 modified versions, provided that you include in the combination 15896 all of the Invariant Sections of all of the original documents, 15897 unmodified, and list them all as Invariant Sections of your 15898 combined work in its license notice. 15899 15900 The combined work need only contain one copy of this License, and 15901 multiple identical Invariant Sections may be replaced with a single 15902 copy. If there are multiple Invariant Sections with the same name 15903 but different contents, make the title of each such section unique 15904 by adding at the end of it, in parentheses, the name of the 15905 original author or publisher of that section if known, or else a 15906 unique number. Make the same adjustment to the section titles in 15907 the list of Invariant Sections in the license notice of the 15908 combined work. 15909 15910 In the combination, you must combine any sections entitled 15911 "History" in the various original documents, forming one section 15912 entitled "History"; likewise combine any sections entitled 15913 "Acknowledgements", and any sections entitled "Dedications." You 15914 must delete all sections entitled "Endorsements." 15915 15916 6. COLLECTIONS OF DOCUMENTS 15917 15918 You may make a collection consisting of the Document and other 15919 documents released under this License, and replace the individual 15920 copies of this License in the various documents with a single copy 15921 that is included in the collection, provided that you follow the 15922 rules of this License for verbatim copying of each of the 15923 documents in all other respects. 15924 15925 You may extract a single document from such a collection, and 15926 distribute it individually under this License, provided you insert 15927 a copy of this License into the extracted document, and follow 15928 this License in all other respects regarding verbatim copying of 15929 that document. 15930 15931 7. AGGREGATION WITH INDEPENDENT WORKS 15932 15933 A compilation of the Document or its derivatives with other 15934 separate and independent documents or works, in or on a volume of 15935 a storage or distribution medium, does not as a whole count as a 15936 Modified Version of the Document, provided no compilation 15937 copyright is claimed for the compilation. Such a compilation is 15938 called an "aggregate", and this License does not apply to the 15939 other self-contained works thus compiled with the Document, on 15940 account of their being thus compiled, if they are not themselves 15941 derivative works of the Document. 15942 15943 If the Cover Text requirement of section 3 is applicable to these 15944 copies of the Document, then if the Document is less than one 15945 quarter of the entire aggregate, the Document's Cover Texts may be 15946 placed on covers that surround only the Document within the 15947 aggregate. Otherwise they must appear on covers around the whole 15948 aggregate. 15949 15950 8. TRANSLATION 15951 15952 Translation is considered a kind of modification, so you may 15953 distribute translations of the Document under the terms of section 15954 4. Replacing Invariant Sections with translations requires special 15955 permission from their copyright holders, but you may include 15956 translations of some or all Invariant Sections in addition to the 15957 original versions of these Invariant Sections. You may include a 15958 translation of this License provided that you also include the 15959 original English version of this License. In case of a 15960 disagreement between the translation and the original English 15961 version of this License, the original English version will prevail. 15962 15963 9. TERMINATION 15964 15965 You may not copy, modify, sublicense, or distribute the Document 15966 except as expressly provided for under this License. Any other 15967 attempt to copy, modify, sublicense or distribute the Document is 15968 void, and will automatically terminate your rights under this 15969 License. However, parties who have received copies, or rights, 15970 from you under this License will not have their licenses 15971 terminated so long as such parties remain in full compliance. 15972 15973 10. FUTURE REVISIONS OF THIS LICENSE 15974 15975 The Free Software Foundation may publish new, revised versions of 15976 the GNU Free Documentation License from time to time. Such new 15977 versions will be similar in spirit to the present version, but may 15978 differ in detail to address new problems or concerns. See 15979 http://www.gnu.org/copyleft/. 15980 15981 Each version of the License is given a distinguishing version 15982 number. If the Document specifies that a particular numbered 15983 version of this License "or any later version" applies to it, you 15984 have the option of following the terms and conditions either of 15985 that specified version or of any later version that has been 15986 published (not as a draft) by the Free Software Foundation. If 15987 the Document does not specify a version number of this License, 15988 you may choose any version ever published (not as a draft) by the 15989 Free Software Foundation. 15990 15991 15992 ADDENDUM: How to use this License for your documents 15993 ==================================================== 15994 15995 To use this License in a document you have written, include a copy of 15996 the License in the document and put the following copyright and license 15997 notices just after the title page: 15998 15999 Copyright (C) YEAR YOUR NAME. 16000 Permission is granted to copy, distribute and/or modify this document 16001 under the terms of the GNU Free Documentation License, Version 1.1 16002 or any later version published by the Free Software Foundation; 16003 with the Invariant Sections being LIST THEIR TITLES, with the 16004 Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. 16005 A copy of the license is included in the section entitled "GNU 16006 Free Documentation License." 16007 16008 If you have no Invariant Sections, write "with no Invariant Sections" 16009 instead of saying which ones are invariant. If you have no Front-Cover 16010 Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being 16011 LIST"; likewise for Back-Cover Texts. 16012 16013 If your document contains nontrivial examples of program code, we 16014 recommend releasing these examples in parallel under your choice of 16015 free software license, such as the GNU General Public License, to 16016 permit their use in free software. 16017 16018 16019 File: as.info, Node: Index, Prev: GNU Free Documentation License, Up: Top 16020 16021 Index 16022 ***** 16023 16024 [index] 16025 * Menu: 16026 16027 * #: Comments. (line 38) 16028 * #APP: Preprocessing. (line 27) 16029 * #NO_APP: Preprocessing. (line 27) 16030 * $ in symbol names <1>: SH64-Chars. (line 10) 16031 * $ in symbol names <2>: SH-Chars. (line 10) 16032 * $ in symbol names <3>: D30V-Chars. (line 63) 16033 * $ in symbol names: D10V-Chars. (line 46) 16034 * $a: ARM Mapping Symbols. (line 9) 16035 * $acos math builtin, TIC54X: TIC54X-Builtins. (line 10) 16036 * $asin math builtin, TIC54X: TIC54X-Builtins. (line 13) 16037 * $atan math builtin, TIC54X: TIC54X-Builtins. (line 16) 16038 * $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19) 16039 * $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22) 16040 * $cos math builtin, TIC54X: TIC54X-Builtins. (line 28) 16041 * $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25) 16042 * $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31) 16043 * $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34) 16044 * $d: ARM Mapping Symbols. (line 15) 16045 * $exp math builtin, TIC54X: TIC54X-Builtins. (line 37) 16046 * $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40) 16047 * $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26) 16048 * $floor math builtin, TIC54X: TIC54X-Builtins. (line 43) 16049 * $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47) 16050 * $int math builtin, TIC54X: TIC54X-Builtins. (line 50) 16051 * $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43) 16052 * $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34) 16053 * $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38) 16054 * $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47) 16055 * $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50) 16056 * $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30) 16057 * $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53) 16058 * $log math builtin, TIC54X: TIC54X-Builtins. (line 59) 16059 * $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56) 16060 * $max math builtin, TIC54X: TIC54X-Builtins. (line 62) 16061 * $min math builtin, TIC54X: TIC54X-Builtins. (line 65) 16062 * $pow math builtin, TIC54X: TIC54X-Builtins. (line 68) 16063 * $round math builtin, TIC54X: TIC54X-Builtins. (line 71) 16064 * $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74) 16065 * $sin math builtin, TIC54X: TIC54X-Builtins. (line 77) 16066 * $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80) 16067 * $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83) 16068 * $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57) 16069 * $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54) 16070 * $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23) 16071 * $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20) 16072 * $t: ARM Mapping Symbols. (line 12) 16073 * $tan math builtin, TIC54X: TIC54X-Builtins. (line 86) 16074 * $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89) 16075 * $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92) 16076 * -+ option, VAX/VMS: VAX-Opts. (line 71) 16077 * --: Command Line. (line 10) 16078 * --32 option, i386: i386-Options. (line 8) 16079 * --32 option, x86-64: i386-Options. (line 8) 16080 * --64 option, i386: i386-Options. (line 8) 16081 * --64 option, x86-64: i386-Options. (line 8) 16082 * --absolute-literals: Xtensa Options. (line 22) 16083 * --allow-reg-prefix: SH Options. (line 9) 16084 * --alternate: alternate. (line 6) 16085 * --base-size-default-16: M68K-Opts. (line 70) 16086 * --base-size-default-32: M68K-Opts. (line 70) 16087 * --big: SH Options. (line 9) 16088 * --bitwise-or option, M680x0: M68K-Opts. (line 63) 16089 * --disp-size-default-16: M68K-Opts. (line 79) 16090 * --disp-size-default-32: M68K-Opts. (line 79) 16091 * --divide option, i386: i386-Options. (line 24) 16092 * --dsp: SH Options. (line 9) 16093 * --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9) 16094 * --emulation=criself command line option, CRIS: CRIS-Opts. (line 9) 16095 * --enforce-aligned-data: Sparc-Aligned-Data. (line 11) 16096 * --fatal-warnings: W. (line 16) 16097 * --fixed-special-register-names command line option, MMIX: MMIX-Opts. 16098 (line 8) 16099 * --force-long-branchs: M68HC11-Opts. (line 69) 16100 * --generate-example: M68HC11-Opts. (line 86) 16101 * --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12) 16102 * --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16) 16103 * --hash-size=NUMBER: Overview. (line 297) 16104 * --linker-allocated-gregs command line option, MMIX: MMIX-Opts. 16105 (line 67) 16106 * --listing-cont-lines: listing. (line 33) 16107 * --listing-lhs-width: listing. (line 15) 16108 * --listing-lhs-width2: listing. (line 20) 16109 * --listing-rhs-width: listing. (line 27) 16110 * --little: SH Options. (line 9) 16111 * --longcalls: Xtensa Options. (line 36) 16112 * --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 33) 16113 * --MD: MD. (line 6) 16114 * --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 16115 * --no-absolute-literals: Xtensa Options. (line 22) 16116 * --no-expand command line option, MMIX: MMIX-Opts. (line 31) 16117 * --no-longcalls: Xtensa Options. (line 36) 16118 * --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36) 16119 * --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 16120 * --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22) 16121 * --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54) 16122 * --no-stubs command line option, MMIX: MMIX-Opts. (line 54) 16123 * --no-target-align: Xtensa Options. (line 29) 16124 * --no-text-section-literals: Xtensa Options. (line 9) 16125 * --no-transform: Xtensa Options. (line 45) 16126 * --no-underscore command line option, CRIS: CRIS-Opts. (line 15) 16127 * --no-warn: W. (line 11) 16128 * --pcrel: M68K-Opts. (line 91) 16129 * --pic command line option, CRIS: CRIS-Opts. (line 27) 16130 * --print-insn-syntax: M68HC11-Opts. (line 75) 16131 * --print-opcodes: M68HC11-Opts. (line 79) 16132 * --register-prefix-optional option, M680x0: M68K-Opts. (line 50) 16133 * --relax: SH Options. (line 9) 16134 * --relax command line option, MMIX: MMIX-Opts. (line 19) 16135 * --rename-section: Xtensa Options. (line 53) 16136 * --renesas: SH Options. (line 9) 16137 * --short-branchs: M68HC11-Opts. (line 54) 16138 * --small: SH Options. (line 9) 16139 * --statistics: statistics. (line 6) 16140 * --strict-direct-mode: M68HC11-Opts. (line 44) 16141 * --target-align: Xtensa Options. (line 29) 16142 * --text-section-literals: Xtensa Options. (line 9) 16143 * --traditional-format: traditional-format. (line 6) 16144 * --transform: Xtensa Options. (line 45) 16145 * --underscore command line option, CRIS: CRIS-Opts. (line 15) 16146 * --warn: W. (line 19) 16147 * -1 option, VAX/VMS: VAX-Opts. (line 77) 16148 * -32addr command line option, Alpha: Alpha Options. (line 50) 16149 * -a: a. (line 6) 16150 * -A options, i960: Options-i960. (line 6) 16151 * -ac: a. (line 6) 16152 * -ad: a. (line 6) 16153 * -ah: a. (line 6) 16154 * -al: a. (line 6) 16155 * -an: a. (line 6) 16156 * -as: a. (line 6) 16157 * -Asparclet: Sparc-Opts. (line 25) 16158 * -Asparclite: Sparc-Opts. (line 25) 16159 * -Av6: Sparc-Opts. (line 25) 16160 * -Av8: Sparc-Opts. (line 25) 16161 * -Av9: Sparc-Opts. (line 25) 16162 * -Av9a: Sparc-Opts. (line 25) 16163 * -b option, i960: Options-i960. (line 22) 16164 * -big option, M32R: M32R-Opts. (line 35) 16165 * -construct-floats: MIPS Opts. (line 157) 16166 * -D: D. (line 6) 16167 * -D, ignored on VAX: VAX-Opts. (line 11) 16168 * -d, VAX option: VAX-Opts. (line 16) 16169 * -eabi= command line option, ARM: ARM Options. (line 107) 16170 * -EB command line option, ARC: ARC Options. (line 31) 16171 * -EB command line option, ARM: ARM Options. (line 112) 16172 * -EB option (MIPS): MIPS Opts. (line 13) 16173 * -EB option, M32R: M32R-Opts. (line 39) 16174 * -EL command line option, ARC: ARC Options. (line 35) 16175 * -EL command line option, ARM: ARM Options. (line 116) 16176 * -EL option (MIPS): MIPS Opts. (line 13) 16177 * -EL option, M32R: M32R-Opts. (line 32) 16178 * -f: f. (line 6) 16179 * -F command line option, Alpha: Alpha Options. (line 50) 16180 * -G command line option, Alpha: Alpha Options. (line 46) 16181 * -g command line option, Alpha: Alpha Options. (line 40) 16182 * -G option (MIPS): MIPS Opts. (line 8) 16183 * -H option, VAX/VMS: VAX-Opts. (line 81) 16184 * -h option, VAX/VMS: VAX-Opts. (line 45) 16185 * -I PATH: I. (line 6) 16186 * -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87) 16187 * -Ip option, M32RX: M32R-Opts. (line 97) 16188 * -J, ignored on VAX: VAX-Opts. (line 27) 16189 * -K: K. (line 6) 16190 * -k command line option, ARM: ARM Options. (line 120) 16191 * -KPIC option, M32R: M32R-Opts. (line 42) 16192 * -L: L. (line 6) 16193 * -l option, M680x0: M68K-Opts. (line 38) 16194 * -little option, M32R: M32R-Opts. (line 27) 16195 * -M: M. (line 6) 16196 * -m11/03: PDP-11-Options. (line 140) 16197 * -m11/04: PDP-11-Options. (line 143) 16198 * -m11/05: PDP-11-Options. (line 146) 16199 * -m11/10: PDP-11-Options. (line 146) 16200 * -m11/15: PDP-11-Options. (line 149) 16201 * -m11/20: PDP-11-Options. (line 149) 16202 * -m11/21: PDP-11-Options. (line 152) 16203 * -m11/23: PDP-11-Options. (line 155) 16204 * -m11/24: PDP-11-Options. (line 155) 16205 * -m11/34: PDP-11-Options. (line 158) 16206 * -m11/34a: PDP-11-Options. (line 161) 16207 * -m11/35: PDP-11-Options. (line 164) 16208 * -m11/40: PDP-11-Options. (line 164) 16209 * -m11/44: PDP-11-Options. (line 167) 16210 * -m11/45: PDP-11-Options. (line 170) 16211 * -m11/50: PDP-11-Options. (line 170) 16212 * -m11/53: PDP-11-Options. (line 173) 16213 * -m11/55: PDP-11-Options. (line 170) 16214 * -m11/60: PDP-11-Options. (line 176) 16215 * -m11/70: PDP-11-Options. (line 170) 16216 * -m11/73: PDP-11-Options. (line 173) 16217 * -m11/83: PDP-11-Options. (line 173) 16218 * -m11/84: PDP-11-Options. (line 173) 16219 * -m11/93: PDP-11-Options. (line 173) 16220 * -m11/94: PDP-11-Options. (line 173) 16221 * -m16c option, M16C: M32C-Opts. (line 12) 16222 * -m32c option, M32C: M32C-Opts. (line 9) 16223 * -m32r option, M32R: M32R-Opts. (line 21) 16224 * -m32rx option, M32R2: M32R-Opts. (line 17) 16225 * -m32rx option, M32RX: M32R-Opts. (line 9) 16226 * -m68000 and related options: M68K-Opts. (line 103) 16227 * -m68hc11: M68HC11-Opts. (line 9) 16228 * -m68hc12: M68HC11-Opts. (line 14) 16229 * -m68hcs12: M68HC11-Opts. (line 21) 16230 * -m[no-]68851 command line option, M680x0: M68K-Opts. (line 20) 16231 * -m[no-]68881 command line option, M680x0: M68K-Opts. (line 20) 16232 * -m[no-]div command line option, M680x0: M68K-Opts. (line 20) 16233 * -m[no-]emac command line option, M680x0: M68K-Opts. (line 20) 16234 * -m[no-]float command line option, M680x0: M68K-Opts. (line 20) 16235 * -m[no-]mac command line option, M680x0: M68K-Opts. (line 20) 16236 * -m[no-]usp command line option, M680x0: M68K-Opts. (line 20) 16237 * -mall: PDP-11-Options. (line 26) 16238 * -mall-extensions: PDP-11-Options. (line 26) 16239 * -mapcs command line option, ARM: ARM Options. (line 80) 16240 * -mapcs-float command line option, ARM: ARM Options. (line 93) 16241 * -mapcs-reentrant command line option, ARM: ARM Options. (line 98) 16242 * -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6) 16243 * -march= command line option, ARM: ARM Options. (line 37) 16244 * -march= command line option, M680x0: M68K-Opts. (line 8) 16245 * -matpcs command line option, ARM: ARM Options. (line 85) 16246 * -mcis: PDP-11-Options. (line 32) 16247 * -mconstant-gp command line option, IA-64: IA-64 Options. (line 6) 16248 * -mCPU command line option, Alpha: Alpha Options. (line 6) 16249 * -mcpu option, cpu: TIC54X-Opts. (line 15) 16250 * -mcpu= command line option, ARM: ARM Options. (line 6) 16251 * -mcpu= command line option, M680x0: M68K-Opts. (line 13) 16252 * -mcsm: PDP-11-Options. (line 43) 16253 * -mdebug command line option, Alpha: Alpha Options. (line 25) 16254 * -me option, stderr redirect: TIC54X-Opts. (line 20) 16255 * -meis: PDP-11-Options. (line 46) 16256 * -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20) 16257 * -mf option, far-mode: TIC54X-Opts. (line 8) 16258 * -mf11: PDP-11-Options. (line 122) 16259 * -mfar-mode option, far-mode: TIC54X-Opts. (line 8) 16260 * -mfis: PDP-11-Options. (line 51) 16261 * -mfloat-abi= command line option, ARM: ARM Options. (line 102) 16262 * -mfp-11: PDP-11-Options. (line 56) 16263 * -mfpp: PDP-11-Options. (line 56) 16264 * -mfpu: PDP-11-Options. (line 56) 16265 * -mfpu= command line option, ARM: ARM Options. (line 52) 16266 * -mip2022 option, IP2K: IP2K-Opts. (line 14) 16267 * -mip2022ext option, IP2022: IP2K-Opts. (line 9) 16268 * -mj11: PDP-11-Options. (line 126) 16269 * -mka11: PDP-11-Options. (line 92) 16270 * -mkb11: PDP-11-Options. (line 95) 16271 * -mkd11a: PDP-11-Options. (line 98) 16272 * -mkd11b: PDP-11-Options. (line 101) 16273 * -mkd11d: PDP-11-Options. (line 104) 16274 * -mkd11e: PDP-11-Options. (line 107) 16275 * -mkd11f: PDP-11-Options. (line 110) 16276 * -mkd11h: PDP-11-Options. (line 110) 16277 * -mkd11k: PDP-11-Options. (line 114) 16278 * -mkd11q: PDP-11-Options. (line 110) 16279 * -mkd11z: PDP-11-Options. (line 118) 16280 * -mkev11: PDP-11-Options. (line 51) 16281 * -mlimited-eis: PDP-11-Options. (line 64) 16282 * -mlong: M68HC11-Opts. (line 32) 16283 * -mlong-double: M68HC11-Opts. (line 40) 16284 * -mmfpt: PDP-11-Options. (line 70) 16285 * -mmicrocode: PDP-11-Options. (line 83) 16286 * -mmutiproc: PDP-11-Options. (line 73) 16287 * -mmxps: PDP-11-Options. (line 77) 16288 * -mno-cis: PDP-11-Options. (line 32) 16289 * -mno-csm: PDP-11-Options. (line 43) 16290 * -mno-eis: PDP-11-Options. (line 46) 16291 * -mno-extensions: PDP-11-Options. (line 29) 16292 * -mno-fis: PDP-11-Options. (line 51) 16293 * -mno-fp-11: PDP-11-Options. (line 56) 16294 * -mno-fpp: PDP-11-Options. (line 56) 16295 * -mno-fpu: PDP-11-Options. (line 56) 16296 * -mno-kev11: PDP-11-Options. (line 51) 16297 * -mno-limited-eis: PDP-11-Options. (line 64) 16298 * -mno-mfpt: PDP-11-Options. (line 70) 16299 * -mno-microcode: PDP-11-Options. (line 83) 16300 * -mno-mutiproc: PDP-11-Options. (line 73) 16301 * -mno-mxps: PDP-11-Options. (line 77) 16302 * -mno-pic: PDP-11-Options. (line 11) 16303 * -mno-spl: PDP-11-Options. (line 80) 16304 * -mno-sym32: MIPS Opts. (line 145) 16305 * -mpic: PDP-11-Options. (line 11) 16306 * -mrelax command line option, V850: V850 Options. (line 51) 16307 * -mshort: M68HC11-Opts. (line 27) 16308 * -mshort-double: M68HC11-Opts. (line 36) 16309 * -mspl: PDP-11-Options. (line 80) 16310 * -msym32: MIPS Opts. (line 145) 16311 * -mt11: PDP-11-Options. (line 130) 16312 * -mthumb command line option, ARM: ARM Options. (line 71) 16313 * -mthumb-interwork command line option, ARM: ARM Options. (line 76) 16314 * -mv850 command line option, V850: V850 Options. (line 23) 16315 * -mv850any command line option, V850: V850 Options. (line 41) 16316 * -mv850e command line option, V850: V850 Options. (line 29) 16317 * -mv850e1 command line option, V850: V850 Options. (line 35) 16318 * -N command line option, CRIS: CRIS-Opts. (line 57) 16319 * -nIp option, M32RX: M32R-Opts. (line 101) 16320 * -no-bitinst, M32R2: M32R-Opts. (line 54) 16321 * -no-construct-floats: MIPS Opts. (line 157) 16322 * -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93) 16323 * -no-mdebug command line option, Alpha: Alpha Options. (line 25) 16324 * -no-parallel option, M32RX: M32R-Opts. (line 51) 16325 * -no-relax option, i960: Options-i960. (line 66) 16326 * -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. 16327 (line 79) 16328 * -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111) 16329 * -nocpp ignored (MIPS): MIPS Opts. (line 148) 16330 * -o: o. (line 6) 16331 * -O option, M32RX: M32R-Opts. (line 59) 16332 * -parallel option, M32RX: M32R-Opts. (line 46) 16333 * -R: R. (line 6) 16334 * -r800 command line option, Z80: Z80 Options. (line 41) 16335 * -relax command line option, Alpha: Alpha Options. (line 32) 16336 * -S, ignored on VAX: VAX-Opts. (line 11) 16337 * -t, ignored on VAX: VAX-Opts. (line 36) 16338 * -T, ignored on VAX: VAX-Opts. (line 11) 16339 * -v: v. (line 6) 16340 * -V, redundant on VAX: VAX-Opts. (line 22) 16341 * -version: v. (line 6) 16342 * -W: W. (line 11) 16343 * -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65) 16344 * -warn-unmatched-high option, M32R: M32R-Opts. (line 105) 16345 * -Wnp option, M32RX: M32R-Opts. (line 83) 16346 * -Wnuh option, M32RX: M32R-Opts. (line 117) 16347 * -Wp option, M32RX: M32R-Opts. (line 75) 16348 * -wsigned_overflow command line option, V850: V850 Options. (line 9) 16349 * -Wuh option, M32RX: M32R-Opts. (line 114) 16350 * -wunsigned_overflow command line option, V850: V850 Options. 16351 (line 16) 16352 * -x command line option, MMIX: MMIX-Opts. (line 44) 16353 * -z80 command line option, Z80: Z80 Options. (line 8) 16354 * -z8001 command line option, Z8000: Z8000 Options. (line 6) 16355 * -z8002 command line option, Z8000: Z8000 Options. (line 9) 16356 * . (symbol): Dot. (line 6) 16357 * .arch directive, ARM: ARM Directives. (line 164) 16358 * .big directive, M32RX: M32R-Directives. (line 88) 16359 * .cantunwind directive, ARM: ARM Directives. (line 87) 16360 * .cpu directive, ARM: ARM Directives. (line 160) 16361 * .eabi_attribute directive, ARM: ARM Directives. (line 172) 16362 * .fnend directive, ARM: ARM Directives. (line 78) 16363 * .fnstart directive, ARM: ARM Directives. (line 75) 16364 * .fpu directive, ARM: ARM Directives. (line 168) 16365 * .handlerdata directive, ARM: ARM Directives. (line 98) 16366 * .insn: MIPS insn. (line 6) 16367 * .little directive, M32RX: M32R-Directives. (line 82) 16368 * .ltorg directive, ARM: ARM Directives. (line 58) 16369 * .m32r directive, M32R: M32R-Directives. (line 66) 16370 * .m32r2 directive, M32R2: M32R-Directives. (line 77) 16371 * .m32rx directive, M32RX: M32R-Directives. (line 72) 16372 * .movsp directive, ARM: ARM Directives. (line 136) 16373 * .o: Object. (line 6) 16374 * .pad directive, ARM: ARM Directives. (line 131) 16375 * .param on HPPA: HPPA Directives. (line 19) 16376 * .personality directive, ARM: ARM Directives. (line 91) 16377 * .personalityindex directive, ARM: ARM Directives. (line 94) 16378 * .pool directive, ARM: ARM Directives. (line 72) 16379 * .save directive, ARM: ARM Directives. (line 107) 16380 * .set autoextend: MIPS autoextend. (line 6) 16381 * .set dsp: MIPS ASE instruction generation overrides. 16382 (line 16) 16383 * .set mdmx: MIPS ASE instruction generation overrides. 16384 (line 11) 16385 * .set mips3d: MIPS ASE instruction generation overrides. 16386 (line 6) 16387 * .set mipsN: MIPS ISA. (line 6) 16388 * .set mt: MIPS ASE instruction generation overrides. 16389 (line 21) 16390 * .set noautoextend: MIPS autoextend. (line 6) 16391 * .set nodsp: MIPS ASE instruction generation overrides. 16392 (line 16) 16393 * .set nomdmx: MIPS ASE instruction generation overrides. 16394 (line 11) 16395 * .set nomips3d: MIPS ASE instruction generation overrides. 16396 (line 6) 16397 * .set nomt: MIPS ASE instruction generation overrides. 16398 (line 21) 16399 * .set nosym32: MIPS symbol sizes. (line 6) 16400 * .set pop: MIPS option stack. (line 6) 16401 * .set push: MIPS option stack. (line 6) 16402 * .set sym32: MIPS symbol sizes. (line 6) 16403 * .setfp directive, ARM: ARM Directives. (line 139) 16404 * .unwind_raw directive, ARM: ARM Directives. (line 153) 16405 * .v850 directive, V850: V850 Directives. (line 14) 16406 * .v850e directive, V850: V850 Directives. (line 20) 16407 * .v850e1 directive, V850: V850 Directives. (line 26) 16408 * .z8001: Z8000 Directives. (line 11) 16409 * .z8002: Z8000 Directives. (line 15) 16410 * 16-bit code, i386: i386-16bit. (line 6) 16411 * 2byte directive, ARC: ARC Directives. (line 9) 16412 * 3byte directive, ARC: ARC Directives. (line 12) 16413 * 3DNow!, i386: i386-SIMD. (line 6) 16414 * 3DNow!, x86-64: i386-SIMD. (line 6) 16415 * 430 support: MSP430-Dependent. (line 6) 16416 * 4byte directive, ARC: ARC Directives. (line 15) 16417 * : (label): Statements. (line 30) 16418 * @word modifier, D10V: D10V-Word. (line 6) 16419 * \" (doublequote character): Strings. (line 43) 16420 * \\ (\ character): Strings. (line 40) 16421 * \b (backspace character): Strings. (line 15) 16422 * \DDD (octal character code): Strings. (line 30) 16423 * \f (formfeed character): Strings. (line 18) 16424 * \n (newline character): Strings. (line 21) 16425 * \r (carriage return character): Strings. (line 24) 16426 * \t (tab): Strings. (line 27) 16427 * \XD... (hex character code): Strings. (line 36) 16428 * _ opcode prefix: Xtensa Opcodes. (line 9) 16429 * a.out: Object. (line 6) 16430 * a.out symbol attributes: a.out Symbols. (line 6) 16431 * A_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 16432 * ABI options, SH64: SH64 Options. (line 29) 16433 * ABORT directive: ABORT. (line 6) 16434 * abort directive: Abort. (line 6) 16435 * absolute section: Ld Sections. (line 29) 16436 * absolute-literals directive: Absolute Literals Directive. 16437 (line 6) 16438 * ADDI instructions, relaxation: Xtensa Immediate Relaxation. 16439 (line 43) 16440 * addition, permitted arguments: Infix Ops. (line 44) 16441 * addresses: Expressions. (line 6) 16442 * addresses, format of: Secs Background. (line 68) 16443 * addressing modes, D10V: D10V-Addressing. (line 6) 16444 * addressing modes, D30V: D30V-Addressing. (line 6) 16445 * addressing modes, H8/300: H8/300-Addressing. (line 6) 16446 * addressing modes, M680x0: M68K-Syntax. (line 21) 16447 * addressing modes, M68HC11: M68HC11-Syntax. (line 17) 16448 * addressing modes, SH: SH-Addressing. (line 6) 16449 * addressing modes, SH64: SH64-Addressing. (line 6) 16450 * addressing modes, Z8000: Z8000-Addressing. (line 6) 16451 * ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25) 16452 * ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35) 16453 * advancing location counter: Org. (line 6) 16454 * align directive: Align. (line 6) 16455 * align directive, ARM: ARM Directives. (line 6) 16456 * align directive, SPARC: Sparc-Directives. (line 9) 16457 * align directive, TIC54X: TIC54X-Directives. (line 6) 16458 * alignment of branch targets: Xtensa Automatic Alignment. 16459 (line 6) 16460 * alignment of ENTRY instructions: Xtensa Automatic Alignment. 16461 (line 6) 16462 * alignment of LOOP instructions: Xtensa Automatic Alignment. 16463 (line 6) 16464 * Alpha floating point (IEEE): Alpha Floating Point. 16465 (line 6) 16466 * Alpha line comment character: Alpha-Chars. (line 6) 16467 * Alpha line separator: Alpha-Chars. (line 8) 16468 * Alpha notes: Alpha Notes. (line 6) 16469 * Alpha options: Alpha Options. (line 6) 16470 * Alpha registers: Alpha-Regs. (line 6) 16471 * Alpha relocations: Alpha-Relocs. (line 6) 16472 * Alpha support: Alpha-Dependent. (line 6) 16473 * Alpha Syntax: Alpha Options. (line 54) 16474 * Alpha-only directives: Alpha Directives. (line 10) 16475 * altered difference tables: Word. (line 12) 16476 * alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6) 16477 * ARC floating point (IEEE): ARC Floating Point. (line 6) 16478 * ARC machine directives: ARC Directives. (line 6) 16479 * ARC opcodes: ARC Opcodes. (line 6) 16480 * ARC options (none): ARC Options. (line 6) 16481 * ARC register names: ARC-Regs. (line 6) 16482 * ARC special characters: ARC-Chars. (line 6) 16483 * ARC support: ARC-Dependent. (line 6) 16484 * arc5 arc5, ARC: ARC Options. (line 10) 16485 * arc6 arc6, ARC: ARC Options. (line 13) 16486 * arc7 arc7, ARC: ARC Options. (line 21) 16487 * arc8 arc8, ARC: ARC Options. (line 24) 16488 * arch directive, i386: i386-Arch. (line 6) 16489 * arch directive, M680x0: M68K-Directives. (line 22) 16490 * arch directive, x86-64: i386-Arch. (line 6) 16491 * architecture options, i960: Options-i960. (line 6) 16492 * architecture options, IP2022: IP2K-Opts. (line 9) 16493 * architecture options, IP2K: IP2K-Opts. (line 14) 16494 * architecture options, M16C: M32C-Opts. (line 12) 16495 * architecture options, M32C: M32C-Opts. (line 9) 16496 * architecture options, M32R: M32R-Opts. (line 21) 16497 * architecture options, M32R2: M32R-Opts. (line 17) 16498 * architecture options, M32RX: M32R-Opts. (line 9) 16499 * architecture options, M680x0: M68K-Opts. (line 103) 16500 * Architecture variant option, CRIS: CRIS-Opts. (line 33) 16501 * architectures, PowerPC: PowerPC-Opts. (line 6) 16502 * architectures, SPARC: Sparc-Opts. (line 6) 16503 * arguments for addition: Infix Ops. (line 44) 16504 * arguments for subtraction: Infix Ops. (line 49) 16505 * arguments in expressions: Arguments. (line 6) 16506 * arithmetic functions: Operators. (line 6) 16507 * arithmetic operands: Arguments. (line 6) 16508 * arm directive, ARM: ARM Directives. (line 36) 16509 * ARM floating point (IEEE): ARM Floating Point. (line 6) 16510 * ARM identifiers: ARM-Chars. (line 15) 16511 * ARM immediate character: ARM-Chars. (line 13) 16512 * ARM line comment character: ARM-Chars. (line 6) 16513 * ARM line separator: ARM-Chars. (line 10) 16514 * ARM machine directives: ARM Directives. (line 6) 16515 * ARM opcodes: ARM Opcodes. (line 6) 16516 * ARM options (none): ARM Options. (line 6) 16517 * ARM register names: ARM-Regs. (line 6) 16518 * ARM support: ARM-Dependent. (line 6) 16519 * ascii directive: Ascii. (line 6) 16520 * asciz directive: Asciz. (line 6) 16521 * asg directive, TIC54X: TIC54X-Directives. (line 20) 16522 * assembler bugs, reporting: Bug Reporting. (line 6) 16523 * assembler crash: Bug Criteria. (line 9) 16524 * assembler directive .arch, CRIS: CRIS-Pseudos. (line 45) 16525 * assembler directive .dword, CRIS: CRIS-Pseudos. (line 12) 16526 * assembler directive .far, M68HC11: M68HC11-Directives. (line 20) 16527 * assembler directive .interrupt, M68HC11: M68HC11-Directives. 16528 (line 26) 16529 * assembler directive .mode, M68HC11: M68HC11-Directives. (line 16) 16530 * assembler directive .relax, M68HC11: M68HC11-Directives. (line 10) 16531 * assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17) 16532 * assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31) 16533 * assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131) 16534 * assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97) 16535 * assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131) 16536 * assembler directive GREG, MMIX: MMIX-Pseudos. (line 50) 16537 * assembler directive IS, MMIX: MMIX-Pseudos. (line 42) 16538 * assembler directive LOC, MMIX: MMIX-Pseudos. (line 7) 16539 * assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28) 16540 * assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108) 16541 * assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120) 16542 * assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108) 16543 * assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108) 16544 * assembler directives, CRIS: CRIS-Pseudos. (line 6) 16545 * assembler directives, M68HC11: M68HC11-Directives. (line 6) 16546 * assembler directives, M68HC12: M68HC11-Directives. (line 6) 16547 * assembler directives, MMIX: MMIX-Pseudos. (line 6) 16548 * assembler internal logic error: As Sections. (line 13) 16549 * assembler version: v. (line 6) 16550 * assembler, and linker: Secs Background. (line 10) 16551 * assembly listings, enabling: a. (line 6) 16552 * assigning values to symbols <1>: Equ. (line 6) 16553 * assigning values to symbols: Setting Symbols. (line 6) 16554 * atmp directive, i860: Directives-i860. (line 16) 16555 * att_syntax pseudo op, i386: i386-Syntax. (line 6) 16556 * att_syntax pseudo op, x86-64: i386-Syntax. (line 6) 16557 * attributes, symbol: Symbol Attributes. (line 6) 16558 * auxiliary attributes, COFF symbols: COFF Symbols. (line 19) 16559 * auxiliary symbol information, COFF: Dim. (line 6) 16560 * Av7: Sparc-Opts. (line 25) 16561 * backslash (\\): Strings. (line 40) 16562 * backspace (\b): Strings. (line 15) 16563 * balign directive: Balign. (line 6) 16564 * balignl directive: Balign. (line 27) 16565 * balignw directive: Balign. (line 27) 16566 * bes directive, TIC54X: TIC54X-Directives. (line 197) 16567 * BFIN directives: BFIN Directives. (line 6) 16568 * BFIN syntax: BFIN Syntax. (line 6) 16569 * big endian output, MIPS: Overview. (line 606) 16570 * big endian output, PJ: Overview. (line 513) 16571 * big-endian output, MIPS: MIPS Opts. (line 13) 16572 * bignums: Bignums. (line 6) 16573 * binary constants, TIC54X: TIC54X-Constants. (line 8) 16574 * binary files, including: Incbin. (line 6) 16575 * binary integers: Integers. (line 6) 16576 * bit names, IA-64: IA-64-Bits. (line 6) 16577 * bitfields, not supported on VAX: VAX-no. (line 6) 16578 * Blackfin support: BFIN-Dependent. (line 6) 16579 * block: Z8000 Directives. (line 55) 16580 * branch improvement, M680x0: M68K-Branch. (line 6) 16581 * branch improvement, M68HC11: M68HC11-Branch. (line 6) 16582 * branch improvement, VAX: VAX-branch. (line 6) 16583 * branch instructions, relaxation: Xtensa Branch Relaxation. 16584 (line 6) 16585 * branch recording, i960: Options-i960. (line 22) 16586 * branch statistics table, i960: Options-i960. (line 40) 16587 * branch target alignment: Xtensa Automatic Alignment. 16588 (line 6) 16589 * break directive, TIC54X: TIC54X-Directives. (line 143) 16590 * BSD syntax: PDP-11-Syntax. (line 6) 16591 * bss directive, i960: Directives-i960. (line 6) 16592 * bss directive, TIC54X: TIC54X-Directives. (line 29) 16593 * bss section <1>: bss. (line 6) 16594 * bss section: Ld Sections. (line 20) 16595 * bug criteria: Bug Criteria. (line 6) 16596 * bug reports: Bug Reporting. (line 6) 16597 * bugs in assembler: Reporting Bugs. (line 6) 16598 * Built-in symbols, CRIS: CRIS-Symbols. (line 6) 16599 * builtin math functions, TIC54X: TIC54X-Builtins. (line 6) 16600 * builtin subsym functions, TIC54X: TIC54X-Macros. (line 16) 16601 * bus lock prefixes, i386: i386-Prefixes. (line 36) 16602 * bval: Z8000 Directives. (line 30) 16603 * byte directive: Byte. (line 6) 16604 * byte directive, TIC54X: TIC54X-Directives. (line 36) 16605 * C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 16606 * c_mode directive, TIC54X: TIC54X-Directives. (line 51) 16607 * call instructions, i386: i386-Mnemonics. (line 51) 16608 * call instructions, relaxation: Xtensa Call Relaxation. 16609 (line 6) 16610 * call instructions, x86-64: i386-Mnemonics. (line 51) 16611 * callj, i960 pseudo-opcode: callj-i960. (line 6) 16612 * carriage return (\r): Strings. (line 24) 16613 * case sensitivity, Z80: Z80-Case. (line 6) 16614 * cfi_endproc directive: CFI directives. (line 14) 16615 * cfi_startproc directive: CFI directives. (line 6) 16616 * char directive, TIC54X: TIC54X-Directives. (line 36) 16617 * character constant, Z80: Z80-Chars. (line 13) 16618 * character constants: Characters. (line 6) 16619 * character escape codes: Strings. (line 15) 16620 * character escapes, Z80: Z80-Chars. (line 11) 16621 * character, single: Chars. (line 6) 16622 * characters used in symbols: Symbol Intro. (line 6) 16623 * clink directive, TIC54X: TIC54X-Directives. (line 45) 16624 * code directive, ARM: ARM Directives. (line 29) 16625 * code16 directive, i386: i386-16bit. (line 6) 16626 * code16gcc directive, i386: i386-16bit. (line 6) 16627 * code32 directive, i386: i386-16bit. (line 6) 16628 * code64 directive, i386: i386-16bit. (line 6) 16629 * code64 directive, x86-64: i386-16bit. (line 6) 16630 * COFF auxiliary symbol information: Dim. (line 6) 16631 * COFF structure debugging: Tag. (line 6) 16632 * COFF symbol attributes: COFF Symbols. (line 6) 16633 * COFF symbol descriptor: Desc. (line 6) 16634 * COFF symbol storage class: Scl. (line 6) 16635 * COFF symbol type: Type. (line 11) 16636 * COFF symbols, debugging: Def. (line 6) 16637 * COFF value attribute: Val. (line 6) 16638 * COMDAT: Linkonce. (line 6) 16639 * comm directive: Comm. (line 6) 16640 * command line conventions: Command Line. (line 6) 16641 * command line options, V850: V850 Options. (line 9) 16642 * command-line options ignored, VAX: VAX-Opts. (line 6) 16643 * comments: Comments. (line 6) 16644 * comments, M680x0: M68K-Chars. (line 6) 16645 * comments, removed by preprocessor: Preprocessing. (line 11) 16646 * common directive, SPARC: Sparc-Directives. (line 12) 16647 * common sections: Linkonce. (line 6) 16648 * common variable storage: bss. (line 6) 16649 * compare and jump expansions, i960: Compare-and-branch-i960. 16650 (line 13) 16651 * compare/branch instructions, i960: Compare-and-branch-i960. 16652 (line 6) 16653 * comparison expressions: Infix Ops. (line 55) 16654 * conditional assembly: If. (line 6) 16655 * constant, single character: Chars. (line 6) 16656 * constants: Constants. (line 6) 16657 * constants, bignum: Bignums. (line 6) 16658 * constants, character: Characters. (line 6) 16659 * constants, converted by preprocessor: Preprocessing. (line 14) 16660 * constants, floating point: Flonums. (line 6) 16661 * constants, integer: Integers. (line 6) 16662 * constants, number: Numbers. (line 6) 16663 * constants, string: Strings. (line 6) 16664 * constants, TIC54X: TIC54X-Constants. (line 6) 16665 * conversion instructions, i386: i386-Mnemonics. (line 32) 16666 * conversion instructions, x86-64: i386-Mnemonics. (line 32) 16667 * coprocessor wait, i386: i386-Prefixes. (line 40) 16668 * copy directive, TIC54X: TIC54X-Directives. (line 54) 16669 * cpu directive, M680x0: M68K-Directives. (line 30) 16670 * crash of assembler: Bug Criteria. (line 9) 16671 * CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9) 16672 * CRIS --emulation=criself command line option: CRIS-Opts. (line 9) 16673 * CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 33) 16674 * CRIS --mul-bug-abort command line option: CRIS-Opts. (line 61) 16675 * CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 61) 16676 * CRIS --no-underscore command line option: CRIS-Opts. (line 15) 16677 * CRIS --pic command line option: CRIS-Opts. (line 27) 16678 * CRIS --underscore command line option: CRIS-Opts. (line 15) 16679 * CRIS -N command line option: CRIS-Opts. (line 57) 16680 * CRIS architecture variant option: CRIS-Opts. (line 33) 16681 * CRIS assembler directive .arch: CRIS-Pseudos. (line 45) 16682 * CRIS assembler directive .dword: CRIS-Pseudos. (line 12) 16683 * CRIS assembler directive .syntax: CRIS-Pseudos. (line 17) 16684 * CRIS assembler directives: CRIS-Pseudos. (line 6) 16685 * CRIS built-in symbols: CRIS-Symbols. (line 6) 16686 * CRIS instruction expansion: CRIS-Expand. (line 6) 16687 * CRIS line comment characters: CRIS-Chars. (line 6) 16688 * CRIS options: CRIS-Opts. (line 6) 16689 * CRIS position-independent code: CRIS-Opts. (line 27) 16690 * CRIS pseudo-op .arch: CRIS-Pseudos. (line 45) 16691 * CRIS pseudo-op .dword: CRIS-Pseudos. (line 12) 16692 * CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17) 16693 * CRIS pseudo-ops: CRIS-Pseudos. (line 6) 16694 * CRIS register names: CRIS-Regs. (line 6) 16695 * CRIS support: CRIS-Dependent. (line 6) 16696 * CRIS symbols in position-independent code: CRIS-Pic. (line 6) 16697 * ctbp register, V850: V850-Regs. (line 131) 16698 * ctoff pseudo-op, V850: V850 Opcodes. (line 111) 16699 * ctpc register, V850: V850-Regs. (line 119) 16700 * ctpsw register, V850: V850-Regs. (line 122) 16701 * current address: Dot. (line 6) 16702 * current address, advancing: Org. (line 6) 16703 * D10V @word modifier: D10V-Word. (line 6) 16704 * D10V addressing modes: D10V-Addressing. (line 6) 16705 * D10V floating point: D10V-Float. (line 6) 16706 * D10V line comment character: D10V-Chars. (line 6) 16707 * D10V opcode summary: D10V-Opcodes. (line 6) 16708 * D10V optimization: Overview. (line 391) 16709 * D10V options: D10V-Opts. (line 6) 16710 * D10V registers: D10V-Regs. (line 6) 16711 * D10V size modifiers: D10V-Size. (line 6) 16712 * D10V sub-instruction ordering: D10V-Chars. (line 6) 16713 * D10V sub-instructions: D10V-Subs. (line 6) 16714 * D10V support: D10V-Dependent. (line 6) 16715 * D10V syntax: D10V-Syntax. (line 6) 16716 * D30V addressing modes: D30V-Addressing. (line 6) 16717 * D30V floating point: D30V-Float. (line 6) 16718 * D30V Guarded Execution: D30V-Guarded. (line 6) 16719 * D30V line comment character: D30V-Chars. (line 6) 16720 * D30V nops: Overview. (line 399) 16721 * D30V nops after 32-bit multiply: Overview. (line 402) 16722 * D30V opcode summary: D30V-Opcodes. (line 6) 16723 * D30V optimization: Overview. (line 396) 16724 * D30V options: D30V-Opts. (line 6) 16725 * D30V registers: D30V-Regs. (line 6) 16726 * D30V size modifiers: D30V-Size. (line 6) 16727 * D30V sub-instruction ordering: D30V-Chars. (line 6) 16728 * D30V sub-instructions: D30V-Subs. (line 6) 16729 * D30V support: D30V-Dependent. (line 6) 16730 * D30V syntax: D30V-Syntax. (line 6) 16731 * data alignment on SPARC: Sparc-Aligned-Data. (line 6) 16732 * data and text sections, joining: R. (line 6) 16733 * data directive: Data. (line 6) 16734 * data directive, TIC54X: TIC54X-Directives. (line 61) 16735 * data section: Ld Sections. (line 9) 16736 * data1 directive, M680x0: M68K-Directives. (line 9) 16737 * data2 directive, M680x0: M68K-Directives. (line 12) 16738 * datalabel, SH64: SH64-Addressing. (line 16) 16739 * dbpc register, V850: V850-Regs. (line 125) 16740 * dbpsw register, V850: V850-Regs. (line 128) 16741 * debuggers, and symbol order: Symbols. (line 10) 16742 * debugging COFF symbols: Def. (line 6) 16743 * DEC syntax: PDP-11-Syntax. (line 6) 16744 * decimal integers: Integers. (line 12) 16745 * def directive: Def. (line 6) 16746 * def directive, TIC54X: TIC54X-Directives. (line 103) 16747 * density instructions: Density Instructions. 16748 (line 6) 16749 * dependency tracking: MD. (line 6) 16750 * deprecated directives: Deprecated. (line 6) 16751 * desc directive: Desc. (line 6) 16752 * descriptor, of a.out symbol: Symbol Desc. (line 6) 16753 * dfloat directive, VAX: VAX-directives. (line 10) 16754 * difference tables altered: Word. (line 12) 16755 * difference tables, warning: K. (line 6) 16756 * differences, mmixal: MMIX-mmixal. (line 6) 16757 * dim directive: Dim. (line 6) 16758 * directives and instructions: Statements. (line 19) 16759 * directives for PowerPC: PowerPC-Pseudo. (line 6) 16760 * directives, BFIN: BFIN Directives. (line 6) 16761 * directives, M32R: M32R-Directives. (line 6) 16762 * directives, M680x0: M68K-Directives. (line 6) 16763 * directives, machine independent: Pseudo Ops. (line 6) 16764 * directives, Xtensa: Xtensa Directives. (line 6) 16765 * directives, Z8000: Z8000 Directives. (line 6) 16766 * displacement sizing character, VAX: VAX-operands. (line 12) 16767 * dollar local symbols: Symbol Names. (line 91) 16768 * dot (symbol): Dot. (line 6) 16769 * double directive: Double. (line 6) 16770 * double directive, i386: i386-Float. (line 14) 16771 * double directive, M680x0: M68K-Float. (line 14) 16772 * double directive, M68HC11: M68HC11-Float. (line 14) 16773 * double directive, TIC54X: TIC54X-Directives. (line 64) 16774 * double directive, VAX: VAX-float. (line 15) 16775 * double directive, x86-64: i386-Float. (line 14) 16776 * doublequote (\"): Strings. (line 43) 16777 * drlist directive, TIC54X: TIC54X-Directives. (line 73) 16778 * drnolist directive, TIC54X: TIC54X-Directives. (line 73) 16779 * dual directive, i860: Directives-i860. (line 6) 16780 * ECOFF sections: MIPS Object. (line 6) 16781 * ecr register, V850: V850-Regs. (line 113) 16782 * eight-byte integer: Quad. (line 9) 16783 * eipc register, V850: V850-Regs. (line 101) 16784 * eipsw register, V850: V850-Regs. (line 104) 16785 * eject directive: Eject. (line 6) 16786 * ELF symbol type: Type. (line 22) 16787 * else directive: Else. (line 6) 16788 * elseif directive: Elseif. (line 6) 16789 * empty expressions: Empty Exprs. (line 6) 16790 * emsg directive, TIC54X: TIC54X-Directives. (line 77) 16791 * emulation: Overview. (line 697) 16792 * end directive: End. (line 6) 16793 * enddual directive, i860: Directives-i860. (line 11) 16794 * endef directive: Endef. (line 6) 16795 * endfunc directive: Endfunc. (line 6) 16796 * endianness, MIPS: Overview. (line 606) 16797 * endianness, PJ: Overview. (line 513) 16798 * endif directive: Endif. (line 6) 16799 * endloop directive, TIC54X: TIC54X-Directives. (line 143) 16800 * endm directive: Macro. (line 96) 16801 * endm directive, TIC54X: TIC54X-Directives. (line 153) 16802 * endstruct directive, TIC54X: TIC54X-Directives. (line 217) 16803 * endunion directive, TIC54X: TIC54X-Directives. (line 251) 16804 * ENTRY instructions, alignment: Xtensa Automatic Alignment. 16805 (line 6) 16806 * environment settings, TIC54X: TIC54X-Env. (line 6) 16807 * EOF, newline must precede: Statements. (line 13) 16808 * ep register, V850: V850-Regs. (line 95) 16809 * equ directive: Equ. (line 6) 16810 * equ directive, TIC54X: TIC54X-Directives. (line 192) 16811 * equiv directive: Equiv. (line 6) 16812 * eqv directive: Eqv. (line 6) 16813 * err directive: Err. (line 6) 16814 * error directive: Error. (line 6) 16815 * error messages: Errors. (line 6) 16816 * error on valid input: Bug Criteria. (line 12) 16817 * errors, caused by warnings: W. (line 16) 16818 * errors, continuing after: Z. (line 6) 16819 * ESA/390 floating point (IEEE): ESA/390 Floating Point. 16820 (line 6) 16821 * ESA/390 support: ESA/390-Dependent. (line 6) 16822 * ESA/390 Syntax: ESA/390 Options. (line 8) 16823 * ESA/390-only directives: ESA/390 Directives. (line 12) 16824 * escape codes, character: Strings. (line 15) 16825 * eval directive, TIC54X: TIC54X-Directives. (line 24) 16826 * even: Z8000 Directives. (line 58) 16827 * even directive, M680x0: M68K-Directives. (line 15) 16828 * even directive, TIC54X: TIC54X-Directives. (line 6) 16829 * exitm directive: Macro. (line 99) 16830 * expr (internal section): As Sections. (line 17) 16831 * expression arguments: Arguments. (line 6) 16832 * expressions: Expressions. (line 6) 16833 * expressions, comparison: Infix Ops. (line 55) 16834 * expressions, empty: Empty Exprs. (line 6) 16835 * expressions, integer: Integer Exprs. (line 6) 16836 * extAuxRegister directive, ARC: ARC Directives. (line 18) 16837 * extCondCode directive, ARC: ARC Directives. (line 41) 16838 * extCoreRegister directive, ARC: ARC Directives. (line 53) 16839 * extend directive M680x0: M68K-Float. (line 17) 16840 * extend directive M68HC11: M68HC11-Float. (line 17) 16841 * extended directive, i960: Directives-i960. (line 13) 16842 * extern directive: Extern. (line 6) 16843 * extInstruction directive, ARC: ARC Directives. (line 78) 16844 * fail directive: Fail. (line 6) 16845 * far_mode directive, TIC54X: TIC54X-Directives. (line 82) 16846 * faster processing (-f): f. (line 6) 16847 * fatal signal: Bug Criteria. (line 9) 16848 * fclist directive, TIC54X: TIC54X-Directives. (line 87) 16849 * fcnolist directive, TIC54X: TIC54X-Directives. (line 87) 16850 * fepc register, V850: V850-Regs. (line 107) 16851 * fepsw register, V850: V850-Regs. (line 110) 16852 * ffloat directive, VAX: VAX-directives. (line 14) 16853 * field directive, TIC54X: TIC54X-Directives. (line 91) 16854 * file directive <1>: File. (line 6) 16855 * file directive: LNS directives. (line 6) 16856 * file directive, MSP 430: MSP430 Directives. (line 6) 16857 * file name, logical: File. (line 6) 16858 * files, including: Include. (line 6) 16859 * files, input: Input Files. (line 6) 16860 * fill directive: Fill. (line 6) 16861 * filling memory <1>: Space. (line 6) 16862 * filling memory: Skip. (line 6) 16863 * FLIX syntax: Xtensa Syntax. (line 6) 16864 * float directive: Float. (line 6) 16865 * float directive, i386: i386-Float. (line 14) 16866 * float directive, M680x0: M68K-Float. (line 11) 16867 * float directive, M68HC11: M68HC11-Float. (line 11) 16868 * float directive, TIC54X: TIC54X-Directives. (line 64) 16869 * float directive, VAX: VAX-float. (line 15) 16870 * float directive, x86-64: i386-Float. (line 14) 16871 * floating point numbers: Flonums. (line 6) 16872 * floating point numbers (double): Double. (line 6) 16873 * floating point numbers (single) <1>: Single. (line 6) 16874 * floating point numbers (single): Float. (line 6) 16875 * floating point, Alpha (IEEE): Alpha Floating Point. 16876 (line 6) 16877 * floating point, ARC (IEEE): ARC Floating Point. (line 6) 16878 * floating point, ARM (IEEE): ARM Floating Point. (line 6) 16879 * floating point, D10V: D10V-Float. (line 6) 16880 * floating point, D30V: D30V-Float. (line 6) 16881 * floating point, ESA/390 (IEEE): ESA/390 Floating Point. 16882 (line 6) 16883 * floating point, H8/300 (IEEE): H8/300 Floating Point. 16884 (line 6) 16885 * floating point, HPPA (IEEE): HPPA Floating Point. (line 6) 16886 * floating point, i386: i386-Float. (line 6) 16887 * floating point, i960 (IEEE): Floating Point-i960. (line 6) 16888 * floating point, M680x0: M68K-Float. (line 6) 16889 * floating point, M68HC11: M68HC11-Float. (line 6) 16890 * floating point, MSP 430 (IEEE): MSP430 Floating Point. 16891 (line 6) 16892 * floating point, SH (IEEE): SH Floating Point. (line 6) 16893 * floating point, SPARC (IEEE): Sparc-Float. (line 6) 16894 * floating point, V850 (IEEE): V850 Floating Point. (line 6) 16895 * floating point, VAX: VAX-float. (line 6) 16896 * floating point, x86-64: i386-Float. (line 6) 16897 * floating point, Z80: Z80 Floating Point. (line 6) 16898 * flonums: Flonums. (line 6) 16899 * force_thumb directive, ARM: ARM Directives. (line 39) 16900 * format of error messages: Errors. (line 24) 16901 * format of warning messages: Errors. (line 12) 16902 * formfeed (\f): Strings. (line 18) 16903 * func directive: Func. (line 6) 16904 * functions, in expressions: Operators. (line 6) 16905 * gbr960, i960 postprocessor: Options-i960. (line 40) 16906 * gfloat directive, VAX: VAX-directives. (line 18) 16907 * global: Z8000 Directives. (line 21) 16908 * global directive: Global. (line 6) 16909 * global directive, TIC54X: TIC54X-Directives. (line 103) 16910 * gp register, MIPS: MIPS Object. (line 11) 16911 * gp register, V850: V850-Regs. (line 17) 16912 * grouping data: Sub-Sections. (line 6) 16913 * H8/300 addressing modes: H8/300-Addressing. (line 6) 16914 * H8/300 floating point (IEEE): H8/300 Floating Point. 16915 (line 6) 16916 * H8/300 line comment character: H8/300-Chars. (line 6) 16917 * H8/300 line separator: H8/300-Chars. (line 8) 16918 * H8/300 machine directives (none): H8/300 Directives. (line 6) 16919 * H8/300 opcode summary: H8/300 Opcodes. (line 6) 16920 * H8/300 options (none): H8/300 Options. (line 6) 16921 * H8/300 registers: H8/300-Regs. (line 6) 16922 * H8/300 size suffixes: H8/300 Opcodes. (line 163) 16923 * H8/300 support: H8/300-Dependent. (line 6) 16924 * H8/300H, assembling for: H8/300 Directives. (line 8) 16925 * half directive, ARC: ARC Directives. (line 156) 16926 * half directive, SPARC: Sparc-Directives. (line 17) 16927 * half directive, TIC54X: TIC54X-Directives. (line 111) 16928 * hex character code (\XD...): Strings. (line 36) 16929 * hexadecimal integers: Integers. (line 15) 16930 * hexadecimal prefix, Z80: Z80-Chars. (line 8) 16931 * hfloat directive, VAX: VAX-directives. (line 22) 16932 * hi pseudo-op, V850: V850 Opcodes. (line 33) 16933 * hi0 pseudo-op, V850: V850 Opcodes. (line 10) 16934 * hidden directive: Hidden. (line 6) 16935 * high directive, M32R: M32R-Directives. (line 18) 16936 * hilo pseudo-op, V850: V850 Opcodes. (line 55) 16937 * HPPA directives not supported: HPPA Directives. (line 11) 16938 * HPPA floating point (IEEE): HPPA Floating Point. (line 6) 16939 * HPPA Syntax: HPPA Options. (line 8) 16940 * HPPA-only directives: HPPA Directives. (line 24) 16941 * hword directive: hword. (line 6) 16942 * i370 support: ESA/390-Dependent. (line 6) 16943 * i386 16-bit code: i386-16bit. (line 6) 16944 * i386 arch directive: i386-Arch. (line 6) 16945 * i386 att_syntax pseudo op: i386-Syntax. (line 6) 16946 * i386 conversion instructions: i386-Mnemonics. (line 32) 16947 * i386 floating point: i386-Float. (line 6) 16948 * i386 immediate operands: i386-Syntax. (line 15) 16949 * i386 instruction naming: i386-Mnemonics. (line 6) 16950 * i386 instruction prefixes: i386-Prefixes. (line 6) 16951 * i386 intel_syntax pseudo op: i386-Syntax. (line 6) 16952 * i386 jump optimization: i386-Jumps. (line 6) 16953 * i386 jump, call, return: i386-Syntax. (line 38) 16954 * i386 jump/call operands: i386-Syntax. (line 15) 16955 * i386 memory references: i386-Memory. (line 6) 16956 * i386 mul, imul instructions: i386-Notes. (line 6) 16957 * i386 options: i386-Options. (line 6) 16958 * i386 register operands: i386-Syntax. (line 15) 16959 * i386 registers: i386-Regs. (line 6) 16960 * i386 sections: i386-Syntax. (line 44) 16961 * i386 size suffixes: i386-Syntax. (line 29) 16962 * i386 source, destination operands: i386-Syntax. (line 22) 16963 * i386 support: i386-Dependent. (line 6) 16964 * i386 syntax compatibility: i386-Syntax. (line 6) 16965 * i80306 support: i386-Dependent. (line 6) 16966 * i860 machine directives: Directives-i860. (line 6) 16967 * i860 opcodes: Opcodes for i860. (line 6) 16968 * i860 support: i860-Dependent. (line 6) 16969 * i960 architecture options: Options-i960. (line 6) 16970 * i960 branch recording: Options-i960. (line 22) 16971 * i960 callj pseudo-opcode: callj-i960. (line 6) 16972 * i960 compare and jump expansions: Compare-and-branch-i960. 16973 (line 13) 16974 * i960 compare/branch instructions: Compare-and-branch-i960. 16975 (line 6) 16976 * i960 floating point (IEEE): Floating Point-i960. (line 6) 16977 * i960 machine directives: Directives-i960. (line 6) 16978 * i960 opcodes: Opcodes for i960. (line 6) 16979 * i960 options: Options-i960. (line 6) 16980 * i960 support: i960-Dependent. (line 6) 16981 * IA-64 line comment character: IA-64-Chars. (line 6) 16982 * IA-64 line separator: IA-64-Chars. (line 8) 16983 * IA-64 options: IA-64 Options. (line 6) 16984 * IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6) 16985 * IA-64 registers: IA-64-Regs. (line 6) 16986 * IA-64 support: IA-64-Dependent. (line 6) 16987 * IA-64 Syntax: IA-64 Options. (line 96) 16988 * ident directive: Ident. (line 6) 16989 * identifiers, ARM: ARM-Chars. (line 15) 16990 * identifiers, MSP 430: MSP430-Chars. (line 8) 16991 * if directive: If. (line 6) 16992 * ifb directive: If. (line 21) 16993 * ifc directive: If. (line 25) 16994 * ifdef directive: If. (line 16) 16995 * ifeq directive: If. (line 33) 16996 * ifeqs directive: If. (line 36) 16997 * ifge directive: If. (line 40) 16998 * ifgt directive: If. (line 44) 16999 * ifle directive: If. (line 48) 17000 * iflt directive: If. (line 52) 17001 * ifnb directive: If. (line 56) 17002 * ifnc directive: If. (line 61) 17003 * ifndef directive: If. (line 65) 17004 * ifne directive: If. (line 72) 17005 * ifnes directive: If. (line 76) 17006 * ifnotdef directive: If. (line 65) 17007 * immediate character, ARM: ARM-Chars. (line 13) 17008 * immediate character, M680x0: M68K-Chars. (line 6) 17009 * immediate character, VAX: VAX-operands. (line 6) 17010 * immediate fields, relaxation: Xtensa Immediate Relaxation. 17011 (line 6) 17012 * immediate operands, i386: i386-Syntax. (line 15) 17013 * immediate operands, x86-64: i386-Syntax. (line 15) 17014 * imul instruction, i386: i386-Notes. (line 6) 17015 * imul instruction, x86-64: i386-Notes. (line 6) 17016 * incbin directive: Incbin. (line 6) 17017 * include directive: Include. (line 6) 17018 * include directive search path: I. (line 6) 17019 * indirect character, VAX: VAX-operands. (line 9) 17020 * infix operators: Infix Ops. (line 6) 17021 * inhibiting interrupts, i386: i386-Prefixes. (line 36) 17022 * input: Input Files. (line 6) 17023 * input file linenumbers: Input Files. (line 35) 17024 * instruction expansion, CRIS: CRIS-Expand. (line 6) 17025 * instruction expansion, MMIX: MMIX-Expand. (line 6) 17026 * instruction naming, i386: i386-Mnemonics. (line 6) 17027 * instruction naming, x86-64: i386-Mnemonics. (line 6) 17028 * instruction prefixes, i386: i386-Prefixes. (line 6) 17029 * instruction set, M680x0: M68K-opcodes. (line 6) 17030 * instruction set, M68HC11: M68HC11-opcodes. (line 6) 17031 * instruction summary, D10V: D10V-Opcodes. (line 6) 17032 * instruction summary, D30V: D30V-Opcodes. (line 6) 17033 * instruction summary, H8/300: H8/300 Opcodes. (line 6) 17034 * instruction summary, SH: SH Opcodes. (line 6) 17035 * instruction summary, SH64: SH64 Opcodes. (line 6) 17036 * instruction summary, Z8000: Z8000 Opcodes. (line 6) 17037 * instructions and directives: Statements. (line 19) 17038 * int directive: Int. (line 6) 17039 * int directive, H8/300: H8/300 Directives. (line 6) 17040 * int directive, i386: i386-Float. (line 21) 17041 * int directive, TIC54X: TIC54X-Directives. (line 111) 17042 * int directive, x86-64: i386-Float. (line 21) 17043 * integer expressions: Integer Exprs. (line 6) 17044 * integer, 16-byte: Octa. (line 6) 17045 * integer, 8-byte: Quad. (line 9) 17046 * integers: Integers. (line 6) 17047 * integers, 16-bit: hword. (line 6) 17048 * integers, 32-bit: Int. (line 6) 17049 * integers, binary: Integers. (line 6) 17050 * integers, decimal: Integers. (line 12) 17051 * integers, hexadecimal: Integers. (line 15) 17052 * integers, octal: Integers. (line 9) 17053 * integers, one byte: Byte. (line 6) 17054 * intel_syntax pseudo op, i386: i386-Syntax. (line 6) 17055 * intel_syntax pseudo op, x86-64: i386-Syntax. (line 6) 17056 * internal assembler sections: As Sections. (line 6) 17057 * internal directive: Internal. (line 6) 17058 * invalid input: Bug Criteria. (line 14) 17059 * invocation summary: Overview. (line 6) 17060 * IP2K architecture options: IP2K-Opts. (line 9) 17061 * IP2K options: IP2K-Opts. (line 6) 17062 * IP2K support: IP2K-Dependent. (line 6) 17063 * irp directive: Irp. (line 6) 17064 * irpc directive: Irpc. (line 6) 17065 * ISA options, SH64: SH64 Options. (line 6) 17066 * joining text and data sections: R. (line 6) 17067 * jump instructions, i386: i386-Mnemonics. (line 51) 17068 * jump instructions, x86-64: i386-Mnemonics. (line 51) 17069 * jump optimization, i386: i386-Jumps. (line 6) 17070 * jump optimization, x86-64: i386-Jumps. (line 6) 17071 * jump/call operands, i386: i386-Syntax. (line 15) 17072 * jump/call operands, x86-64: i386-Syntax. (line 15) 17073 * L16SI instructions, relaxation: Xtensa Immediate Relaxation. 17074 (line 23) 17075 * L16UI instructions, relaxation: Xtensa Immediate Relaxation. 17076 (line 23) 17077 * L32I instructions, relaxation: Xtensa Immediate Relaxation. 17078 (line 23) 17079 * L8UI instructions, relaxation: Xtensa Immediate Relaxation. 17080 (line 23) 17081 * label (:): Statements. (line 30) 17082 * label directive, TIC54X: TIC54X-Directives. (line 123) 17083 * labels: Labels. (line 6) 17084 * lcomm directive: Lcomm. (line 6) 17085 * ld: Object. (line 15) 17086 * ldouble directive M680x0: M68K-Float. (line 17) 17087 * ldouble directive M68HC11: M68HC11-Float. (line 17) 17088 * ldouble directive, TIC54X: TIC54X-Directives. (line 64) 17089 * LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15) 17090 * leafproc directive, i960: Directives-i960. (line 18) 17091 * length directive, TIC54X: TIC54X-Directives. (line 127) 17092 * length of symbols: Symbol Intro. (line 14) 17093 * lflags directive (ignored): Lflags. (line 6) 17094 * line comment character: Comments. (line 19) 17095 * line comment character, Alpha: Alpha-Chars. (line 6) 17096 * line comment character, ARM: ARM-Chars. (line 6) 17097 * line comment character, D10V: D10V-Chars. (line 6) 17098 * line comment character, D30V: D30V-Chars. (line 6) 17099 * line comment character, H8/300: H8/300-Chars. (line 6) 17100 * line comment character, IA-64: IA-64-Chars. (line 6) 17101 * line comment character, M680x0: M68K-Chars. (line 6) 17102 * line comment character, MSP 430: MSP430-Chars. (line 6) 17103 * line comment character, SH: SH-Chars. (line 6) 17104 * line comment character, SH64: SH64-Chars. (line 6) 17105 * line comment character, V850: V850-Chars. (line 6) 17106 * line comment character, Z80: Z80-Chars. (line 6) 17107 * line comment character, Z8000: Z8000-Chars. (line 6) 17108 * line comment characters, CRIS: CRIS-Chars. (line 6) 17109 * line comment characters, MMIX: MMIX-Chars. (line 6) 17110 * line directive: Line. (line 6) 17111 * line directive, MSP 430: MSP430 Directives. (line 14) 17112 * line numbers, in input files: Input Files. (line 35) 17113 * line numbers, in warnings/errors: Errors. (line 16) 17114 * line separator character: Statements. (line 6) 17115 * line separator, Alpha: Alpha-Chars. (line 8) 17116 * line separator, ARM: ARM-Chars. (line 10) 17117 * line separator, H8/300: H8/300-Chars. (line 8) 17118 * line separator, IA-64: IA-64-Chars. (line 8) 17119 * line separator, SH: SH-Chars. (line 8) 17120 * line separator, SH64: SH64-Chars. (line 8) 17121 * line separator, Z8000: Z8000-Chars. (line 8) 17122 * lines starting with #: Comments. (line 38) 17123 * linker: Object. (line 15) 17124 * linker, and assembler: Secs Background. (line 10) 17125 * linkonce directive: Linkonce. (line 6) 17126 * list directive: List. (line 6) 17127 * list directive, TIC54X: TIC54X-Directives. (line 131) 17128 * listing control, turning off: Nolist. (line 6) 17129 * listing control, turning on: List. (line 6) 17130 * listing control: new page: Eject. (line 6) 17131 * listing control: paper size: Psize. (line 6) 17132 * listing control: subtitle: Sbttl. (line 6) 17133 * listing control: title line: Title. (line 6) 17134 * listings, enabling: a. (line 6) 17135 * literal directive: Literal Directive. (line 6) 17136 * literal_position directive: Literal Position Directive. 17137 (line 6) 17138 * literal_prefix directive: Literal Prefix Directive. 17139 (line 6) 17140 * little endian output, MIPS: Overview. (line 609) 17141 * little endian output, PJ: Overview. (line 516) 17142 * little-endian output, MIPS: MIPS Opts. (line 13) 17143 * ln directive: Ln. (line 6) 17144 * lo pseudo-op, V850: V850 Opcodes. (line 22) 17145 * loc directive: LNS directives. (line 19) 17146 * loc_mark_blocks directive: LNS directives. (line 50) 17147 * local common symbols: Lcomm. (line 6) 17148 * local labels, retaining in output: L. (line 6) 17149 * local symbol names: Symbol Names. (line 22) 17150 * location counter: Dot. (line 6) 17151 * location counter, advancing: Org. (line 6) 17152 * location counter, Z80: Z80-Chars. (line 8) 17153 * logical file name: File. (line 6) 17154 * logical line number: Line. (line 6) 17155 * logical line numbers: Comments. (line 38) 17156 * long directive: Long. (line 6) 17157 * long directive, ARC: ARC Directives. (line 159) 17158 * long directive, i386: i386-Float. (line 21) 17159 * long directive, TIC54X: TIC54X-Directives. (line 135) 17160 * long directive, x86-64: i386-Float. (line 21) 17161 * longcall pseudo-op, V850: V850 Opcodes. (line 123) 17162 * longcalls directive: Longcalls Directive. (line 6) 17163 * longjump pseudo-op, V850: V850 Opcodes. (line 129) 17164 * loop directive, TIC54X: TIC54X-Directives. (line 143) 17165 * LOOP instructions, alignment: Xtensa Automatic Alignment. 17166 (line 6) 17167 * low directive, M32R: M32R-Directives. (line 9) 17168 * lp register, V850: V850-Regs. (line 98) 17169 * lval: Z8000 Directives. (line 27) 17170 * M16C architecture option: M32C-Opts. (line 12) 17171 * M32C architecture option: M32C-Opts. (line 9) 17172 * M32C modifiers: M32C-Modifiers. (line 6) 17173 * M32C options: M32C-Opts. (line 6) 17174 * M32C support: M32C-Dependent. (line 6) 17175 * M32R architecture options: M32R-Opts. (line 9) 17176 * M32R directives: M32R-Directives. (line 6) 17177 * M32R options: M32R-Opts. (line 6) 17178 * M32R support: M32R-Dependent. (line 6) 17179 * M32R warnings: M32R-Warnings. (line 6) 17180 * M680x0 addressing modes: M68K-Syntax. (line 21) 17181 * M680x0 architecture options: M68K-Opts. (line 103) 17182 * M680x0 branch improvement: M68K-Branch. (line 6) 17183 * M680x0 directives: M68K-Directives. (line 6) 17184 * M680x0 floating point: M68K-Float. (line 6) 17185 * M680x0 immediate character: M68K-Chars. (line 6) 17186 * M680x0 line comment character: M68K-Chars. (line 6) 17187 * M680x0 opcodes: M68K-opcodes. (line 6) 17188 * M680x0 options: M68K-Opts. (line 6) 17189 * M680x0 pseudo-opcodes: M68K-Branch. (line 6) 17190 * M680x0 size modifiers: M68K-Syntax. (line 8) 17191 * M680x0 support: M68K-Dependent. (line 6) 17192 * M680x0 syntax: M68K-Syntax. (line 8) 17193 * M68HC11 addressing modes: M68HC11-Syntax. (line 17) 17194 * M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6) 17195 * M68HC11 assembler directive .far: M68HC11-Directives. (line 20) 17196 * M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26) 17197 * M68HC11 assembler directive .mode: M68HC11-Directives. (line 16) 17198 * M68HC11 assembler directive .relax: M68HC11-Directives. (line 10) 17199 * M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31) 17200 * M68HC11 assembler directives: M68HC11-Directives. (line 6) 17201 * M68HC11 branch improvement: M68HC11-Branch. (line 6) 17202 * M68HC11 floating point: M68HC11-Float. (line 6) 17203 * M68HC11 modifiers: M68HC11-Modifiers. (line 6) 17204 * M68HC11 opcodes: M68HC11-opcodes. (line 6) 17205 * M68HC11 options: M68HC11-Opts. (line 6) 17206 * M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6) 17207 * M68HC11 syntax: M68HC11-Syntax. (line 6) 17208 * M68HC12 assembler directives: M68HC11-Directives. (line 6) 17209 * machine dependencies: Machine Dependencies. 17210 (line 6) 17211 * machine directives, ARC: ARC Directives. (line 6) 17212 * machine directives, ARM: ARM Directives. (line 6) 17213 * machine directives, H8/300 (none): H8/300 Directives. (line 6) 17214 * machine directives, i860: Directives-i860. (line 6) 17215 * machine directives, i960: Directives-i960. (line 6) 17216 * machine directives, MSP 430: MSP430 Directives. (line 6) 17217 * machine directives, SH: SH Directives. (line 6) 17218 * machine directives, SH64: SH64 Directives. (line 9) 17219 * machine directives, SPARC: Sparc-Directives. (line 6) 17220 * machine directives, TIC54X: TIC54X-Directives. (line 6) 17221 * machine directives, V850: V850 Directives. (line 6) 17222 * machine directives, VAX: VAX-directives. (line 6) 17223 * machine independent directives: Pseudo Ops. (line 6) 17224 * machine instructions (not covered): Manual. (line 14) 17225 * machine-independent syntax: Syntax. (line 6) 17226 * macro directive: Macro. (line 28) 17227 * macro directive, TIC54X: TIC54X-Directives. (line 153) 17228 * macros: Macro. (line 6) 17229 * macros, count executed: Macro. (line 101) 17230 * Macros, MSP 430: MSP430-Macros. (line 6) 17231 * macros, TIC54X: TIC54X-Macros. (line 6) 17232 * make rules: MD. (line 6) 17233 * manual, structure and purpose: Manual. (line 6) 17234 * math builtins, TIC54X: TIC54X-Builtins. (line 6) 17235 * Maximum number of continuation lines: listing. (line 33) 17236 * memory references, i386: i386-Memory. (line 6) 17237 * memory references, x86-64: i386-Memory. (line 6) 17238 * memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6) 17239 * merging text and data sections: R. (line 6) 17240 * messages from assembler: Errors. (line 6) 17241 * minus, permitted arguments: Infix Ops. (line 49) 17242 * MIPS architecture options: MIPS Opts. (line 20) 17243 * MIPS big-endian output: MIPS Opts. (line 13) 17244 * MIPS debugging directives: MIPS Stabs. (line 6) 17245 * MIPS DSP instruction generation override: MIPS ASE instruction generation overrides. 17246 (line 16) 17247 * MIPS ECOFF sections: MIPS Object. (line 6) 17248 * MIPS endianness: Overview. (line 606) 17249 * MIPS ISA: Overview. (line 612) 17250 * MIPS ISA override: MIPS ISA. (line 6) 17251 * MIPS little-endian output: MIPS Opts. (line 13) 17252 * MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides. 17253 (line 11) 17254 * MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides. 17255 (line 6) 17256 * MIPS MT instruction generation override: MIPS ASE instruction generation overrides. 17257 (line 21) 17258 * MIPS option stack: MIPS option stack. (line 6) 17259 * MIPS processor: MIPS-Dependent. (line 6) 17260 * MIT: M68K-Syntax. (line 6) 17261 * mlib directive, TIC54X: TIC54X-Directives. (line 159) 17262 * mlist directive, TIC54X: TIC54X-Directives. (line 164) 17263 * MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131) 17264 * MMIX assembler directive BYTE: MMIX-Pseudos. (line 97) 17265 * MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131) 17266 * MMIX assembler directive GREG: MMIX-Pseudos. (line 50) 17267 * MMIX assembler directive IS: MMIX-Pseudos. (line 42) 17268 * MMIX assembler directive LOC: MMIX-Pseudos. (line 7) 17269 * MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28) 17270 * MMIX assembler directive OCTA: MMIX-Pseudos. (line 108) 17271 * MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120) 17272 * MMIX assembler directive TETRA: MMIX-Pseudos. (line 108) 17273 * MMIX assembler directive WYDE: MMIX-Pseudos. (line 108) 17274 * MMIX assembler directives: MMIX-Pseudos. (line 6) 17275 * MMIX line comment characters: MMIX-Chars. (line 6) 17276 * MMIX options: MMIX-Opts. (line 6) 17277 * MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131) 17278 * MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97) 17279 * MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131) 17280 * MMIX pseudo-op GREG: MMIX-Pseudos. (line 50) 17281 * MMIX pseudo-op IS: MMIX-Pseudos. (line 42) 17282 * MMIX pseudo-op LOC: MMIX-Pseudos. (line 7) 17283 * MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28) 17284 * MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108) 17285 * MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120) 17286 * MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108) 17287 * MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108) 17288 * MMIX pseudo-ops: MMIX-Pseudos. (line 6) 17289 * MMIX register names: MMIX-Regs. (line 6) 17290 * MMIX support: MMIX-Dependent. (line 6) 17291 * mmixal differences: MMIX-mmixal. (line 6) 17292 * mmregs directive, TIC54X: TIC54X-Directives. (line 170) 17293 * mmsg directive, TIC54X: TIC54X-Directives. (line 77) 17294 * MMX, i386: i386-SIMD. (line 6) 17295 * MMX, x86-64: i386-SIMD. (line 6) 17296 * mnemonic suffixes, i386: i386-Syntax. (line 29) 17297 * mnemonic suffixes, x86-64: i386-Syntax. (line 29) 17298 * mnemonics for opcodes, VAX: VAX-opcodes. (line 6) 17299 * mnemonics, D10V: D10V-Opcodes. (line 6) 17300 * mnemonics, D30V: D30V-Opcodes. (line 6) 17301 * mnemonics, H8/300: H8/300 Opcodes. (line 6) 17302 * mnemonics, SH: SH Opcodes. (line 6) 17303 * mnemonics, SH64: SH64 Opcodes. (line 6) 17304 * mnemonics, Z8000: Z8000 Opcodes. (line 6) 17305 * mnolist directive, TIC54X: TIC54X-Directives. (line 164) 17306 * Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6) 17307 * MOVI instructions, relaxation: Xtensa Immediate Relaxation. 17308 (line 12) 17309 * MRI compatibility mode: M. (line 6) 17310 * mri directive: MRI. (line 6) 17311 * MRI mode, temporarily: MRI. (line 6) 17312 * MSP 430 floating point (IEEE): MSP430 Floating Point. 17313 (line 6) 17314 * MSP 430 identifiers: MSP430-Chars. (line 8) 17315 * MSP 430 line comment character: MSP430-Chars. (line 6) 17316 * MSP 430 machine directives: MSP430 Directives. (line 6) 17317 * MSP 430 macros: MSP430-Macros. (line 6) 17318 * MSP 430 opcodes: MSP430 Opcodes. (line 6) 17319 * MSP 430 options (none): MSP430 Options. (line 6) 17320 * MSP 430 profiling capability: MSP430 Profiling Capability. 17321 (line 6) 17322 * MSP 430 register names: MSP430-Regs. (line 6) 17323 * MSP 430 support: MSP430-Dependent. (line 6) 17324 * MSP430 Assembler Extensions: MSP430-Ext. (line 6) 17325 * mul instruction, i386: i386-Notes. (line 6) 17326 * mul instruction, x86-64: i386-Notes. (line 6) 17327 * name: Z8000 Directives. (line 18) 17328 * named section: Section. (line 6) 17329 * named sections: Ld Sections. (line 8) 17330 * names, symbol: Symbol Names. (line 6) 17331 * naming object file: o. (line 6) 17332 * new page, in listings: Eject. (line 6) 17333 * newblock directive, TIC54X: TIC54X-Directives. (line 176) 17334 * newline (\n): Strings. (line 21) 17335 * newline, required at file end: Statements. (line 13) 17336 * no-absolute-literals directive: Absolute Literals Directive. 17337 (line 6) 17338 * no-longcalls directive: Longcalls Directive. (line 6) 17339 * no-schedule directive: Schedule Directive. (line 6) 17340 * no-transform directive: Transform Directive. (line 6) 17341 * nolist directive: Nolist. (line 6) 17342 * nolist directive, TIC54X: TIC54X-Directives. (line 131) 17343 * NOP pseudo op, ARM: ARM Opcodes. (line 9) 17344 * notes for Alpha: Alpha Notes. (line 6) 17345 * null-terminated strings: Asciz. (line 6) 17346 * number constants: Numbers. (line 6) 17347 * number of macros executed: Macro. (line 101) 17348 * numbered subsections: Sub-Sections. (line 6) 17349 * numbers, 16-bit: hword. (line 6) 17350 * numeric values: Expressions. (line 6) 17351 * nword directive, SPARC: Sparc-Directives. (line 20) 17352 * object file: Object. (line 6) 17353 * object file format: Object Formats. (line 6) 17354 * object file name: o. (line 6) 17355 * object file, after errors: Z. (line 6) 17356 * obsolescent directives: Deprecated. (line 6) 17357 * octa directive: Octa. (line 6) 17358 * octal character code (\DDD): Strings. (line 30) 17359 * octal integers: Integers. (line 9) 17360 * offset directive, V850: V850 Directives. (line 6) 17361 * opcode mnemonics, VAX: VAX-opcodes. (line 6) 17362 * opcode names, Xtensa: Xtensa Opcodes. (line 6) 17363 * opcode summary, D10V: D10V-Opcodes. (line 6) 17364 * opcode summary, D30V: D30V-Opcodes. (line 6) 17365 * opcode summary, H8/300: H8/300 Opcodes. (line 6) 17366 * opcode summary, SH: SH Opcodes. (line 6) 17367 * opcode summary, SH64: SH64 Opcodes. (line 6) 17368 * opcode summary, Z8000: Z8000 Opcodes. (line 6) 17369 * opcodes for ARC: ARC Opcodes. (line 6) 17370 * opcodes for ARM: ARM Opcodes. (line 6) 17371 * opcodes for MSP 430: MSP430 Opcodes. (line 6) 17372 * opcodes for V850: V850 Opcodes. (line 6) 17373 * opcodes, i860: Opcodes for i860. (line 6) 17374 * opcodes, i960: Opcodes for i960. (line 6) 17375 * opcodes, M680x0: M68K-opcodes. (line 6) 17376 * opcodes, M68HC11: M68HC11-opcodes. (line 6) 17377 * operand delimiters, i386: i386-Syntax. (line 15) 17378 * operand delimiters, x86-64: i386-Syntax. (line 15) 17379 * operand notation, VAX: VAX-operands. (line 6) 17380 * operands in expressions: Arguments. (line 6) 17381 * operator precedence: Infix Ops. (line 11) 17382 * operators, in expressions: Operators. (line 6) 17383 * operators, permitted arguments: Infix Ops. (line 6) 17384 * optimization, D10V: Overview. (line 391) 17385 * optimization, D30V: Overview. (line 396) 17386 * optimizations: Xtensa Optimizations. 17387 (line 6) 17388 * option directive, ARC: ARC Directives. (line 162) 17389 * option directive, TIC54X: TIC54X-Directives. (line 180) 17390 * option summary: Overview. (line 6) 17391 * options for Alpha: Alpha Options. (line 6) 17392 * options for ARC (none): ARC Options. (line 6) 17393 * options for ARM (none): ARM Options. (line 6) 17394 * options for i386: i386-Options. (line 6) 17395 * options for IA-64: IA-64 Options. (line 6) 17396 * options for MSP430 (none): MSP430 Options. (line 6) 17397 * options for PDP-11: PDP-11-Options. (line 6) 17398 * options for PowerPC: PowerPC-Opts. (line 6) 17399 * options for SPARC: Sparc-Opts. (line 6) 17400 * options for V850 (none): V850 Options. (line 6) 17401 * options for VAX/VMS: VAX-Opts. (line 42) 17402 * options for x86-64: i386-Options. (line 6) 17403 * options for Z80: Z80 Options. (line 6) 17404 * options, all versions of assembler: Invoking. (line 6) 17405 * options, command line: Command Line. (line 13) 17406 * options, CRIS: CRIS-Opts. (line 6) 17407 * options, D10V: D10V-Opts. (line 6) 17408 * options, D30V: D30V-Opts. (line 6) 17409 * options, H8/300 (none): H8/300 Options. (line 6) 17410 * options, i960: Options-i960. (line 6) 17411 * options, IP2K: IP2K-Opts. (line 6) 17412 * options, M32C: M32C-Opts. (line 6) 17413 * options, M32R: M32R-Opts. (line 6) 17414 * options, M680x0: M68K-Opts. (line 6) 17415 * options, M68HC11: M68HC11-Opts. (line 6) 17416 * options, MMIX: MMIX-Opts. (line 6) 17417 * options, PJ: PJ Options. (line 6) 17418 * options, SH: SH Options. (line 6) 17419 * options, SH64: SH64 Options. (line 6) 17420 * options, TIC54X: TIC54X-Opts. (line 6) 17421 * options, Z8000: Z8000 Options. (line 6) 17422 * org directive: Org. (line 6) 17423 * other attribute, of a.out symbol: Symbol Other. (line 6) 17424 * output file: Object. (line 6) 17425 * p2align directive: P2align. (line 6) 17426 * p2alignl directive: P2align. (line 28) 17427 * p2alignw directive: P2align. (line 28) 17428 * padding the location counter: Align. (line 6) 17429 * padding the location counter given a power of two: P2align. (line 6) 17430 * padding the location counter given number of bytes: Balign. (line 6) 17431 * page, in listings: Eject. (line 6) 17432 * paper size, for listings: Psize. (line 6) 17433 * paths for .include: I. (line 6) 17434 * patterns, writing in memory: Fill. (line 6) 17435 * PDP-11 comments: PDP-11-Syntax. (line 16) 17436 * PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13) 17437 * PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10) 17438 * PDP-11 instruction naming: PDP-11-Mnemonics. (line 6) 17439 * PDP-11 support: PDP-11-Dependent. (line 6) 17440 * PDP-11 syntax: PDP-11-Syntax. (line 6) 17441 * PIC code generation for ARM: ARM Options. (line 120) 17442 * PIC code generation for M32R: M32R-Opts. (line 42) 17443 * PJ endianness: Overview. (line 513) 17444 * PJ options: PJ Options. (line 6) 17445 * PJ support: PJ-Dependent. (line 6) 17446 * plus, permitted arguments: Infix Ops. (line 44) 17447 * popsection directive: PopSection. (line 6) 17448 * Position-independent code, CRIS: CRIS-Opts. (line 27) 17449 * Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6) 17450 * PowerPC architectures: PowerPC-Opts. (line 6) 17451 * PowerPC directives: PowerPC-Pseudo. (line 6) 17452 * PowerPC options: PowerPC-Opts. (line 6) 17453 * PowerPC support: PPC-Dependent. (line 6) 17454 * precedence of operators: Infix Ops. (line 11) 17455 * precision, floating point: Flonums. (line 6) 17456 * prefix operators: Prefix Ops. (line 6) 17457 * prefixes, i386: i386-Prefixes. (line 6) 17458 * preprocessing: Preprocessing. (line 6) 17459 * preprocessing, turning on and off: Preprocessing. (line 27) 17460 * previous directive: Previous. (line 6) 17461 * primary attributes, COFF symbols: COFF Symbols. (line 13) 17462 * print directive: Print. (line 6) 17463 * proc directive, SPARC: Sparc-Directives. (line 25) 17464 * profiler directive, MSP 430: MSP430 Directives. (line 22) 17465 * profiling capability for MSP 430: MSP430 Profiling Capability. 17466 (line 6) 17467 * protected directive: Protected. (line 6) 17468 * pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45) 17469 * pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12) 17470 * pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17) 17471 * pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131) 17472 * pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97) 17473 * pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131) 17474 * pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50) 17475 * pseudo-op IS, MMIX: MMIX-Pseudos. (line 42) 17476 * pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7) 17477 * pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28) 17478 * pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108) 17479 * pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120) 17480 * pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108) 17481 * pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108) 17482 * pseudo-opcodes, M680x0: M68K-Branch. (line 6) 17483 * pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6) 17484 * pseudo-ops for branch, VAX: VAX-branch. (line 6) 17485 * pseudo-ops, CRIS: CRIS-Pseudos. (line 6) 17486 * pseudo-ops, machine independent: Pseudo Ops. (line 6) 17487 * pseudo-ops, MMIX: MMIX-Pseudos. (line 6) 17488 * psize directive: Psize. (line 6) 17489 * PSR bits: IA-64-Bits. (line 6) 17490 * pstring directive, TIC54X: TIC54X-Directives. (line 209) 17491 * psw register, V850: V850-Regs. (line 116) 17492 * purgem directive: Purgem. (line 6) 17493 * purpose of GNU assembler: GNU Assembler. (line 12) 17494 * pushsection directive: PushSection. (line 6) 17495 * quad directive: Quad. (line 6) 17496 * quad directive, i386: i386-Float. (line 21) 17497 * quad directive, x86-64: i386-Float. (line 21) 17498 * real-mode code, i386: i386-16bit. (line 6) 17499 * ref directive, TIC54X: TIC54X-Directives. (line 103) 17500 * register directive, SPARC: Sparc-Directives. (line 29) 17501 * register names, Alpha: Alpha-Regs. (line 6) 17502 * register names, ARC: ARC-Regs. (line 6) 17503 * register names, ARM: ARM-Regs. (line 6) 17504 * register names, CRIS: CRIS-Regs. (line 6) 17505 * register names, H8/300: H8/300-Regs. (line 6) 17506 * register names, IA-64: IA-64-Regs. (line 6) 17507 * register names, MMIX: MMIX-Regs. (line 6) 17508 * register names, MSP 430: MSP430-Regs. (line 6) 17509 * register names, V850: V850-Regs. (line 6) 17510 * register names, VAX: VAX-operands. (line 17) 17511 * register names, Xtensa: Xtensa Registers. (line 6) 17512 * register names, Z80: Z80-Regs. (line 6) 17513 * register operands, i386: i386-Syntax. (line 15) 17514 * register operands, x86-64: i386-Syntax. (line 15) 17515 * registers, D10V: D10V-Regs. (line 6) 17516 * registers, D30V: D30V-Regs. (line 6) 17517 * registers, i386: i386-Regs. (line 6) 17518 * registers, SH: SH-Regs. (line 6) 17519 * registers, SH64: SH64-Regs. (line 6) 17520 * registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6) 17521 * registers, x86-64: i386-Regs. (line 6) 17522 * registers, Z8000: Z8000-Regs. (line 6) 17523 * relaxation: Xtensa Relaxation. (line 6) 17524 * relaxation of ADDI instructions: Xtensa Immediate Relaxation. 17525 (line 43) 17526 * relaxation of branch instructions: Xtensa Branch Relaxation. 17527 (line 6) 17528 * relaxation of call instructions: Xtensa Call Relaxation. 17529 (line 6) 17530 * relaxation of immediate fields: Xtensa Immediate Relaxation. 17531 (line 6) 17532 * relaxation of L16SI instructions: Xtensa Immediate Relaxation. 17533 (line 23) 17534 * relaxation of L16UI instructions: Xtensa Immediate Relaxation. 17535 (line 23) 17536 * relaxation of L32I instructions: Xtensa Immediate Relaxation. 17537 (line 23) 17538 * relaxation of L8UI instructions: Xtensa Immediate Relaxation. 17539 (line 23) 17540 * relaxation of MOVI instructions: Xtensa Immediate Relaxation. 17541 (line 12) 17542 * relocation: Sections. (line 6) 17543 * relocation example: Ld Sections. (line 40) 17544 * relocations, Alpha: Alpha-Relocs. (line 6) 17545 * repeat prefixes, i386: i386-Prefixes. (line 44) 17546 * reporting bugs in assembler: Reporting Bugs. (line 6) 17547 * rept directive: Rept. (line 6) 17548 * req directive, ARM: ARM Directives. (line 13) 17549 * reserve directive, SPARC: Sparc-Directives. (line 39) 17550 * return instructions, i386: i386-Syntax. (line 38) 17551 * return instructions, x86-64: i386-Syntax. (line 38) 17552 * REX prefixes, i386: i386-Prefixes. (line 46) 17553 * rsect: Z8000 Directives. (line 52) 17554 * sblock directive, TIC54X: TIC54X-Directives. (line 183) 17555 * sbttl directive: Sbttl. (line 6) 17556 * schedule directive: Schedule Directive. (line 6) 17557 * scl directive: Scl. (line 6) 17558 * sdaoff pseudo-op, V850: V850 Opcodes. (line 65) 17559 * search path for .include: I. (line 6) 17560 * sect directive, MSP 430: MSP430 Directives. (line 18) 17561 * sect directive, TIC54X: TIC54X-Directives. (line 189) 17562 * section directive (COFF version): Section. (line 16) 17563 * section directive (ELF version): Section. (line 67) 17564 * section directive, V850: V850 Directives. (line 9) 17565 * section override prefixes, i386: i386-Prefixes. (line 23) 17566 * Section Stack <1>: SubSection. (line 6) 17567 * Section Stack <2>: Section. (line 62) 17568 * Section Stack <3>: PushSection. (line 6) 17569 * Section Stack <4>: PopSection. (line 6) 17570 * Section Stack: Previous. (line 6) 17571 * section-relative addressing: Secs Background. (line 68) 17572 * sections: Sections. (line 6) 17573 * sections in messages, internal: As Sections. (line 6) 17574 * sections, i386: i386-Syntax. (line 44) 17575 * sections, named: Ld Sections. (line 8) 17576 * sections, x86-64: i386-Syntax. (line 44) 17577 * seg directive, SPARC: Sparc-Directives. (line 44) 17578 * segm: Z8000 Directives. (line 10) 17579 * set directive: Set. (line 6) 17580 * set directive, TIC54X: TIC54X-Directives. (line 192) 17581 * SH addressing modes: SH-Addressing. (line 6) 17582 * SH floating point (IEEE): SH Floating Point. (line 6) 17583 * SH line comment character: SH-Chars. (line 6) 17584 * SH line separator: SH-Chars. (line 8) 17585 * SH machine directives: SH Directives. (line 6) 17586 * SH opcode summary: SH Opcodes. (line 6) 17587 * SH options: SH Options. (line 6) 17588 * SH registers: SH-Regs. (line 6) 17589 * SH support: SH-Dependent. (line 6) 17590 * SH64 ABI options: SH64 Options. (line 29) 17591 * SH64 addressing modes: SH64-Addressing. (line 6) 17592 * SH64 ISA options: SH64 Options. (line 6) 17593 * SH64 line comment character: SH64-Chars. (line 6) 17594 * SH64 line separator: SH64-Chars. (line 8) 17595 * SH64 machine directives: SH64 Directives. (line 9) 17596 * SH64 opcode summary: SH64 Opcodes. (line 6) 17597 * SH64 options: SH64 Options. (line 6) 17598 * SH64 registers: SH64-Regs. (line 6) 17599 * SH64 support: SH64-Dependent. (line 6) 17600 * shigh directive, M32R: M32R-Directives. (line 26) 17601 * short directive: Short. (line 6) 17602 * short directive, ARC: ARC Directives. (line 171) 17603 * short directive, TIC54X: TIC54X-Directives. (line 111) 17604 * SIMD, i386: i386-SIMD. (line 6) 17605 * SIMD, x86-64: i386-SIMD. (line 6) 17606 * single character constant: Chars. (line 6) 17607 * single directive: Single. (line 6) 17608 * single directive, i386: i386-Float. (line 14) 17609 * single directive, x86-64: i386-Float. (line 14) 17610 * single quote, Z80: Z80-Chars. (line 13) 17611 * sixteen bit integers: hword. (line 6) 17612 * sixteen byte integer: Octa. (line 6) 17613 * size directive (COFF version): Size. (line 11) 17614 * size directive (ELF version): Size. (line 19) 17615 * size modifiers, D10V: D10V-Size. (line 6) 17616 * size modifiers, D30V: D30V-Size. (line 6) 17617 * size modifiers, M680x0: M68K-Syntax. (line 8) 17618 * size prefixes, i386: i386-Prefixes. (line 27) 17619 * size suffixes, H8/300: H8/300 Opcodes. (line 163) 17620 * sizes operands, i386: i386-Syntax. (line 29) 17621 * sizes operands, x86-64: i386-Syntax. (line 29) 17622 * skip directive: Skip. (line 6) 17623 * skip directive, M680x0: M68K-Directives. (line 19) 17624 * skip directive, SPARC: Sparc-Directives. (line 48) 17625 * sleb128 directive: Sleb128. (line 6) 17626 * small objects, MIPS ECOFF: MIPS Object. (line 11) 17627 * SOM symbol attributes: SOM Symbols. (line 6) 17628 * source program: Input Files. (line 6) 17629 * source, destination operands; i386: i386-Syntax. (line 22) 17630 * source, destination operands; x86-64: i386-Syntax. (line 22) 17631 * sp register: Xtensa Registers. (line 6) 17632 * sp register, V850: V850-Regs. (line 14) 17633 * space directive: Space. (line 6) 17634 * space directive, TIC54X: TIC54X-Directives. (line 197) 17635 * space used, maximum for assembly: statistics. (line 6) 17636 * SPARC architectures: Sparc-Opts. (line 6) 17637 * SPARC data alignment: Sparc-Aligned-Data. (line 6) 17638 * SPARC floating point (IEEE): Sparc-Float. (line 6) 17639 * SPARC machine directives: Sparc-Directives. (line 6) 17640 * SPARC options: Sparc-Opts. (line 6) 17641 * SPARC support: Sparc-Dependent. (line 6) 17642 * special characters, ARC: ARC-Chars. (line 6) 17643 * special characters, M680x0: M68K-Chars. (line 6) 17644 * special purpose registers, MSP 430: MSP430-Regs. (line 11) 17645 * sslist directive, TIC54X: TIC54X-Directives. (line 204) 17646 * ssnolist directive, TIC54X: TIC54X-Directives. (line 204) 17647 * stabd directive: Stab. (line 38) 17648 * stabn directive: Stab. (line 48) 17649 * stabs directive: Stab. (line 51) 17650 * stabX directives: Stab. (line 6) 17651 * standard assembler sections: Secs Background. (line 27) 17652 * standard input, as input file: Command Line. (line 10) 17653 * statement separator character: Statements. (line 6) 17654 * statement separator, Alpha: Alpha-Chars. (line 8) 17655 * statement separator, ARM: ARM-Chars. (line 10) 17656 * statement separator, H8/300: H8/300-Chars. (line 8) 17657 * statement separator, IA-64: IA-64-Chars. (line 8) 17658 * statement separator, SH: SH-Chars. (line 8) 17659 * statement separator, SH64: SH64-Chars. (line 8) 17660 * statement separator, Z8000: Z8000-Chars. (line 8) 17661 * statements, structure of: Statements. (line 6) 17662 * statistics, about assembly: statistics. (line 6) 17663 * stopping the assembly: Abort. (line 6) 17664 * string constants: Strings. (line 6) 17665 * string directive: String. (line 6) 17666 * string directive on HPPA: HPPA Directives. (line 137) 17667 * string directive, TIC54X: TIC54X-Directives. (line 209) 17668 * string literals: Ascii. (line 6) 17669 * string, copying to object file: String. (line 6) 17670 * struct directive: Struct. (line 6) 17671 * struct directive, TIC54X: TIC54X-Directives. (line 217) 17672 * structure debugging, COFF: Tag. (line 6) 17673 * sub-instruction ordering, D10V: D10V-Chars. (line 6) 17674 * sub-instruction ordering, D30V: D30V-Chars. (line 6) 17675 * sub-instructions, D10V: D10V-Subs. (line 6) 17676 * sub-instructions, D30V: D30V-Subs. (line 6) 17677 * subexpressions: Arguments. (line 24) 17678 * subsection directive: SubSection. (line 6) 17679 * subsym builtins, TIC54X: TIC54X-Macros. (line 16) 17680 * subtitles for listings: Sbttl. (line 6) 17681 * subtraction, permitted arguments: Infix Ops. (line 49) 17682 * summary of options: Overview. (line 6) 17683 * support: HPPA-Dependent. (line 6) 17684 * supporting files, including: Include. (line 6) 17685 * suppressing warnings: W. (line 11) 17686 * sval: Z8000 Directives. (line 33) 17687 * symbol attributes: Symbol Attributes. (line 6) 17688 * symbol attributes, a.out: a.out Symbols. (line 6) 17689 * symbol attributes, COFF: COFF Symbols. (line 6) 17690 * symbol attributes, SOM: SOM Symbols. (line 6) 17691 * symbol descriptor, COFF: Desc. (line 6) 17692 * symbol modifiers <1>: M68HC11-Modifiers. (line 12) 17693 * symbol modifiers: M32C-Modifiers. (line 11) 17694 * symbol names: Symbol Names. (line 6) 17695 * symbol names, $ in <1>: SH64-Chars. (line 10) 17696 * symbol names, $ in <2>: SH-Chars. (line 10) 17697 * symbol names, $ in <3>: D30V-Chars. (line 63) 17698 * symbol names, $ in: D10V-Chars. (line 46) 17699 * symbol names, local: Symbol Names. (line 22) 17700 * symbol names, temporary: Symbol Names. (line 22) 17701 * symbol storage class (COFF): Scl. (line 6) 17702 * symbol type: Symbol Type. (line 6) 17703 * symbol type, COFF: Type. (line 11) 17704 * symbol type, ELF: Type. (line 22) 17705 * symbol value: Symbol Value. (line 6) 17706 * symbol value, setting: Set. (line 6) 17707 * symbol values, assigning: Setting Symbols. (line 6) 17708 * symbol versioning: Symver. (line 6) 17709 * symbol, common: Comm. (line 6) 17710 * symbol, making visible to linker: Global. (line 6) 17711 * symbolic debuggers, information for: Stab. (line 6) 17712 * symbols: Symbols. (line 6) 17713 * Symbols in position-independent code, CRIS: CRIS-Pic. (line 6) 17714 * symbols with uppercase, VAX/VMS: VAX-Opts. (line 42) 17715 * symbols, assigning values to: Equ. (line 6) 17716 * Symbols, built-in, CRIS: CRIS-Symbols. (line 6) 17717 * Symbols, CRIS, built-in: CRIS-Symbols. (line 6) 17718 * symbols, local common: Lcomm. (line 6) 17719 * symver directive: Symver. (line 6) 17720 * syntax compatibility, i386: i386-Syntax. (line 6) 17721 * syntax compatibility, x86-64: i386-Syntax. (line 6) 17722 * syntax, BFIN: BFIN Syntax. (line 6) 17723 * syntax, D10V: D10V-Syntax. (line 6) 17724 * syntax, D30V: D30V-Syntax. (line 6) 17725 * syntax, M32C: M32C-Modifiers. (line 6) 17726 * syntax, M680x0: M68K-Syntax. (line 8) 17727 * syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6) 17728 * syntax, M68HC11: M68HC11-Syntax. (line 6) 17729 * syntax, machine-independent: Syntax. (line 6) 17730 * syntax, Xtensa assembler: Xtensa Syntax. (line 6) 17731 * sysproc directive, i960: Directives-i960. (line 37) 17732 * tab (\t): Strings. (line 27) 17733 * tab directive, TIC54X: TIC54X-Directives. (line 248) 17734 * tag directive: Tag. (line 6) 17735 * tag directive, TIC54X: TIC54X-Directives. (line 217) 17736 * tdaoff pseudo-op, V850: V850 Opcodes. (line 81) 17737 * temporary symbol names: Symbol Names. (line 22) 17738 * text and data sections, joining: R. (line 6) 17739 * text directive: Text. (line 6) 17740 * text section: Ld Sections. (line 9) 17741 * tfloat directive, i386: i386-Float. (line 14) 17742 * tfloat directive, x86-64: i386-Float. (line 14) 17743 * thumb directive, ARM: ARM Directives. (line 33) 17744 * Thumb support: ARM-Dependent. (line 6) 17745 * thumb_func directive, ARM: ARM Directives. (line 43) 17746 * thumb_set directive, ARM: ARM Directives. (line 51) 17747 * TIC54X builtin math functions: TIC54X-Builtins. (line 6) 17748 * TIC54X machine directives: TIC54X-Directives. (line 6) 17749 * TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6) 17750 * TIC54X options: TIC54X-Opts. (line 6) 17751 * TIC54X subsym builtins: TIC54X-Macros. (line 16) 17752 * TIC54X support: TIC54X-Dependent. (line 6) 17753 * TIC54X-specific macros: TIC54X-Macros. (line 6) 17754 * time, total for assembly: statistics. (line 6) 17755 * title directive: Title. (line 6) 17756 * tp register, V850: V850-Regs. (line 20) 17757 * transform directive: Transform Directive. (line 6) 17758 * trusted compiler: f. (line 6) 17759 * turning preprocessing on and off: Preprocessing. (line 27) 17760 * type directive (COFF version): Type. (line 11) 17761 * type directive (ELF version): Type. (line 22) 17762 * type of a symbol: Symbol Type. (line 6) 17763 * ualong directive, SH: SH Directives. (line 6) 17764 * uaword directive, SH: SH Directives. (line 6) 17765 * ubyte directive, TIC54X: TIC54X-Directives. (line 36) 17766 * uchar directive, TIC54X: TIC54X-Directives. (line 36) 17767 * uhalf directive, TIC54X: TIC54X-Directives. (line 111) 17768 * uint directive, TIC54X: TIC54X-Directives. (line 111) 17769 * uleb128 directive: Uleb128. (line 6) 17770 * ulong directive, TIC54X: TIC54X-Directives. (line 135) 17771 * undefined section: Ld Sections. (line 36) 17772 * union directive, TIC54X: TIC54X-Directives. (line 251) 17773 * unreq directive, ARM: ARM Directives. (line 18) 17774 * unsegm: Z8000 Directives. (line 14) 17775 * usect directive, TIC54X: TIC54X-Directives. (line 263) 17776 * ushort directive, TIC54X: TIC54X-Directives. (line 111) 17777 * uword directive, TIC54X: TIC54X-Directives. (line 111) 17778 * V850 command line options: V850 Options. (line 9) 17779 * V850 floating point (IEEE): V850 Floating Point. (line 6) 17780 * V850 line comment character: V850-Chars. (line 6) 17781 * V850 machine directives: V850 Directives. (line 6) 17782 * V850 opcodes: V850 Opcodes. (line 6) 17783 * V850 options (none): V850 Options. (line 6) 17784 * V850 register names: V850-Regs. (line 6) 17785 * V850 support: V850-Dependent. (line 6) 17786 * val directive: Val. (line 6) 17787 * value attribute, COFF: Val. (line 6) 17788 * value of a symbol: Symbol Value. (line 6) 17789 * var directive, TIC54X: TIC54X-Directives. (line 273) 17790 * VAX bitfields not supported: VAX-no. (line 6) 17791 * VAX branch improvement: VAX-branch. (line 6) 17792 * VAX command-line options ignored: VAX-Opts. (line 6) 17793 * VAX displacement sizing character: VAX-operands. (line 12) 17794 * VAX floating point: VAX-float. (line 6) 17795 * VAX immediate character: VAX-operands. (line 6) 17796 * VAX indirect character: VAX-operands. (line 9) 17797 * VAX machine directives: VAX-directives. (line 6) 17798 * VAX opcode mnemonics: VAX-opcodes. (line 6) 17799 * VAX operand notation: VAX-operands. (line 6) 17800 * VAX register names: VAX-operands. (line 17) 17801 * VAX support: Vax-Dependent. (line 6) 17802 * Vax-11 C compatibility: VAX-Opts. (line 42) 17803 * VAX/VMS options: VAX-Opts. (line 42) 17804 * version directive: Version. (line 6) 17805 * version directive, TIC54X: TIC54X-Directives. (line 277) 17806 * version of assembler: v. (line 6) 17807 * versions of symbols: Symver. (line 6) 17808 * visibility <1>: Protected. (line 6) 17809 * visibility <2>: Internal. (line 6) 17810 * visibility: Hidden. (line 6) 17811 * VMS (VAX) options: VAX-Opts. (line 42) 17812 * vtable_entry directive: VTableEntry. (line 6) 17813 * vtable_inherit directive: VTableInherit. (line 6) 17814 * warning directive: Warning. (line 6) 17815 * warning for altered difference tables: K. (line 6) 17816 * warning messages: Errors. (line 6) 17817 * warnings, causing error: W. (line 16) 17818 * warnings, M32R: M32R-Warnings. (line 6) 17819 * warnings, suppressing: W. (line 11) 17820 * warnings, switching on: W. (line 19) 17821 * weak directive: Weak. (line 6) 17822 * weakref directive: Weakref. (line 6) 17823 * whitespace: Whitespace. (line 6) 17824 * whitespace, removed by preprocessor: Preprocessing. (line 7) 17825 * wide floating point directives, VAX: VAX-directives. (line 10) 17826 * width directive, TIC54X: TIC54X-Directives. (line 127) 17827 * Width of continuation lines of disassembly output: listing. (line 20) 17828 * Width of first line disassembly output: listing. (line 15) 17829 * Width of source line output: listing. (line 27) 17830 * wmsg directive, TIC54X: TIC54X-Directives. (line 77) 17831 * word directive: Word. (line 6) 17832 * word directive, ARC: ARC Directives. (line 174) 17833 * word directive, H8/300: H8/300 Directives. (line 6) 17834 * word directive, i386: i386-Float. (line 21) 17835 * word directive, SPARC: Sparc-Directives. (line 51) 17836 * word directive, TIC54X: TIC54X-Directives. (line 111) 17837 * word directive, x86-64: i386-Float. (line 21) 17838 * writing patterns in memory: Fill. (line 6) 17839 * wval: Z8000 Directives. (line 24) 17840 * x86-64 arch directive: i386-Arch. (line 6) 17841 * x86-64 att_syntax pseudo op: i386-Syntax. (line 6) 17842 * x86-64 conversion instructions: i386-Mnemonics. (line 32) 17843 * x86-64 floating point: i386-Float. (line 6) 17844 * x86-64 immediate operands: i386-Syntax. (line 15) 17845 * x86-64 instruction naming: i386-Mnemonics. (line 6) 17846 * x86-64 intel_syntax pseudo op: i386-Syntax. (line 6) 17847 * x86-64 jump optimization: i386-Jumps. (line 6) 17848 * x86-64 jump, call, return: i386-Syntax. (line 38) 17849 * x86-64 jump/call operands: i386-Syntax. (line 15) 17850 * x86-64 memory references: i386-Memory. (line 6) 17851 * x86-64 options: i386-Options. (line 6) 17852 * x86-64 register operands: i386-Syntax. (line 15) 17853 * x86-64 registers: i386-Regs. (line 6) 17854 * x86-64 sections: i386-Syntax. (line 44) 17855 * x86-64 size suffixes: i386-Syntax. (line 29) 17856 * x86-64 source, destination operands: i386-Syntax. (line 22) 17857 * x86-64 support: i386-Dependent. (line 6) 17858 * x86-64 syntax compatibility: i386-Syntax. (line 6) 17859 * xfloat directive, TIC54X: TIC54X-Directives. (line 64) 17860 * xlong directive, TIC54X: TIC54X-Directives. (line 135) 17861 * Xtensa architecture: Xtensa-Dependent. (line 6) 17862 * Xtensa assembler syntax: Xtensa Syntax. (line 6) 17863 * Xtensa directives: Xtensa Directives. (line 6) 17864 * Xtensa opcode names: Xtensa Opcodes. (line 6) 17865 * Xtensa register names: Xtensa Registers. (line 6) 17866 * xword directive, SPARC: Sparc-Directives. (line 55) 17867 * Z80 $: Z80-Chars. (line 8) 17868 * Z80 ': Z80-Chars. (line 13) 17869 * Z80 floating point: Z80 Floating Point. (line 6) 17870 * Z80 line comment character: Z80-Chars. (line 6) 17871 * Z80 options: Z80 Options. (line 6) 17872 * Z80 registers: Z80-Regs. (line 6) 17873 * Z80 support: Z80-Dependent. (line 6) 17874 * Z80 Syntax: Z80 Options. (line 47) 17875 * Z80, \: Z80-Chars. (line 11) 17876 * Z80, case sensitivity: Z80-Case. (line 6) 17877 * Z80-only directives: Z80 Directives. (line 9) 17878 * Z800 addressing modes: Z8000-Addressing. (line 6) 17879 * Z8000 directives: Z8000 Directives. (line 6) 17880 * Z8000 line comment character: Z8000-Chars. (line 6) 17881 * Z8000 line separator: Z8000-Chars. (line 8) 17882 * Z8000 opcode summary: Z8000 Opcodes. (line 6) 17883 * Z8000 options: Z8000 Options. (line 6) 17884 * Z8000 registers: Z8000-Regs. (line 6) 17885 * Z8000 support: Z8000-Dependent. (line 6) 17886 * zdaoff pseudo-op, V850: V850 Opcodes. (line 99) 17887 * zero register, V850: V850-Regs. (line 7) 17888 * zero-terminated strings: Asciz. (line 6) 17889 17890 17891 17892 Tag Table: 17893 Node: Top778 17894 Node: Overview1695 17895 Node: Manual28187 17896 Node: GNU Assembler29131 17897 Node: Object Formats30302 17898 Node: Command Line30754 17899 Node: Input Files31841 17900 Node: Object33822 17901 Node: Errors34718 17902 Node: Invoking35913 17903 Node: a37862 17904 Node: alternate39634 17905 Node: D39806 17906 Node: f40039 17907 Node: I40547 17908 Node: K41091 17909 Node: L41394 17910 Node: listing42231 17911 Node: M43823 17912 Node: MD48224 17913 Node: o48650 17914 Node: R49105 17915 Node: statistics50135 17916 Node: traditional-format50542 17917 Node: v51015 17918 Node: W51290 17919 Node: Z52197 17920 Node: Syntax52719 17921 Node: Preprocessing53310 17922 Node: Whitespace54873 17923 Node: Comments55269 17924 Node: Symbol Intro57422 17925 Node: Statements58112 17926 Node: Constants60028 17927 Node: Characters60659 17928 Node: Strings61161 17929 Node: Chars63327 17930 Node: Numbers64081 17931 Node: Integers64621 17932 Node: Bignums65277 17933 Node: Flonums65633 17934 Node: Sections67380 17935 Node: Secs Background67758 17936 Node: Ld Sections72797 17937 Node: As Sections75181 17938 Node: Sub-Sections76091 17939 Node: bss79238 17940 Node: Symbols80188 17941 Node: Labels80836 17942 Node: Setting Symbols81567 17943 Node: Symbol Names82063 17944 Node: Dot86428 17945 Node: Symbol Attributes86875 17946 Node: Symbol Value87612 17947 Node: Symbol Type88657 17948 Node: a.out Symbols89045 17949 Node: Symbol Desc89307 17950 Node: Symbol Other89602 17951 Node: COFF Symbols89771 17952 Node: SOM Symbols90444 17953 Node: Expressions90886 17954 Node: Empty Exprs91635 17955 Node: Integer Exprs91982 17956 Node: Arguments92377 17957 Node: Operators93483 17958 Node: Prefix Ops93818 17959 Node: Infix Ops94146 17960 Node: Pseudo Ops96536 17961 Node: Abort101731 17962 Node: ABORT102136 17963 Node: Align102323 17964 Node: Ascii104605 17965 Node: Asciz104914 17966 Node: Balign105159 17967 Node: Byte107022 17968 Node: Comm107260 17969 Node: CFI directives108634 17970 Node: LNS directives110986 17971 Node: Data113063 17972 Node: Def113390 17973 Node: Desc113622 17974 Node: Dim114122 17975 Node: Double114379 17976 Node: Eject114717 17977 Node: Else114892 17978 Node: Elseif115188 17979 Node: End115478 17980 Node: Endef115693 17981 Node: Endfunc115870 17982 Node: Endif116045 17983 Node: Equ116306 17984 Node: Equiv116815 17985 Node: Eqv117371 17986 Node: Err117735 17987 Node: Error118046 17988 Node: Exitm118491 17989 Node: Extern118660 17990 Node: Fail118921 17991 Node: File119366 17992 Node: Fill119843 17993 Node: Float120807 17994 Node: Func121149 17995 Node: Global121739 17996 Node: Hidden122489 17997 Node: hword123068 17998 Node: Ident123396 17999 Node: If123970 18000 Node: Incbin127029 18001 Node: Include127724 18002 Node: Int128275 18003 Node: Internal128656 18004 Node: Irp129304 18005 Node: Irpc130201 18006 Node: Lcomm131118 18007 Node: Lflags131866 18008 Node: Line132060 18009 Node: Linkonce132979 18010 Node: Ln134208 18011 Node: MRI134369 18012 Node: List134707 18013 Node: Long135315 18014 Node: Macro135501 18015 Node: Altmacro140064 18016 Node: Noaltmacro141394 18017 Node: Nolist141562 18018 Node: Octa141992 18019 Node: Org142326 18020 Node: P2align143609 18021 Node: Previous145537 18022 Node: PopSection146231 18023 Node: Print146739 18024 Node: Protected146968 18025 Node: Psize147615 18026 Node: Purgem148299 18027 Node: PushSection148520 18028 Node: Quad149077 18029 Node: Rept149532 18030 Node: Sbttl149945 18031 Node: Scl150310 18032 Node: Section150651 18033 Node: Set155791 18034 Node: Short156428 18035 Node: Single156748 18036 Node: Size157093 18037 Node: Sleb128157765 18038 Node: Skip158087 18039 Node: Space158409 18040 Node: Stab159048 18041 Node: String161050 18042 Node: Struct161476 18043 Node: SubSection162199 18044 Node: Symver162760 18045 Node: Tag165151 18046 Node: Text165531 18047 Node: Title165850 18048 Node: Type166229 18049 Node: Uleb128167306 18050 Node: Val167630 18051 Node: Version167880 18052 Node: VTableEntry168155 18053 Node: VTableInherit168445 18054 Node: Warning168891 18055 Node: Weak169125 18056 Node: Weakref169794 18057 Node: Word170759 18058 Node: Deprecated172605 18059 Node: Machine Dependencies172840 18060 Node: Alpha-Dependent175604 18061 Node: Alpha Notes176018 18062 Node: Alpha Options176299 18063 Node: Alpha Syntax178497 18064 Node: Alpha-Chars178966 18065 Node: Alpha-Regs179197 18066 Node: Alpha-Relocs179584 18067 Node: Alpha Floating Point185842 18068 Node: Alpha Directives186064 18069 Node: Alpha Opcodes191587 18070 Node: ARC-Dependent191882 18071 Node: ARC Options192265 18072 Node: ARC Syntax193334 18073 Node: ARC-Chars193566 18074 Node: ARC-Regs193698 18075 Node: ARC Floating Point193822 18076 Node: ARC Directives194133 18077 Node: ARC Opcodes200104 18078 Node: ARM-Dependent200330 18079 Node: ARM Options200757 18080 Node: ARM Syntax206551 18081 Node: ARM-Chars206783 18082 Node: ARM-Regs207307 18083 Node: ARM Floating Point207492 18084 Node: ARM Directives207691 18085 Node: ARM Opcodes214055 18086 Node: ARM Mapping Symbols216143 18087 Node: BFIN-Dependent216922 18088 Node: BFIN Syntax217176 18089 Node: BFIN Directives222873 18090 Node: CRIS-Dependent223280 18091 Node: CRIS-Opts223626 18092 Ref: march-option225244 18093 Node: CRIS-Expand227061 18094 Node: CRIS-Symbols228244 18095 Node: CRIS-Syntax229413 18096 Node: CRIS-Chars229749 18097 Node: CRIS-Pic230300 18098 Ref: crispic230496 18099 Node: CRIS-Regs234036 18100 Node: CRIS-Pseudos234453 18101 Ref: crisnous235229 18102 Node: D10V-Dependent236511 18103 Node: D10V-Opts236862 18104 Node: D10V-Syntax237825 18105 Node: D10V-Size238354 18106 Node: D10V-Subs239327 18107 Node: D10V-Chars240362 18108 Node: D10V-Regs241966 18109 Node: D10V-Addressing243011 18110 Node: D10V-Word243697 18111 Node: D10V-Float244212 18112 Node: D10V-Opcodes244523 18113 Node: D30V-Dependent244916 18114 Node: D30V-Opts245269 18115 Node: D30V-Syntax245944 18116 Node: D30V-Size246476 18117 Node: D30V-Subs247447 18118 Node: D30V-Chars248482 18119 Node: D30V-Guarded250780 18120 Node: D30V-Regs251460 18121 Node: D30V-Addressing252599 18122 Node: D30V-Float253267 18123 Node: D30V-Opcodes253578 18124 Node: H8/300-Dependent253971 18125 Node: H8/300 Options254381 18126 Node: H8/300 Syntax254590 18127 Node: H8/300-Chars254889 18128 Node: H8/300-Regs255186 18129 Node: H8/300-Addressing256103 18130 Node: H8/300 Floating Point257142 18131 Node: H8/300 Directives257467 18132 Node: H8/300 Opcodes258593 18133 Node: HPPA-Dependent266913 18134 Node: HPPA Notes267346 18135 Node: HPPA Options268102 18136 Node: HPPA Syntax268295 18137 Node: HPPA Floating Point269563 18138 Node: HPPA Directives269767 18139 Node: HPPA Opcodes278451 18140 Node: ESA/390-Dependent278708 18141 Node: ESA/390 Notes279168 18142 Node: ESA/390 Options279959 18143 Node: ESA/390 Syntax280169 18144 Node: ESA/390 Floating Point282342 18145 Node: ESA/390 Directives282621 18146 Node: ESA/390 Opcodes285910 18147 Node: i386-Dependent286172 18148 Node: i386-Options287240 18149 Node: i386-Syntax288430 18150 Node: i386-Mnemonics290844 18151 Node: i386-Regs293309 18152 Node: i386-Prefixes295354 18153 Node: i386-Memory298114 18154 Node: i386-Jumps301051 18155 Node: i386-Float302172 18156 Node: i386-SIMD304001 18157 Node: i386-16bit305110 18158 Node: i386-Bugs307148 18159 Node: i386-Arch307902 18160 Node: i386-Notes310083 18161 Node: i860-Dependent310941 18162 Node: Notes-i860311337 18163 Node: Options-i860312242 18164 Node: Directives-i860313605 18165 Node: Opcodes for i860314674 18166 Node: i960-Dependent316841 18167 Node: Options-i960317244 18168 Node: Floating Point-i960321128 18169 Node: Directives-i960321396 18170 Node: Opcodes for i960323430 18171 Node: callj-i960324047 18172 Node: Compare-and-branch-i960324536 18173 Node: IA-64-Dependent326440 18174 Node: IA-64 Options326741 18175 Node: IA-64 Syntax329901 18176 Node: IA-64-Chars330264 18177 Node: IA-64-Regs330494 18178 Node: IA-64-Bits331420 18179 Node: IA-64 Opcodes331929 18180 Node: IP2K-Dependent332201 18181 Node: IP2K-Opts332429 18182 Node: M32C-Dependent332909 18183 Node: M32C-Opts333433 18184 Node: M32C-Modifiers333717 18185 Node: M32R-Dependent335504 18186 Node: M32R-Opts335825 18187 Node: M32R-Directives339991 18188 Node: M32R-Warnings343966 18189 Node: M68K-Dependent346972 18190 Node: M68K-Opts347439 18191 Node: M68K-Syntax354818 18192 Node: M68K-Moto-Syntax356657 18193 Node: M68K-Float359246 18194 Node: M68K-Directives359766 18195 Node: M68K-opcodes361092 18196 Node: M68K-Branch361318 18197 Node: M68K-Chars365516 18198 Node: M68HC11-Dependent365929 18199 Node: M68HC11-Opts366460 18200 Node: M68HC11-Syntax370276 18201 Node: M68HC11-Modifiers372490 18202 Node: M68HC11-Directives374318 18203 Node: M68HC11-Float375694 18204 Node: M68HC11-opcodes376222 18205 Node: M68HC11-Branch376404 18206 Node: MIPS-Dependent378851 18207 Node: MIPS Opts379941 18208 Node: MIPS Object387268 18209 Node: MIPS Stabs388834 18210 Node: MIPS symbol sizes389556 18211 Node: MIPS ISA391225 18212 Node: MIPS autoextend392374 18213 Node: MIPS insn393104 18214 Node: MIPS option stack393601 18215 Node: MIPS ASE instruction generation overrides394375 18216 Node: MMIX-Dependent395592 18217 Node: MMIX-Opts395972 18218 Node: MMIX-Expand399576 18219 Node: MMIX-Syntax400891 18220 Ref: mmixsite401248 18221 Node: MMIX-Chars402089 18222 Node: MMIX-Symbols402743 18223 Node: MMIX-Regs404811 18224 Node: MMIX-Pseudos405836 18225 Ref: MMIX-loc405977 18226 Ref: MMIX-local407057 18227 Ref: MMIX-is407589 18228 Ref: MMIX-greg407860 18229 Ref: GREG-base408779 18230 Ref: MMIX-byte410096 18231 Ref: MMIX-constants410567 18232 Ref: MMIX-prefix411213 18233 Ref: MMIX-spec411587 18234 Node: MMIX-mmixal411921 18235 Node: MSP430-Dependent415418 18236 Node: MSP430 Options415884 18237 Node: MSP430 Syntax416170 18238 Node: MSP430-Macros416486 18239 Node: MSP430-Chars417217 18240 Node: MSP430-Regs417530 18241 Node: MSP430-Ext418090 18242 Node: MSP430 Floating Point419911 18243 Node: MSP430 Directives420135 18244 Node: MSP430 Opcodes420926 18245 Node: MSP430 Profiling Capability421321 18246 Node: PDP-11-Dependent423650 18247 Node: PDP-11-Options424039 18248 Node: PDP-11-Pseudos429110 18249 Node: PDP-11-Syntax429455 18250 Node: PDP-11-Mnemonics430206 18251 Node: PDP-11-Synthetic430508 18252 Node: PJ-Dependent430726 18253 Node: PJ Options430951 18254 Node: PPC-Dependent431228 18255 Node: PowerPC-Opts431515 18256 Node: PowerPC-Pseudo433590 18257 Node: SH-Dependent434189 18258 Node: SH Options434601 18259 Node: SH Syntax435529 18260 Node: SH-Chars435802 18261 Node: SH-Regs436096 18262 Node: SH-Addressing436710 18263 Node: SH Floating Point437619 18264 Node: SH Directives438713 18265 Node: SH Opcodes439083 18266 Node: SH64-Dependent443405 18267 Node: SH64 Options443768 18268 Node: SH64 Syntax445485 18269 Node: SH64-Chars445768 18270 Node: SH64-Regs446068 18271 Node: SH64-Addressing447164 18272 Node: SH64 Directives448347 18273 Node: SH64 Opcodes449457 18274 Node: Sparc-Dependent450173 18275 Node: Sparc-Opts450558 18276 Node: Sparc-Aligned-Data452815 18277 Node: Sparc-Float453670 18278 Node: Sparc-Directives453871 18279 Node: TIC54X-Dependent455831 18280 Node: TIC54X-Opts456557 18281 Node: TIC54X-Block457600 18282 Node: TIC54X-Env457960 18283 Node: TIC54X-Constants458308 18284 Node: TIC54X-Subsyms458710 18285 Node: TIC54X-Locals460619 18286 Node: TIC54X-Builtins461363 18287 Node: TIC54X-Ext463834 18288 Node: TIC54X-Directives464405 18289 Node: TIC54X-Macros475307 18290 Node: TIC54X-MMRegs477417 18291 Node: Z80-Dependent477633 18292 Node: Z80 Options478021 18293 Node: Z80 Syntax479444 18294 Node: Z80-Chars480116 18295 Node: Z80-Regs480649 18296 Node: Z80-Case481001 18297 Node: Z80 Floating Point481446 18298 Node: Z80 Directives481640 18299 Node: Z80 Opcodes483265 18300 Node: Z8000-Dependent484607 18301 Node: Z8000 Options485568 18302 Node: Z8000 Syntax485785 18303 Node: Z8000-Chars486075 18304 Node: Z8000-Regs486308 18305 Node: Z8000-Addressing487098 18306 Node: Z8000 Directives488215 18307 Node: Z8000 Opcodes489824 18308 Node: Vax-Dependent499766 18309 Node: VAX-Opts500283 18310 Node: VAX-float504018 18311 Node: VAX-directives504650 18312 Node: VAX-opcodes505511 18313 Node: VAX-branch505900 18314 Node: VAX-operands508407 18315 Node: VAX-no509170 18316 Node: V850-Dependent509407 18317 Node: V850 Options509805 18318 Node: V850 Syntax512194 18319 Node: V850-Chars512434 18320 Node: V850-Regs512599 18321 Node: V850 Floating Point514167 18322 Node: V850 Directives514373 18323 Node: V850 Opcodes515516 18324 Node: Xtensa-Dependent521408 18325 Node: Xtensa Options522137 18326 Node: Xtensa Syntax524908 18327 Node: Xtensa Opcodes526797 18328 Node: Xtensa Registers528591 18329 Node: Xtensa Optimizations529224 18330 Node: Density Instructions529676 18331 Node: Xtensa Automatic Alignment530778 18332 Node: Xtensa Relaxation533524 18333 Node: Xtensa Branch Relaxation534432 18334 Node: Xtensa Call Relaxation535804 18335 Node: Xtensa Immediate Relaxation537590 18336 Node: Xtensa Directives540164 18337 Node: Schedule Directive541872 18338 Node: Longcalls Directive542212 18339 Node: Transform Directive542756 18340 Node: Literal Directive543498 18341 Node: Literal Position Directive545283 18342 Node: Literal Prefix Directive546982 18343 Node: Absolute Literals Directive549145 18344 Node: Reporting Bugs550452 18345 Node: Bug Criteria551176 18346 Node: Bug Reporting551941 18347 Node: Acknowledgements558574 18348 Ref: Acknowledgements-Footnote-1563472 18349 Node: GNU Free Documentation License563498 18350 Node: Index583225 18351 18352 End Tag Table 18353
