1 //===- MipsInstrInfo.h - Mips Instruction Information -----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips implementation of the TargetInstrInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef MIPSINSTRUCTIONINFO_H 15 #define MIPSINSTRUCTIONINFO_H 16 17 #include "Mips.h" 18 #include "llvm/Support/ErrorHandling.h" 19 #include "llvm/Target/TargetInstrInfo.h" 20 #include "MipsRegisterInfo.h" 21 22 #define GET_INSTRINFO_HEADER 23 #include "MipsGenInstrInfo.inc" 24 25 namespace llvm { 26 27 namespace Mips { 28 /// GetOppositeBranchOpc - Return the inverse of the specified 29 /// opcode, e.g. turning BEQ to BNE. 30 unsigned GetOppositeBranchOpc(unsigned Opc); 31 } 32 33 /// MipsII - This namespace holds all of the target specific flags that 34 /// instruction info tracks. 35 /// 36 namespace MipsII { 37 /// Target Operand Flag enum. 38 enum TOF { 39 //===------------------------------------------------------------------===// 40 // Mips Specific MachineOperand flags. 41 42 MO_NO_FLAG, 43 44 /// MO_GOT - Represents the offset into the global offset table at which 45 /// the address the relocation entry symbol resides during execution. 46 MO_GOT, 47 48 /// MO_GOT_CALL - Represents the offset into the global offset table at 49 /// which the address of a call site relocation entry symbol resides 50 /// during execution. This is different from the above since this flag 51 /// can only be present in call instructions. 52 MO_GOT_CALL, 53 54 /// MO_GPREL - Represents the offset from the current gp value to be used 55 /// for the relocatable object file being produced. 56 MO_GPREL, 57 58 /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol 59 /// address. 60 MO_ABS_HI, 61 MO_ABS_LO, 62 63 /// MO_TLSGD - Represents the offset into the global offset table at which 64 // the module ID and TSL block offset reside during execution (General 65 // Dynamic TLS). 66 MO_TLSGD, 67 68 /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial 69 // Exec TLS). 70 MO_GOTTPREL, 71 72 /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from 73 // the thread pointer (Local Exec TLS). 74 MO_TPREL_HI, 75 MO_TPREL_LO 76 }; 77 } 78 79 class MipsInstrInfo : public MipsGenInstrInfo { 80 MipsTargetMachine &TM; 81 const MipsRegisterInfo RI; 82 public: 83 explicit MipsInstrInfo(MipsTargetMachine &TM); 84 85 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 86 /// such, whenever a client has an instance of instruction info, it should 87 /// always be able to get register info as well (through this method). 88 /// 89 virtual const MipsRegisterInfo &getRegisterInfo() const; 90 91 /// isLoadFromStackSlot - If the specified machine instruction is a direct 92 /// load from a stack slot, return the virtual or physical register number of 93 /// the destination along with the FrameIndex of the loaded stack slot. If 94 /// not, return 0. This predicate must return 0 if the instruction has 95 /// any side effects other than loading from the stack slot. 96 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 97 int &FrameIndex) const; 98 99 /// isStoreToStackSlot - If the specified machine instruction is a direct 100 /// store to a stack slot, return the virtual or physical register number of 101 /// the source reg along with the FrameIndex of the loaded stack slot. If 102 /// not, return 0. This predicate must return 0 if the instruction has 103 /// any side effects other than storing to the stack slot. 104 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 105 int &FrameIndex) const; 106 107 /// Branch Analysis 108 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 109 MachineBasicBlock *&FBB, 110 SmallVectorImpl<MachineOperand> &Cond, 111 bool AllowModify) const; 112 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 113 114 private: 115 void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, 116 const SmallVectorImpl<MachineOperand>& Cond) const; 117 118 public: 119 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 120 MachineBasicBlock *FBB, 121 const SmallVectorImpl<MachineOperand> &Cond, 122 DebugLoc DL) const; 123 virtual void copyPhysReg(MachineBasicBlock &MBB, 124 MachineBasicBlock::iterator MI, DebugLoc DL, 125 unsigned DestReg, unsigned SrcReg, 126 bool KillSrc) const; 127 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 128 MachineBasicBlock::iterator MBBI, 129 unsigned SrcReg, bool isKill, int FrameIndex, 130 const TargetRegisterClass *RC, 131 const TargetRegisterInfo *TRI) const; 132 133 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 134 MachineBasicBlock::iterator MBBI, 135 unsigned DestReg, int FrameIndex, 136 const TargetRegisterClass *RC, 137 const TargetRegisterInfo *TRI) const; 138 139 virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF, 140 int FrameIx, uint64_t Offset, 141 const MDNode *MDPtr, 142 DebugLoc DL) const; 143 144 virtual 145 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 146 147 /// Insert nop instruction when hazard condition is found 148 virtual void insertNoop(MachineBasicBlock &MBB, 149 MachineBasicBlock::iterator MI) const; 150 151 /// getGlobalBaseReg - Return a virtual register initialized with the 152 /// the global base register value. Output instructions required to 153 /// initialize the register in the function entry block, if necessary. 154 /// 155 unsigned getGlobalBaseReg(MachineFunction *MF) const; 156 }; 157 158 } 159 160 #endif 161
