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  /external/llvm/include/llvm/MC/
MCInst.h 10 // This file contains the declaration of the MCInst and MCOperand classes, which
29 /// MCOperand - Instances of this class represent operands of the MCInst class.
31 class MCOperand {
49 MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
97 static MCOperand CreateReg(unsigned Reg) {
98 MCOperand Op;
103 static MCOperand CreateImm(int64_t Val) {
104 MCOperand Op;
109 static MCOperand CreateFPImm(double Val) {
110 MCOperand Op
    [all...]
  /external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp     [all...]
ARMMCInstLower.cpp 26 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
63 return MCOperand::CreateExpr(Expr);
68 MCOperand &MCOp) {
78 MCOp = MCOperand::CreateReg(MO.getReg());
81 MCOp = MCOperand::CreateImm(MO.getImm());
84 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
107 MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
121 MCOperand MCOp;
ARMAsmPrinter.h 24 class MCOperand;
77 // lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
78 bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
112 MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol);
ARMMCCodeEmitter.cpp 71 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
402 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
425 llvm_unreachable("Unable to encode MCOperand!");
433 const MCOperand &MO = MI.getOperand(OpIdx);
434 const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
460 const MCOperand &MO = MI.getOperand(OpIdx);
514 const MCOperand &MCOp1 = MI.getOperand(i);
515 const MCOperand &MCOp2 = MI.getOperand(i + 1);
615 const MCOperand &MO1 = MI.getOperand(OpIdx);
616 const MCOperand &MO2 = MI.getOperand(OpIdx + 1)
    [all...]
  /external/llvm/lib/Target/Mips/
MipsMCInstLower.h 19 class MCOperand;
38 MCOperand LowerSymbolOperand(const MachineOperand &MO,
MipsMCInstLower.cpp 31 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
82 return MCOperand::CreateExpr(MipsMCSymbolRefExpr::Create(Kind, Symbol, Offset,
91 MCOperand MCOp;
101 MCOp = MCOperand::CreateReg(MO.getReg());
104 MCOp = MCOperand::CreateImm(MO.getImm());
  /external/llvm/lib/Target/X86/Disassembler/
X86Disassembler.cpp 152 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum));
209 mcInst.addOperand(MCOperand::CreateImm(immediate));
240 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break;
269 MCOperand baseReg;
270 MCOperand scaleAmount;
271 MCOperand indexReg;
272 MCOperand displacement;
273 MCOperand segmentReg;
283 baseReg = MCOperand::CreateReg(X86::x); break;
288 baseReg = MCOperand::CreateReg(0)
    [all...]
  /external/llvm/lib/Target/X86/
X86MCInstLower.h 19 class MCOperand;
44 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
  /external/llvm/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp 42 const MCOperand &Dst = MI->getOperand(0);
43 const MCOperand &MO1 = MI->getOperand(1);
44 const MCOperand &MO2 = MI->getOperand(2);
45 const MCOperand &MO3 = MI->getOperand(3);
140 const MCOperand &Op = MI->getOperand(OpNo);
159 const MCOperand &MO1 = MI->getOperand(OpNum);
160 const MCOperand &MO2 = MI->getOperand(OpNum+1);
161 const MCOperand &MO3 = MI->getOperand(OpNum+2);
184 const MCOperand &MO1 = MI->getOperand(Op);
185 const MCOperand &MO2 = MI->getOperand(Op+1)
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430MCInstLower.cpp 91 MCOperand MSP430MCInstLower::
106 return MCOperand::CreateExpr(Expr);
115 MCOperand MCOp;
123 MCOp = MCOperand::CreateReg(MO.getReg());
126 MCOp = MCOperand::CreateImm(MO.getImm());
129 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MSP430MCInstLower.h 20 class MCOperand;
39 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
  /external/llvm/lib/Target/X86/InstPrinter/
X86ATTInstPrinter.cpp 77 const MCOperand &Op = MI->getOperand(OpNo);
89 const MCOperand &Op = MI->getOperand(OpNo);
106 const MCOperand &BaseReg = MI->getOperand(Op);
107 const MCOperand &IndexReg = MI->getOperand(Op+2);
108 const MCOperand &DispSpec = MI->getOperand(Op+3);
109 const MCOperand &SegReg = MI->getOperand(Op+4);
X86IntelInstPrinter.cpp 65 const MCOperand &Op = MI->getOperand(OpNo);
81 const MCOperand &Op = MI->getOperand(OpNo);
94 const MCOperand &BaseReg = MI->getOperand(Op);
96 const MCOperand &IndexReg = MI->getOperand(Op+2);
97 const MCOperand &DispSpec = MI->getOperand(Op+3);
98 const MCOperand &SegReg = MI->getOperand(Op+4);
  /external/llvm/lib/Target/MBlaze/
MBlazeMCInstLower.h 20 class MCOperand;
39 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
MBlazeMCInstLower.cpp 97 MCOperand MBlazeMCInstLower::
114 return MCOperand::CreateExpr(Expr);
123 MCOperand MCOp;
129 MCOp = MCOperand::CreateReg(MO.getReg());
132 MCOp = MCOperand::CreateImm(MO.getImm());
135 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
160 MCOp = MCOperand::CreateImm(Val);
  /external/llvm/lib/Target/MSP430/InstPrinter/
MSP430InstPrinter.cpp 34 const MCOperand &Op = MI->getOperand(OpNo);
46 const MCOperand &Op = MI->getOperand(OpNo);
60 const MCOperand &Base = MI->getOperand(OpNo);
61 const MCOperand &Disp = MI->getOperand(OpNo+1);
MSP430InstPrinter.h 20 class MCOperand;
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassemblerCore.cpp 32 /// the quest to build out the MCOperand list for an MCInst.
54 /// So the first predicate MCOperand corresponds to the immediate part of the
55 /// ARM condition field (Inst{31-28}), and the second predicate MCOperand
615 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
621 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
625 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
627 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
634 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
724 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
728 MI.addOperand(MCOperand::CreateImm(coproc))
    [all...]
ThumbDisassemblerCore.h 368 MI.addOperand(MCOperand::CreateReg(
376 MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
384 MI.addOperand(MCOperand::CreateReg(
397 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
413 MI.addOperand(MCOperand::CreateImm(Imm));
440 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
447 MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
466 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
500 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
522 MI.addOperand(MCOperand::CreateReg
    [all...]
  /external/llvm/lib/Target/MBlaze/InstPrinter/
MBlazeInstPrinter.cpp 35 const MCOperand &Op = MI->getOperand(OpNo);
48 const MCOperand &MO = MI->getOperand(OpNo);
57 const MCOperand &MO = MI->getOperand(OpNo);
MBlazeInstPrinter.h 20 class MCOperand;
  /external/llvm/lib/Target/MBlaze/Disassembler/
MBlazeDisassembler.cpp 537 instr.addOperand(MCOperand::CreateReg(RD));
538 instr.addOperand(MCOperand::CreateReg(RB));
539 instr.addOperand(MCOperand::CreateReg(RA));
545 instr.addOperand(MCOperand::CreateReg(RD));
546 instr.addOperand(MCOperand::CreateReg(RA));
547 instr.addOperand(MCOperand::CreateReg(RB));
557 instr.addOperand(MCOperand::CreateReg(RD));
558 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF));
563 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF));
564 instr.addOperand(MCOperand::CreateReg(RA))
    [all...]
  /external/llvm/lib/Target/Mips/InstPrinter/
MipsInstPrinter.cpp 78 const MCOperand &Op = MI->getOperand(OpNo);
95 const MCOperand &MO = MI->getOperand(opNum);
125 const MCOperand& MO = MI->getOperand(opNum);
  /external/llvm/lib/Target/PowerPC/
PPCMCCodeEmitter.cpp 56 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
89 const MCOperand &MO = MI.getOperand(OpNo);
100 const MCOperand &MO = MI.getOperand(OpNo);
111 const MCOperand &MO = MI.getOperand(OpNo);
122 const MCOperand &MO = MI.getOperand(OpNo);
138 const MCOperand &MO = MI.getOperand(OpNo);
156 const MCOperand &MO = MI.getOperand(OpNo);
170 const MCOperand &MO = MI.getOperand(OpNo);
178 getMachineOpValue(const MCInst &MI, const MCOperand &MO,

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