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    Searched refs:TmpInst (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp     [all...]
  /external/llvm/lib/Target/MSP430/
MSP430AsmPrinter.cpp 161 MCInst TmpInst;
162 MCInstLowering.Lower(MI, TmpInst);
163 OutStreamer.EmitInstruction(TmpInst);
  /external/llvm/lib/Target/PowerPC/
PPCAsmPrinter.cpp 296 MCInst TmpInst;
332 TmpInst.setOpcode(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
337 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::
339 OutStreamer.EmitInstruction(TmpInst);
347 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
351 TmpInst.setOpcode(PPC::LD);
363 TmpInst.getOperand(1) = MCOperand::CreateExpr(Exp);
364 OutStreamer.EmitInstruction(TmpInst);
373 TmpInst.setOpcode(PPC::MFCR);
374 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()))
    [all...]
  /external/llvm/lib/Target/X86/
X86MCInstLower.cpp 626 MCInst TmpInst;
635 TmpInst.setOpcode(X86::CALLpcrel32);
638 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create(PICBase,
640 OutStreamer.EmitInstruction(TmpInst);
646 TmpInst.setOpcode(X86::POP32r);
647 TmpInst.getOperand(0) = MCOperand::CreateReg(MI->getOperand(0).getReg());
648 OutStreamer.EmitInstruction(TmpInst);
678 MCInst TmpInst;
679 TmpInst.setOpcode(X86::ADD32ri);
680 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()))
    [all...]
  /external/llvm/lib/Target/MBlaze/
MBlazeAsmPrinter.cpp 196 MCInst TmpInst;
197 MCInstLowering.Lower(MI, TmpInst);
198 OutStreamer.EmitInstruction(TmpInst);

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