| /external/v8/src/arm/ |
| disasm-arm.cc | 556 if (format[1] == 'h') { // 'shift_op or 'shift_rm or 'shift_sat.
557 if (format[6] == 'o') { // 'shift_op
558 ASSERT(STRING_STARTS_WITH(format, "shift_op"));
816 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
820 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
824 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
828 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
832 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
836 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
840 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
[all...] |
| assembler-arm.h | 386 // rm <shift_op> shift_imm
387 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
389 // rm <shift_op> rs
390 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
410 ShiftOp shift_op() const { return shift_op_; } function in class:v8::internal::BASE_EMBEDDED
439 // [rn +/- rm <shift_op> shift_imm] Offset/NegOffset
440 // [rn +/- rm <shift_op> shift_imm]! PreIndex/NegPreIndex
441 // [rn], +/- rm <shift_op> shift_imm PostIndex/NegPostIndex
443 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
[all...] |
| assembler-arm.cc | 168 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) {
170 ASSERT(shift_op != ROR || shift_imm != 0); // use RRX if you mean it
173 shift_op_ = shift_op;
175 if (shift_op == RRX) {
184 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) {
185 ASSERT(shift_op != RRX);
188 shift_op_ = shift_op;
210 ShiftOp shift_op, int shift_imm, AddrMode am) {
214 shift_op_ = shift_op;
[all...] |
| macro-assembler-arm.cc | 385 ASSERT((src.shift_op() == ASR) || (src.shift_op() == LSL));
[all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_arm_toIR.c | 3157 IROp shift_op, add_op; local
[all...] |
