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  /external/llvm/test/CodeGen/X86/
2006-01-19-ISelFoldingBug.ll 2 ; RUN: grep shld | count 1
4 ; Check that the isel does not fold the shld, which already folds a load
shift-coalesce.ll 2 ; RUN: grep {shld.*CL}
rot64.ll 4 ; RUN: grep shld %t | count 2
  /external/flac/libFLAC/ia32/
bitreader_asm.nasm 407 shld edi, edx, cl
422 shld edi, edx, cl
485 shld edi, eax, cl
505 shld edi, eax, cl
529 shld edi, eax, cl ; uval <<= parameter <<< 'parameter' bits of tail word
  /external/llvm/lib/Target/X86/
X86InstrShiftRotate.td 603 "shld{w}\t{%cl, $src2, $dst|$dst, $src2, CL}",
613 "shld{l}\t{%cl, $src2, $dst|$dst, $src2, CL}",
621 "shld{q}\t{%cl, $src2, $dst|$dst, $src2, %CL}",
635 "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
    [all...]
X86ISelLowering.h 39 /// SHLD, SHRD - Double shift instructions. These correspond to
41 SHLD,
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X86InstrInfo.td 121 def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
    [all...]
README.txt     [all...]
  /external/v8/test/cctest/
test-disasm-ia32.cc 126 __ shld(edx, Operand(ecx));
205 __ shld(edx, Operand(ebx, ecx, times_4, 10000));
  /external/libvpx/examples/includes/geshi/geshi/
asm.php 76 'setpe','setpo','sets','setz','shld','shrd','stosd','bswap','cmpxchg','invd','invlpg','wbinvd','xadd','lock',
  /external/valgrind/main/docs/internals/
3_1_BUGSTATUS.txt 68 vx1615 fixed 126583 amd64->IR: 0x48 0xF 0xA4 0xC2 (shld $1,%rax,%rdx)
  /prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/lib/gcc/i686-unknown-linux-gnu/4.2.1/include/xorg/
assyntax.h 608 #define SHLD_L(a,b,c) CHOICE(shldl ARG3(a,b,c), shldl ARG3(a,b,c), _LTOG shld ARG3(c,b,a))
609 #define SHLD2_L(a,b) CHOICE(shldl ARG2(a,b), shldl ARG3(CL,a,b), _LTOG shld ARG3(b,a,CL))
610 #define SHLD_W(a,b,c) CHOICE(shldw ARG3(a,b,c), shldw ARG3(a,b,c), _WTOG shld ARG3(c,b,a))
611 #define SHLD2_W(a,b) CHOICE(shldw ARG2(a,b), shldw ARG3(CL,a,b), _WTOG shld ARG3(b,a,CL))
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  /external/qemu/distrib/sdl-1.2.12/src/stdlib/
SDL_stdlib.c 580 shld edx,eax,cl
  /external/llvm/test/MC/X86/
x86-64.s 347 shld %bx,%bx label
348 shld $1, %bx,%bx label
  /external/v8/src/ia32/
disasm-ia32.cc 845 case 0xA5: return "shld";
997 // shrd, shld, bts
    [all...]
assembler-ia32.h 792 void shld(Register dst, const Operand& src);
    [all...]
assembler-ia32.cc 1214 void Assembler::shld(Register dst, const Operand& src) { function in class:v8::internal::Assembler
    [all...]
  /external/qemu/
Changelog 529 - fixed shrd, shld, idivl and divl on PowerPC.
  /external/valgrind/main/VEX/priv/
host_amd64_defs.h 465 //.. /* shld/shrd. op may only be Xsh_SHL or Xsh_SHR */
host_x86_defs.h 430 /* shld/shrd. op may only be Xsh_SHL or Xsh_SHR */
  /external/v8/src/x64/
disasm-x64.cc     [all...]
assembler-x64.cc 1963 void Assembler::shld(Register dst, Register src) { function in class:v8::internal::Assembler
    [all...]
assembler-x64.h 996 void shld(Register dst, Register src);
    [all...]
  /external/webkit/Source/JavaScriptCore/assembler/
SH4Assembler.h     [all...]
  /external/qemu/target-i386/
translate.c     [all...]

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