1 %verify "executed" 2 /* 3 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 4 * 32-bit shift distance. 5 */ 6 /* shr-long/2addr vA, vB */ 7 mov r3, rINST, lsr #12 @ r3<- B 8 ubfx r9, rINST, #8, #4 @ r9<- A 9 GET_VREG(r2, r3) @ r2<- vB 10 add r9, rFP, r9, lsl #2 @ r9<- &fp[A] 11 and r2, r2, #63 @ r2<- r2 & 0x3f 12 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 13 14 mov r0, r0, lsr r2 @ r0<- r2 >> r2 15 rsb r3, r2, #32 @ r3<- 32 - r2 16 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 17 subs ip, r2, #32 @ ip<- r2 - 32 18 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST 19 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32) 20 mov r1, r1, asr r2 @ r1<- r1 >> r2 21 b .L${opcode}_finish 22 %break 23 24 .L${opcode}_finish: 25 GET_INST_OPCODE(ip) @ extract opcode from rINST 26 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1 27 GOTO_OPCODE(ip) @ jump to next instruction 28