1 //===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the entry points for global functions defined in the LLVM 11 // ARM back-end. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef TARGET_ARM_H 16 #define TARGET_ARM_H 17 18 #include "ARMBaseInfo.h" 19 #include "MCTargetDesc/ARMMCTargetDesc.h" 20 #include "llvm/Support/DataTypes.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Target/TargetMachine.h" 23 #include <cassert> 24 25 namespace llvm { 26 27 class ARMAsmPrinter; 28 class ARMBaseTargetMachine; 29 class FunctionPass; 30 class JITCodeEmitter; 31 class MachineInstr; 32 class MCCodeEmitter; 33 class MCInst; 34 class MCInstrInfo; 35 class MCObjectWriter; 36 class MCSubtargetInfo; 37 class TargetAsmBackend; 38 class formatted_raw_ostream; 39 40 MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII, 41 const MCSubtargetInfo &STI, 42 MCContext &Ctx); 43 44 TargetAsmBackend *createARMAsmBackend(const Target &, const std::string &); 45 46 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, 47 CodeGenOpt::Level OptLevel); 48 49 FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM, 50 JITCodeEmitter &JCE); 51 52 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false); 53 FunctionPass *createARMExpandPseudoPass(); 54 FunctionPass *createARMGlobalMergePass(const TargetLowering* tli); 55 FunctionPass *createARMConstantIslandPass(); 56 FunctionPass *createNEONMoveFixPass(); 57 FunctionPass *createMLxExpansionPass(); 58 FunctionPass *createThumb2ITBlockPass(); 59 FunctionPass *createThumb2SizeReductionPass(); 60 61 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 62 ARMAsmPrinter &AP); 63 64 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer. 65 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS, 66 bool Is64Bit, 67 uint32_t CPUType, 68 uint32_t CPUSubtype); 69 70 } // end namespace llvm; 71 72 #endif 73
