1 //===- AlphaInstrFormats.td - Alpha Instruction Formats ----*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // 11 //===----------------------------------------------------------------------===// 12 13 //3.3: 14 //Memory 15 //Branch 16 //Operate 17 //Floating-point 18 //PALcode 19 20 def u8imm : Operand<i64>; 21 def s14imm : Operand<i64>; 22 def s16imm : Operand<i64>; 23 def s21imm : Operand<i64>; 24 def s64imm : Operand<i64>; 25 def u64imm : Operand<i64>; 26 27 //===----------------------------------------------------------------------===// 28 // Instruction format superclass 29 //===----------------------------------------------------------------------===// 30 // Alpha instruction baseline 31 class InstAlpha<bits<6> op, string asmstr, InstrItinClass itin> : Instruction { 32 field bits<32> Inst; 33 let Namespace = "Alpha"; 34 let AsmString = asmstr; 35 let Inst{31-26} = op; 36 let Itinerary = itin; 37 } 38 39 40 //3.3.1 41 class MForm<bits<6> opcode, bit load, string asmstr, list<dag> pattern, InstrItinClass itin> 42 : InstAlpha<opcode, asmstr, itin> { 43 let Pattern = pattern; 44 let canFoldAsLoad = load; 45 let Defs = [R28]; //We may use this for frame index calculations, so reserve it here 46 47 bits<5> Ra; 48 bits<16> disp; 49 bits<5> Rb; 50 51 let Inst{25-21} = Ra; 52 let Inst{20-16} = Rb; 53 let Inst{15-0} = disp; 54 } 55 class MfcForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin> 56 : InstAlpha<opcode, asmstr, itin> { 57 bits<5> Ra; 58 59 let OutOperandList = (outs GPRC:$RA); 60 let InOperandList = (ins); 61 let Inst{25-21} = Ra; 62 let Inst{20-16} = 0; 63 let Inst{15-0} = fc; 64 } 65 class MfcPForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin> 66 : InstAlpha<opcode, asmstr, itin> { 67 let OutOperandList = (outs); 68 let InOperandList = (ins); 69 let Inst{25-21} = 0; 70 let Inst{20-16} = 0; 71 let Inst{15-0} = fc; 72 } 73 74 class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, InstrItinClass itin> 75 : InstAlpha<opcode, asmstr, itin> { 76 bits<5> Ra; 77 bits<5> Rb; 78 bits<14> disp; 79 80 let OutOperandList = (outs); 81 let InOperandList = OL; 82 83 let Inst{25-21} = Ra; 84 let Inst{20-16} = Rb; 85 let Inst{15-14} = TB; 86 let Inst{13-0} = disp; 87 } 88 class MbrpForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, list<dag> pattern, InstrItinClass itin> 89 : InstAlpha<opcode, asmstr, itin> { 90 let Pattern=pattern; 91 bits<5> Ra; 92 bits<5> Rb; 93 bits<14> disp; 94 95 let OutOperandList = (outs); 96 let InOperandList = OL; 97 98 let Inst{25-21} = Ra; 99 let Inst{20-16} = Rb; 100 let Inst{15-14} = TB; 101 let Inst{13-0} = disp; 102 } 103 104 //3.3.2 105 def target : Operand<OtherVT> {} 106 107 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { 108 class BFormN<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin> 109 : InstAlpha<opcode, asmstr, itin> { 110 let OutOperandList = (outs); 111 let InOperandList = OL; 112 bits<64> Opc; //dummy 113 bits<5> Ra; 114 bits<21> disp; 115 116 let Inst{25-21} = Ra; 117 let Inst{20-0} = disp; 118 } 119 } 120 121 let isBranch = 1, isTerminator = 1 in 122 class BFormD<bits<6> opcode, string asmstr, list<dag> pattern, InstrItinClass itin> 123 : InstAlpha<opcode, asmstr, itin> { 124 let Pattern = pattern; 125 let OutOperandList = (outs); 126 let InOperandList = (ins target:$DISP); 127 bits<5> Ra; 128 bits<21> disp; 129 130 let Inst{25-21} = Ra; 131 let Inst{20-0} = disp; 132 } 133 134 //3.3.3 135 class OForm<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 136 : InstAlpha<opcode, asmstr, itin> { 137 let Pattern = pattern; 138 let OutOperandList = (outs GPRC:$RC); 139 let InOperandList = (ins GPRC:$RA, GPRC:$RB); 140 141 bits<5> Rc; 142 bits<5> Ra; 143 bits<5> Rb; 144 bits<7> Function = fun; 145 146 let Inst{25-21} = Ra; 147 let Inst{20-16} = Rb; 148 let Inst{15-13} = 0; 149 let Inst{12} = 0; 150 let Inst{11-5} = Function; 151 let Inst{4-0} = Rc; 152 } 153 154 class OForm2<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 155 : InstAlpha<opcode, asmstr, itin> { 156 let Pattern = pattern; 157 let OutOperandList = (outs GPRC:$RC); 158 let InOperandList = (ins GPRC:$RB); 159 160 bits<5> Rc; 161 bits<5> Rb; 162 bits<7> Function = fun; 163 164 let Inst{25-21} = 31; 165 let Inst{20-16} = Rb; 166 let Inst{15-13} = 0; 167 let Inst{12} = 0; 168 let Inst{11-5} = Function; 169 let Inst{4-0} = Rc; 170 } 171 172 class OForm4<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 173 : InstAlpha<opcode, asmstr, itin> { 174 let Pattern = pattern; 175 let OutOperandList = (outs GPRC:$RDEST); 176 let InOperandList = (ins GPRC:$RCOND, GPRC:$RTRUE, GPRC:$RFALSE); 177 let Constraints = "$RFALSE = $RDEST"; 178 let DisableEncoding = "$RFALSE"; 179 180 bits<5> Rc; 181 bits<5> Ra; 182 bits<5> Rb; 183 bits<7> Function = fun; 184 185 // let Constraints = "$RFALSE = $RDEST"; 186 let Inst{25-21} = Ra; 187 let Inst{20-16} = Rb; 188 let Inst{15-13} = 0; 189 let Inst{12} = 0; 190 let Inst{11-5} = Function; 191 let Inst{4-0} = Rc; 192 } 193 194 195 class OFormL<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 196 : InstAlpha<opcode, asmstr, itin> { 197 let Pattern = pattern; 198 let OutOperandList = (outs GPRC:$RC); 199 let InOperandList = (ins GPRC:$RA, u8imm:$L); 200 201 bits<5> Rc; 202 bits<5> Ra; 203 bits<8> LIT; 204 bits<7> Function = fun; 205 206 let Inst{25-21} = Ra; 207 let Inst{20-13} = LIT; 208 let Inst{12} = 1; 209 let Inst{11-5} = Function; 210 let Inst{4-0} = Rc; 211 } 212 213 class OForm4L<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 214 : InstAlpha<opcode, asmstr, itin> { 215 let Pattern = pattern; 216 let OutOperandList = (outs GPRC:$RDEST); 217 let InOperandList = (ins GPRC:$RCOND, s64imm:$RTRUE, GPRC:$RFALSE); 218 let Constraints = "$RFALSE = $RDEST"; 219 let DisableEncoding = "$RFALSE"; 220 221 bits<5> Rc; 222 bits<5> Ra; 223 bits<8> LIT; 224 bits<7> Function = fun; 225 226 // let Constraints = "$RFALSE = $RDEST"; 227 let Inst{25-21} = Ra; 228 let Inst{20-13} = LIT; 229 let Inst{12} = 1; 230 let Inst{11-5} = Function; 231 let Inst{4-0} = Rc; 232 } 233 234 //3.3.4 235 class FPForm<bits<6> opcode, bits<11> fun, string asmstr, list<dag> pattern, InstrItinClass itin> 236 : InstAlpha<opcode, asmstr, itin> { 237 let Pattern = pattern; 238 239 bits<5> Fc; 240 bits<5> Fa; 241 bits<5> Fb; 242 bits<11> Function = fun; 243 244 let Inst{25-21} = Fa; 245 let Inst{20-16} = Fb; 246 let Inst{15-5} = Function; 247 let Inst{4-0} = Fc; 248 } 249 250 //3.3.5 251 class PALForm<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin> 252 : InstAlpha<opcode, asmstr, itin> { 253 let OutOperandList = (outs); 254 let InOperandList = OL; 255 bits<26> Function; 256 257 let Inst{25-0} = Function; 258 } 259 260 261 // Pseudo instructions. 262 class PseudoInstAlpha<dag OOL, dag IOL, string nm, list<dag> pattern, InstrItinClass itin> 263 : InstAlpha<0, nm, itin> { 264 let OutOperandList = OOL; 265 let InOperandList = IOL; 266 let Pattern = pattern; 267 268 } 269
