1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 3 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } 4 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } 5 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } 6 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> } 7 %struct.__neon_int64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } 8 9 %struct.__neon_int8x16x4_t = type { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } 10 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } 11 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } 12 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> } 13 14 define <8 x i8> @vld4i8(i8* %A) nounwind { 15 ;CHECK: vld4i8: 16 ;Check the alignment value. Max for this instruction is 256 bits: 17 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] 18 %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 8) 19 %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 20 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 21 %tmp4 = add <8 x i8> %tmp2, %tmp3 22 ret <8 x i8> %tmp4 23 } 24 25 ;Check for a post-increment updating load with register increment. 26 define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind { 27 ;CHECK: vld4i8_update: 28 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r2, :128], r1 29 %A = load i8** %ptr 30 %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 16) 31 %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 32 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 33 %tmp4 = add <8 x i8> %tmp2, %tmp3 34 %tmp5 = getelementptr i8* %A, i32 %inc 35 store i8* %tmp5, i8** %ptr 36 ret <8 x i8> %tmp4 37 } 38 39 define <4 x i16> @vld4i16(i16* %A) nounwind { 40 ;CHECK: vld4i16: 41 ;Check the alignment value. Max for this instruction is 256 bits: 42 ;CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] 43 %tmp0 = bitcast i16* %A to i8* 44 %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0, i32 16) 45 %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0 46 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2 47 %tmp4 = add <4 x i16> %tmp2, %tmp3 48 ret <4 x i16> %tmp4 49 } 50 51 define <2 x i32> @vld4i32(i32* %A) nounwind { 52 ;CHECK: vld4i32: 53 ;Check the alignment value. Max for this instruction is 256 bits: 54 ;CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] 55 %tmp0 = bitcast i32* %A to i8* 56 %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0, i32 32) 57 %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0 58 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2 59 %tmp4 = add <2 x i32> %tmp2, %tmp3 60 ret <2 x i32> %tmp4 61 } 62 63 define <2 x float> @vld4f(float* %A) nounwind { 64 ;CHECK: vld4f: 65 ;CHECK: vld4.32 66 %tmp0 = bitcast float* %A to i8* 67 %tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8* %tmp0, i32 1) 68 %tmp2 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 0 69 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 2 70 %tmp4 = fadd <2 x float> %tmp2, %tmp3 71 ret <2 x float> %tmp4 72 } 73 74 define <1 x i64> @vld4i64(i64* %A) nounwind { 75 ;CHECK: vld4i64: 76 ;Check the alignment value. Max for this instruction is 256 bits: 77 ;CHECK: vld1.64 {d16, d17, d18, d19}, [r0, :256] 78 %tmp0 = bitcast i64* %A to i8* 79 %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 64) 80 %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0 81 %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2 82 %tmp4 = add <1 x i64> %tmp2, %tmp3 83 ret <1 x i64> %tmp4 84 } 85 86 define <16 x i8> @vld4Qi8(i8* %A) nounwind { 87 ;CHECK: vld4Qi8: 88 ;Check the alignment value. Max for this instruction is 256 bits: 89 ;CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! 90 ;CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256] 91 %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A, i32 64) 92 %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0 93 %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2 94 %tmp4 = add <16 x i8> %tmp2, %tmp3 95 ret <16 x i8> %tmp4 96 } 97 98 define <8 x i16> @vld4Qi16(i16* %A) nounwind { 99 ;CHECK: vld4Qi16: 100 ;Check for no alignment specifier. 101 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! 102 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r0] 103 %tmp0 = bitcast i16* %A to i8* 104 %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 1) 105 %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 106 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2 107 %tmp4 = add <8 x i16> %tmp2, %tmp3 108 ret <8 x i16> %tmp4 109 } 110 111 ;Check for a post-increment updating load. 112 define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind { 113 ;CHECK: vld4Qi16_update: 114 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r1, :64]! 115 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r1, :64]! 116 %A = load i16** %ptr 117 %tmp0 = bitcast i16* %A to i8* 118 %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 8) 119 %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 120 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2 121 %tmp4 = add <8 x i16> %tmp2, %tmp3 122 %tmp5 = getelementptr i16* %A, i32 32 123 store i16* %tmp5, i16** %ptr 124 ret <8 x i16> %tmp4 125 } 126 127 define <4 x i32> @vld4Qi32(i32* %A) nounwind { 128 ;CHECK: vld4Qi32: 129 ;CHECK: vld4.32 130 ;CHECK: vld4.32 131 %tmp0 = bitcast i32* %A to i8* 132 %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8* %tmp0, i32 1) 133 %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0 134 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 2 135 %tmp4 = add <4 x i32> %tmp2, %tmp3 136 ret <4 x i32> %tmp4 137 } 138 139 define <4 x float> @vld4Qf(float* %A) nounwind { 140 ;CHECK: vld4Qf: 141 ;CHECK: vld4.32 142 ;CHECK: vld4.32 143 %tmp0 = bitcast float* %A to i8* 144 %tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8* %tmp0, i32 1) 145 %tmp2 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 0 146 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 2 147 %tmp4 = fadd <4 x float> %tmp2, %tmp3 148 ret <4 x float> %tmp4 149 } 150 151 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8*, i32) nounwind readonly 152 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8*, i32) nounwind readonly 153 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly 154 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8*, i32) nounwind readonly 155 declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8*, i32) nounwind readonly 156 157 declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8*, i32) nounwind readonly 158 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8*, i32) nounwind readonly 159 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8*, i32) nounwind readonly 160 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8*, i32) nounwind readonly 161
