1 ; RUN: llc < %s -march=bfin 2 3 ; DAGCombiner::SimplifyBinOpWithSameOpcodeHands can produce an illegal i16 OR 4 ; operation after LegalizeOps. 5 6 define void @mng_display_bgr565() { 7 entry: 8 br i1 false, label %bb.preheader, label %return 9 10 bb.preheader: 11 br i1 false, label %cond_true48, label %cond_next80 12 13 cond_true48: 14 %tmp = load i8* null 15 %tmp51 = zext i8 %tmp to i16 16 %tmp99 = load i8* null 17 %tmp54 = bitcast i8 %tmp99 to i8 18 %tmp54.upgrd.1 = zext i8 %tmp54 to i32 19 %tmp55 = lshr i32 %tmp54.upgrd.1, 3 20 %tmp55.upgrd.2 = trunc i32 %tmp55 to i16 21 %tmp52 = shl i16 %tmp51, 5 22 %tmp56 = and i16 %tmp55.upgrd.2, 28 23 %tmp57 = or i16 %tmp56, %tmp52 24 %tmp60 = zext i16 %tmp57 to i32 25 %tmp62 = xor i32 0, 65535 26 %tmp63 = mul i32 %tmp60, %tmp62 27 %tmp65 = add i32 0, %tmp63 28 %tmp69 = add i32 0, %tmp65 29 %tmp70 = lshr i32 %tmp69, 16 30 %tmp70.upgrd.3 = trunc i32 %tmp70 to i16 31 %tmp75 = lshr i16 %tmp70.upgrd.3, 8 32 %tmp75.upgrd.4 = trunc i16 %tmp75 to i8 33 %tmp76 = lshr i8 %tmp75.upgrd.4, 5 34 store i8 %tmp76, i8* null 35 ret void 36 37 cond_next80: 38 ret void 39 40 return: 41 ret void 42 } 43
