1 // RUN: tblgen %s | grep ADDPSrr | count 1 2 // XFAIL: vg_leak 3 4 class Instruction<bits<4> opc, string Name> { 5 bits<4> opcode = opc; 6 string name = Name; 7 } 8 9 multiclass basic_r<bits<4> opc> { 10 def rr : Instruction<opc, "rr">; 11 def rm : Instruction<opc, "rm">; 12 } 13 14 multiclass basic_s<bits<4> opc> { 15 defm SS : basic_r<opc>; 16 defm SD : basic_r<opc>; 17 } 18 19 multiclass basic_p<bits<4> opc> { 20 defm PS : basic_r<opc>; 21 defm PD : basic_r<opc>; 22 } 23 24 defm ADD : basic_s<0xf>, basic_p<0xf>; 25 defm SUB : basic_s<0xe>, basic_p<0xe>; 26
