1 ; RUN: opt < %s -inline -S | FileCheck %s 2 ; Test that bar and bar2 are both inlined throughout and removed. 3 @A = weak global i32 0 ; <i32*> [#uses=1] 4 @B = weak global i32 0 ; <i32*> [#uses=1] 5 @C = weak global i32 0 ; <i32*> [#uses=1] 6 7 define fastcc void @foo(i32 %X) { 8 entry: 9 ; CHECK: @foo 10 %ALL = alloca i32, align 4 ; <i32*> [#uses=1] 11 %tmp1 = and i32 %X, 1 ; <i32> [#uses=1] 12 %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] 13 br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true 14 15 cond_true: ; preds = %entry 16 store i32 1, i32* @A 17 br label %cond_next 18 19 cond_next: ; preds = %cond_true, %entry 20 %tmp4 = and i32 %X, 2 ; <i32> [#uses=1] 21 %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1] 22 br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5 23 24 cond_true5: ; preds = %cond_next 25 store i32 1, i32* @B 26 br label %cond_next7 27 28 cond_next7: ; preds = %cond_true5, %cond_next 29 %tmp10 = and i32 %X, 4 ; <i32> [#uses=1] 30 %tmp10.upgrd.3 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1] 31 br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11 32 33 cond_true11: ; preds = %cond_next7 34 store i32 1, i32* @C 35 br label %cond_next13 36 37 cond_next13: ; preds = %cond_true11, %cond_next7 38 %tmp16 = and i32 %X, 8 ; <i32> [#uses=1] 39 %tmp16.upgrd.4 = icmp eq i32 %tmp16, 0 ; <i1> [#uses=1] 40 br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17 41 42 cond_true17: ; preds = %cond_next13 43 call void @ext( i32* %ALL ) 44 ret void 45 46 UnifiedReturnBlock: ; preds = %cond_next13 47 ret void 48 } 49 50 ; CHECK-NOT: @bar 51 define internal fastcc void @bar(i32 %X) { 52 entry: 53 %ALL = alloca i32, align 4 ; <i32*> [#uses=1] 54 %tmp1 = and i32 %X, 1 ; <i32> [#uses=1] 55 %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] 56 br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true 57 58 cond_true: ; preds = %entry 59 store i32 1, i32* @A 60 br label %cond_next 61 62 cond_next: ; preds = %cond_true, %entry 63 %tmp4 = and i32 %X, 2 ; <i32> [#uses=1] 64 %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1] 65 br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5 66 67 cond_true5: ; preds = %cond_next 68 store i32 1, i32* @B 69 br label %cond_next7 70 71 cond_next7: ; preds = %cond_true5, %cond_next 72 %tmp10 = and i32 %X, 4 ; <i32> [#uses=1] 73 %tmp10.upgrd.3 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1] 74 br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11 75 76 cond_true11: ; preds = %cond_next7 77 store i32 1, i32* @C 78 br label %cond_next13 79 80 cond_next13: ; preds = %cond_true11, %cond_next7 81 %tmp16 = and i32 %X, 8 ; <i32> [#uses=1] 82 %tmp16.upgrd.4 = icmp eq i32 %tmp16, 0 ; <i1> [#uses=1] 83 br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17 84 85 cond_true17: ; preds = %cond_next13 86 call void @foo( i32 %X ) 87 ret void 88 89 UnifiedReturnBlock: ; preds = %cond_next13 90 ret void 91 } 92 93 define internal fastcc void @bar2(i32 %X) { 94 entry: 95 call void @foo( i32 %X ) 96 ret void 97 } 98 99 declare void @ext(i32*) 100 101 define void @test(i32 %X) { 102 entry: 103 ; CHECK: test 104 ; CHECK-NOT: @bar 105 tail call fastcc void @bar( i32 %X ) 106 tail call fastcc void @bar( i32 %X ) 107 tail call fastcc void @bar2( i32 %X ) 108 tail call fastcc void @bar2( i32 %X ) 109 ret void 110 ; CHECK: ret 111 } 112
