Lines Matching refs:MachineLICM
1 //===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===//
47 cl::desc("MachineLICM should avoid speculation"),
62 class MachineLICM : public MachineFunctionPass {
113 MachineLICM() :
118 explicit MachineLICM(bool PreRA) :
280 char MachineLICM::ID = 0;
281 INITIALIZE_PASS_BEGIN(MachineLICM, "machinelicm",
286 INITIALIZE_PASS_END(MachineLICM, "machinelicm",
290 return new MachineLICM(PreRegAlloc);
307 bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
385 void MachineLICM::ProcessMI(MachineInstr *MI,
463 void MachineLICM::HoistRegionPostRA() {
535 void MachineLICM::AddToLiveIns(unsigned Reg) {
557 void MachineLICM::HoistPostRA(MachineInstr *MI, unsigned Def) {
589 bool MachineLICM::IsGuaranteedToExecute(MachineBasicBlock *BB) {
613 void MachineLICM::HoistRegion(MachineDomTreeNode *N, bool IsHeader) {
668 MachineLICM::getRegisterClassIDAndCost(const MachineInstr *MI,
685 void MachineLICM::InitRegPressure(MachineBasicBlock *BB) {
729 void MachineLICM::UpdateRegPressure(const MachineInstr *MI) {
783 bool MachineLICM::IsLICMCandidate(MachineInstr &I) {
805 bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
868 bool MachineLICM::HasAnyPHIUse(unsigned Reg) const {
888 bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
921 bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
949 bool MachineLICM::CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost) {
969 void MachineLICM::UpdateBackTraceRegPressure(const MachineInstr *MI) {
1014 bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
1104 MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
1160 void MachineLICM::InitCSEMap(MachineBasicBlock *BB) {
1177 MachineLICM::LookForDuplicate(const MachineInstr *MI,
1187 bool MachineLICM::EliminateCSE(MachineInstr *MI,
1246 bool MachineLICM::MayCSE(MachineInstr *MI) {
1261 bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
1325 MachineBasicBlock *MachineLICM::getCurPreheader() {
