Lines Matching defs:Op1
8066 SDValue Op1 = Op.getOperand(1);
8069 EVT SrcVT = Op1.getValueType();
8073 Op1 = DAG.getNode(ISD::FP_EXTEND, dl, VT, Op1);
8078 Op1 = DAG.getNode(ISD::FP_ROUND, dl, VT, Op1, DAG.getIntPtrConstant(1));
8101 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, SrcVT, Op1, Mask1);
8105 // Op0 is MVT::f32, Op1 is MVT::f64.
8293 /// Emit nodes that will be selected as "cmp Op0,Op1", or something
8295 SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
8297 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op1))
8302 return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op0, Op1);
8310 SDValue Op1 = And.getOperand(1);
8313 if (Op1.getOpcode() == ISD::TRUNCATE)
8314 Op1 = Op1.getOperand(0);
8317 if (Op1.getOpcode() == ISD::SHL)
8318 std::swap(Op0, Op1);
8332 LHS = Op1;
8335 } else if (Op1.getOpcode() == ISD::Constant) {
8336 ConstantSDNode *AndRHS = cast<ConstantSDNode>(Op1);
8374 SDValue Op1 = Op.getOperand(1);
8383 Op1.getOpcode() == ISD::Constant &&
8384 cast<ConstantSDNode>(Op1)->isNullValue() &&
8393 if (Op1.getOpcode() == ISD::Constant &&
8394 (cast<ConstantSDNode>(Op1)->getZExtValue() == 1 ||
8395 cast<ConstantSDNode>(Op1)->isNullValue()) &&
8403 cast<ConstantSDNode>(Op1)->isNullValue();
8412 bool isFP = Op1.getValueType().isFloatingPoint();
8413 unsigned X86CC = TranslateX86CC(CC, isFP, Op0, Op1, DAG);
8417 SDValue EFLAGS = EmitCmp(Op0, Op1, X86CC, DAG);
8458 SDValue Op1 = Op.getOperand(1);
8504 std::swap(Op0, Op1);
8510 UNORD = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(3, MVT::i8));
8511 EQ = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(0, MVT::i8));
8516 ORD = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(7, MVT::i8));
8517 NEQ = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(4, MVT::i8));
8523 return DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(SSECC, MVT::i8));
8558 std::swap(Op0, Op1);
8577 Op1 = DAG.getNode(ISD::XOR, dl, VT, Op1, SignVec);
8580 SDValue Result = DAG.getNode(Opc, dl, VT, Op0, Op1);
8627 SDValue Op1 = Op.getOperand(1);
8649 if ((isAllOnes(Op1) || isAllOnes(Op2)) &&
8651 SDValue Y = isAllOnes(Op2) ? Op1 : Op2;
8661 if (isAllOnes(Op1) != (CondCode == X86::COND_E))
8731 (isAllOnes(Op1) || isAllOnes(Op2)) && (isZero(Op1) || isZero(Op2))) {
8734 if (isAllOnes(Op1) != (CondCode == X86::COND_B))
8743 SDValue Ops[] = { Op2, Op1, CC, Cond };
10185 unsigned Op1 = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
10191 if (!Op1 && !Op2 && !Op3 && Op4)
10195 if (Op1 && !Op2 && !Op3 && !Op4)
13469 SDValue Op1 = N1.getOperand(0);
13472 std::swap(Op0, Op1);
13485 Op0, Op1,
13980 SDValue Op1 = N->getOperand(1);
13981 if (Op1.hasOneUse()) {
13982 unsigned BitWidth = Op1.getValueSizeInBits();
13988 if (TLO.ShrinkDemandedConstant(Op1, DemandedMask) ||
13989 TLI.SimplifyDemandedBits(Op1, DemandedMask, KnownZero, KnownOne, TLO))
14140 SDValue Op1 = N->getOperand(1);
14148 if (Op1->hasOneUse() && Op1.getOpcode() == ISD::XOR &&
14149 isa<ConstantSDNode>(Op1.getOperand(1))) {
14150 APInt XorC = cast<ConstantSDNode>(Op1.getOperand(1))->getAPIntValue();
14152 SDValue NewXor = DAG.getNode(ISD::XOR, Op1.getDebugLoc(), VT,
14153 Op1.getOperand(0),
