Lines Matching full:eax
513 setExceptionPointerRegister(X86::EAX);
2738 // only target EAX, EDX, or ECX since the tail call must be scheduled after
2752 case X86::EAX: case X86::EDX: case X86::ECX:
7402 return GetTLSADDR(DAG, Chain, GA, &InFlag, PtrVT, X86::EAX, X86II::MO_TLSGD);
7443 // emit "addl x@ntpoff,%eax" (local exec) or "addl x@indntpoff,%eax" (initial
7529 unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
8968 unsigned Reg = (Subtarget->is64Bit() ? X86::RAX : X86::EAX);
9599 // Pass 'nest' parameter in EAX.
9601 NestReg = X86::EAX;
10252 case MVT::i32: Reg = X86::EAX; size = 4; break;
10533 SDValue eax = DAG.getCopyFromReg(rd, dl, X86::EAX, MVT::i32,
10535 SDValue edx = DAG.getCopyFromReg(eax.getValue(1), dl, X86::EDX, MVT::i32,
10536 eax.getValue(2));
10538 SDValue Ops[] = { eax, edx };
10554 Regs64bit ? X86::RAX : X86::EAX,
10580 Regs64bit ? X86::RAX : X86::EAX,
10911 // mov EAX = t1
10912 // lcs dest = [bitinstr.addr], t2 [EAX is implicit]
11016 // mov EAX, EDX <- t1, t2
11017 // cmpxchg8b [bitinstr.addr] [EAX, EDX, EBX, ECX implicit]
11018 // mov t3, t4 <- EAX, EDX
11134 MIB = BuildMI(newMBB, dl, TII->get(TargetOpcode::COPY), X86::EAX);
11153 MIB.addReg(X86::EAX);
11176 // mov EAX = t1
11177 // lcs dest = [bitinstr.addr], t2 [EAX is implicit]
11238 MIB = BuildMI(newMBB, dl, TII->get(TargetOpcode::COPY), X86::EAX);
11261 MIB.addReg(X86::EAX);
11314 // Address into RAX/EAX, other two args into ECX, EDX.
11316 unsigned MemReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
11339 // First arg in ECX, the second in EAX.
11342 BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EAX)
11838 .addReg(Is64Bit ? X86::RAX : X86::EAX);
11902 .addReg(X86::EAX, RegState::Implicit)
11904 .addReg(X86::EAX, RegState::Define | RegState::Implicit)
11918 // or EAX and doing an indirect call. The return value will then
11940 TII->get(X86::MOV32rm), X86::EAX)
11947 addDirectMem(MIB, X86::EAX);
11950 TII->get(X86::MOV32rm), X86::EAX)
11957 addDirectMem(MIB, X86::EAX);
12126 X86::NOT32r, X86::EAX,
12132 X86::NOT32r, X86::EAX,
12138 X86::NOT32r, X86::EAX,
12144 X86::NOT32r, X86::EAX,
14428 // bswap %eax / bswap %edx / xchgl %eax, %edx -> llvm.bswap.i64
14431 if (Words.size() == 2 && Words[0] == "bswap" && Words[1] == "%eax") {
14437 if (Words.size() == 3 && Words[0] == "xchgl" && Words[1] == "%eax" &&
14880 // 'A' means EAX + EDX.
14882 Res.first = X86::EAX;
14890 // type. For example, we want to map "{ax},i32" -> {eax}, we don't want it to
14917 case X86::AX: DestReg = X86::EAX; break;
