Lines Matching refs:Elt
3302 unsigned Elt = SVOp->getMaskElt(i) % HalfSize;
3303 Mask |= Elt << Shamt;
3366 int Elt = SVOp->getMaskElt(i) % HalfSize;
3367 Mask |= Elt << i;
4143 /// isZeroNode - Returns true if Elt is a constant zero or a floating point
4145 bool X86::isZeroNode(SDValue Elt) {
4146 return ((isa<ConstantSDNode>(Elt) &&
4147 cast<ConstantSDNode>(Elt)->isNullValue()) ||
4148 (isa<ConstantFPSDNode>(Elt) &&
4149 Elt)->getValueAPF().isPosZero()));
4507 // If this is the insertion idx, put the low elt of V2 here.
4681 SDValue Elt = getShuffleScalarElt(N, Index, DAG, 0);
4682 if (!(Elt.getNode() &&
4683 (Elt.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elt))))
4996 SDValue Elt = Elts[i];
4998 if (!Elt.getNode() ||
4999 (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.getNode())))
5002 if (Elt.getNode()->getOpcode() == ISD::UNDEF)
5004 LDBase = cast<LoadSDNode>(Elt.getNode());
5008 if (Elt.getOpcode() == ISD::UNDEF)
5011 LoadSDNode *LD = cast<LoadSDNode>(Elt);
5080 SDValue Elt = Op.getOperand(i);
5081 if (Elt.getOpcode() == ISD::UNDEF)
5083 Values.insert(Elt);
5084 if (Elt.getOpcode() != ISD::Constant &&
5085 Elt.getOpcode() != ISD::ConstantFP)
5087 if (X86::isZeroNode(Elt))
5963 int Elt = SVOp->getMaskElt(i);
5966 FstVecOpNum = Elt/NumElems;
5967 FstVecExtractIdx = Elt % NumElems < HalfSize ? 0 : HalfSize;
5971 int Elt = SVOp->getMaskElt(i);
5974 SndVecOpNum = Elt/NumElems;
5975 SndVecExtractIdx = Elt % NumElems < HalfSize ? 0 : HalfSize;
5988 int Elt = SVOp->getMaskElt(i);
5989 MaskV1.push_back(Elt < 0 ? Elt : Elt % HalfSize);
5992 int Elt = SVOp->getMaskElt(i);
5993 MaskV2.push_back(Elt < 0 ? Elt : Elt % HalfSize);
6228 unsigned Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
6229 int Idx = (Elt > NumElems) ? -1 : SVOp->getMaskElt(Elt);
13631 // We are going to use the original vector elt for storing.
