Lines Matching refs:NewOp
6524 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG, dl);
6525 if (NewOp.getNode())
6526 return DAG.getNode(ISD::BITCAST, dl, VT, NewOp);
6532 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG, dl);
6533 if (NewOp.getNode()) {
6534 if (isCommutedMOVL(cast<ShuffleVectorSDNode>(NewOp), true, false))
6535 return getVZextMovL(VT, NewOp.getValueType(), NewOp.getOperand(0),
6539 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG, dl);
6540 if (NewOp.getNode() && X86::isMOVLMask(cast<ShuffleVectorSDNode>(NewOp)))
6541 return getVZextMovL(VT, NewOp.getValueType(), NewOp.getOperand(1),
6586 SDValue NewOp = NormalizeVectorShuffle(Op, DAG, *this, Subtarget);
6587 if (NewOp.getNode())
6588 return NewOp;
6732 SDValue NewOp = CommuteVectorShuffle(SVOp, DAG);
6733 ShuffleVectorSDNode *NewSVOp = cast<ShuffleVectorSDNode>(NewOp);
6826 SDValue NewOp = LowerVECTOR_SHUFFLEv8i16(Op, DAG);
6827 if (NewOp.getNode())
6828 return NewOp;
6832 SDValue NewOp = LowerVECTOR_SHUFFLEv16i8(SVOp, DAG, *this);
6833 if (NewOp.getNode())
6834 return NewOp;
10479 SelectionDAG &DAG, unsigned NewOp) const {
10493 DAG.getMemIntrinsicNode(NewOp, dl, Tys, Ops, 4, MVT::i64,
