Lines Matching refs:VA
1422 CCValAssign &VA = RVLocs[i];
1423 assert(VA.isRegLoc() && "Can only return in registers!");
1430 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
1443 if (VA.getLocReg() == X86::ST0 ||
1444 VA.getLocReg() == X86::ST1) {
1447 if (isScalarFPTypeInSSEReg(VA.getValVT()))
1458 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) {
1470 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag);
1559 CCValAssign &VA = RVLocs[i];
1560 EVT CopyVT = VA.getValVT();
1575 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1) {
1578 if (isScalarFPTypeInSSEReg(VA.getValVT())) CopyVT = MVT::f80;
1586 if (CopyVT != VA.getValVT())
1587 Val = DAG.getNode(ISD::FP_ROUND, dl, VA.getValVT(), Val,
1591 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
1676 const CCValAssign &VA,
1687 if (VA.getLocInfo() == CCValAssign::Indirect)
1688 ValVT = VA.getLocVT();
1690 ValVT = VA.getValVT();
1699 int FI = MFI->CreateFixedObject(Bytes, VA.getLocMemOffset(), isImmutable);
1703 VA.getLocMemOffset(), isImmutable);
1751 CCValAssign &VA = ArgLocs[i];
1754 assert(VA.getValNo() != LastVal &&
1757 LastVal = VA.getValNo();
1759 if (VA.isRegLoc()) {
1760 EVT RegVT = VA.getLocVT();
1779 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1785 if (VA.getLocInfo() == CCValAssign::SExt)
1787 DAG.getValueType(VA.getValVT()));
1788 else if (VA.getLocInfo() == CCValAssign::ZExt)
1790 DAG.getValueType(VA.getValVT()));
1791 else if (VA.getLocInfo() == CCValAssign::BCvt)
1792 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
1794 if (VA.isExtInLoc()) {
1797 ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(),
1800 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
1803 assert(VA.isMemLoc());
1804 ArgValue = LowerMemArgument(Chain, CallConv, Ins, dl, DAG, VA, MFI, i);
1808 if (VA.getLocInfo() == CCValAssign::Indirect)
1809 ArgValue = DAG.getLoad(VA.getValVT(), dl, Chain, ArgValue,
1983 const CCValAssign &VA,
1985 unsigned LocMemOffset = VA.getLocMemOffset();
2116 CCValAssign &VA = ArgLocs[i];
2117 EVT RegVT = VA.getLocVT();
2123 switch (VA.getLocInfo()) {
2146 SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT());
2156 if (VA.isRegLoc()) {
2157 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2162 switch (VA.getLocReg()) {
2172 assert(VA.isMemLoc());
2176 dl, DAG, VA, Flags));
2265 CCValAssign &VA = ArgLocs[i];
2266 if (VA.isRegLoc())
2268 assert(VA.isMemLoc());
2272 int32_t Offset = VA.getLocMemOffset()+FPDiff;
2273 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8;
2279 SDValue Source = DAG.getIntPtrConstant(VA.getLocMemOffset());
2660 CCValAssign &VA = RVLocs[i];
2661 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1)
2723 CCValAssign &VA = ArgLocs[i];
2726 if (VA.getLocInfo() == CCValAssign::Indirect)
2728 if (!VA.isRegLoc()) {
2729 if (!MatchingStackOffset(Arg, VA.getLocMemOffset(), Flags,
2746 CCValAssign &VA = ArgLocs[i];
2747 if (!VA.isRegLoc())
2749 unsigned Reg = VA.getLocReg();
