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Lines Matching refs:Values

1420   // Copy the result values into the output registers.
1427 // If this is x86-64, and we disabled SSE, we can't return FP values,
1434 // Likewise we can't return F64 values with SSE1 only. gcc does so, but
1454 // 64-bit vector (MMX) values are returned in XMM0 / XMM1 except for v1i64
1540 /// LowerCallResult - Lower the result values of a call into the
1562 // If this is x86-64, and we disabled SSE, we can't return FP values
1795 // Handle MMX values passed in XMM regs.
2134 // Special case: passing MMX values in XMM registers.
2463 // Handle result values, copying them out of physregs into vregs that we
3706 // sources have 4 halves, namely: C, D, E, F. The final values of A and
4152 /// CommuteVectorShuffle - Swap vector_shuffle operands as well as values in
4173 /// CommuteVectorShuffleMask - Change values in a shuffle permute mask assuming
5078 SmallSet<SDValue, 8> Values;
5083 Values.insert(Elt);
5196 if (Values.size() == 1) {
5302 if (Values.size() > 1 && VT.getSizeInBits() == 128) {
5441 values count as coming from any quadword, for better codegen.
5725 // undef mask values to 0x80 (zero out result) in the pshufb mask.
5816 // Elt1 was also defined, OR the extracted values together before
7541 /// LowerShiftParts - Lower SRA_PARTS and friends, which return two i32 values and
9085 // VAARG_64 returns two values: Variable Argument Address, Chain
10537 // Use a buildpair to merge the two 32-bit values into a 64-bit one.
10850 /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
11226 // We only support register and immediate values
11690 // true/false values to select between, and a branch opcode to use.
12763 // If this is efficiently invertible, canonicalize the LHSC/RHSC values
12882 // Canonicalize the TrueC/FalseC values so that TrueC (the true value) is
13515 // TODO: It is possible to support ZExt by zeroing the undef values
13808 /// returning the resulting values in a vector. For example, if
14674 // FIXME gcc accepts some relocatable values here too, but only in certain
14688 // FIXME gcc accepts some relocatable values here too, but only in certain
14895 // All of the single-register GCC register classes map their values onto