Lines Matching refs:getOpcode
92 if (Vec.getOpcode() == ISD::UNDEF)
1511 if (Copy->getOpcode() != ISD::CopyToReg &&
1512 Copy->getOpcode() != ISD::FP_EXTEND)
1518 if (UI->getOpcode() != X86ISD::RET_FLAG)
2533 if (Arg.getOpcode() == ISD::CopyFromReg) {
2544 unsigned Opcode = Def->getOpcode();
2565 } else if (Arg.getOpcode() == ISD::FrameIndex && Flags.isByVal()) {
3914 if (N->getOperand(1).getOpcode() != ISD::UNDEF)
3942 if (N->getOperand(1).getOpcode() != ISD::UNDEF)
3968 bool V2IsUndef = N->getOperand(1).getOpcode() == ISD::UNDEF;
4211 if (N->getOpcode() != ISD::SCALAR_TO_VECTOR)
4255 if (N->getOpcode() != ISD::BUILD_VECTOR)
4275 unsigned Opc = V2.getOpcode();
4282 unsigned Opc = V1.getOpcode();
4521 unsigned Opcode = V.getOpcode();
4661 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
4665 if (V.getOpcode() == ISD::BUILD_VECTOR)
4683 (Elt.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elt))))
4999 (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.getNode())))
5002 if (Elt.getNode()->getOpcode() == ISD::UNDEF)
5008 if (Elt.getOpcode() == ISD::UNDEF)
5081 if (Elt.getOpcode() == ISD::UNDEF)
5084 if (Elt.getOpcode() != ISD::Constant &&
5085 Elt.getOpcode() != ISD::ConstantFP)
5315 if (Op.getOperand(0).getOpcode() != ISD::UNDEF)
5321 if (Op.getOperand(i).getOpcode() == ISD::UNDEF) continue;
5332 if (Op.getOperand(i).getOpcode() != ISD::UNDEF)
5350 if (V[i+EltStride].getOpcode() == ISD::UNDEF &&
5375 if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR) {
5625 if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE &&
5654 if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE &&
5897 SrcOp.getOpcode() == ISD::SCALAR_TO_VECTOR &&
5898 SrcOp.getOperand(0).getOpcode() == ISD::BITCAST &&
6163 if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST)
6165 if (V.hasOneUse() && V.getOpcode() == ISD::SCALAR_TO_VECTOR)
6180 if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST)
6182 if (V.hasOneUse() && V.getOpcode() == ISD::SCALAR_TO_VECTOR)
6208 if (N->getOpcode() != ISD::EXTRACT_VECTOR_ELT)
6218 if (V.getOpcode() == ISD::BITCAST) {
6233 if (V.getOpcode() == ISD::BITCAST)
6304 if (V2.getOpcode() == ISD::UNDEF)
6449 if (V.hasOneUse() && V.getOpcode() == ISD::BITCAST)
6453 V.getOpcode() == ISD::INSERT_SUBVECTOR &&
6454 V.getOperand(0).getOpcode() == ISD::UNDEF))
6466 if (V.getOpcode() != ISD::SCALAR_TO_VECTOR)
6557 bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
6558 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
6743 if (V2.getOpcode() != ISD::UNDEF && isCommutedSHUFP(SVOp))
6888 if ((User->getOpcode() != ISD::STORE ||
6891 (User->getOpcode() != ISD::BITCAST ||
7548 bool isSRA = Op.getOpcode() == ISD::SRA_PARTS;
7557 if (Op.getOpcode() == ISD::SHL_PARTS) {
7575 if (Op.getOpcode() == ISD::SHL_PARTS) {
8180 switch (Op.getNode()->getOpcode()) {
8194 if (UI->getOpcode() != ISD::CopyToReg && UI->getOpcode() != ISD::SETCC)
8226 if (User->getOpcode() == ISD::TRUNCATE && User->hasOneUse()) {
8232 if (User->getOpcode() != ISD::BRCOND &&
8233 User->getOpcode() != ISD::SETCC &&
8234 (User->getOpcode() != ISD::SELECT || UOpNo != 0)) {
8251 if (UI->getOpcode() == ISD::STORE)
8255 switch (Op.getNode()->getOpcode()) {
8311 if (Op0.getOpcode() == ISD::TRUNCATE)
8313 if (Op1.getOpcode() == ISD::TRUNCATE)
8317 if (Op1.getOpcode() == ISD::SHL)
8319 if (Op0.getOpcode() == ISD::SHL) {
8335 } else if (Op1.getOpcode() == ISD::Constant) {
8338 if (AndRHS->getZExtValue() == 1 && AndLHS.getOpcode() == ISD::SRL) {
8382 if (Op0.getOpcode() == ISD::AND && Op0.hasOneUse() &&
8383 Op1.getOpcode() == ISD::Constant &&
8393 if (Op1.getOpcode() == ISD::Constant &&
8400 if (Op0.getOpcode() == X86ISD::SETCC) {
8427 assert(VT.getSizeInBits() == 256 && Op.getOpcode() == ISD::SETCC &&
8450 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1, CC),
8451 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC));
8591 unsigned Opc = Op.getNode()->getOpcode();
8632 if (Cond.getOpcode() == ISD::SETCC) {
8642 if (Cond.getOpcode() == X86ISD::SETCC &&
8643 Cond.getOperand(1).getOpcode() == X86ISD::CMP &&
8672 if (Cond.getOpcode() == ISD::AND &&
8673 Cond.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) {
8681 if (Cond.getOpcode() == X86ISD::SETCC ||
8682 Cond.getOpcode() == X86ISD::SETCC_CARRY) {
8686 unsigned Opc = Cmp.getOpcode();
8703 if (Cond.getOpcode() == ISD::TRUNCATE)
8708 if (Cond.getOpcode() == ISD::AND && Cond.hasOneUse()) {
8727 if (Cond.getOpcode() == X86ISD::CMP) {
8751 Opc = Op.getOpcode();
8754 return (Op.getOperand(0).getOpcode() == X86ISD::SETCC &&
8756 Op.getOperand(1).getOpcode() == X86ISD::SETCC &&
8763 if (Op.getOpcode() != ISD::XOR)
8767 return Op.getOperand(0).getOpcode() == X86ISD::SETCC &&
8781 if (Cond.getOpcode() == ISD::SETCC) {
8788 else if (Cond.getOpcode() == X86ISD::ADD ||
8789 Cond.getOpcode() == X86ISD::SUB ||
8790 Cond.getOpcode() == X86ISD::SMUL ||
8791 Cond.getOpcode() == X86ISD::UMUL)
8796 if (Cond.getOpcode() == ISD::AND &&
8797 Cond.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) {
8805 if (Cond.getOpcode() == X86ISD::SETCC ||
8806 Cond.getOpcode() == X86ISD::SETCC_CARRY) {
8810 unsigned Opc = Cmp.getOpcode();
8861 if (User->getOpcode() == ISD::BR) {
8895 if (Cond.getOpcode() == ISD::TRUNCATE)
8900 if (Cond.getOpcode() == ISD::AND && Cond.hasOneUse()) {
9804 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1),
9805 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2));
9895 if (Amt.getOpcode() == ISD::BUILD_VECTOR) {
9916 V1 = DAG.getNode(Op.getOpcode(), dl, NewVT, V1, Amt1);
9917 V2 = DAG.getNode(Op.getOpcode(), dl, NewVT, V2, Amt2);
9929 if (VT == MVT::v2i64 && Op.getOpcode() == ISD::SHL)
9934 if (VT == MVT::v4i32 && Op.getOpcode() == ISD::SHL)
9939 if (VT == MVT::v8i16 && Op.getOpcode() == ISD::SHL)
9944 if (VT == MVT::v2i64 && Op.getOpcode() == ISD::SRL)
9949 if (VT == MVT::v4i32 && Op.getOpcode() == ISD::SRL)
9954 if (VT == MVT::v8i16 && Op.getOpcode() == ISD::SRL)
9959 if (VT == MVT::v4i32 && Op.getOpcode() == ISD::SRA)
9964 if (VT == MVT::v8i16 && Op.getOpcode() == ISD::SRA)
9972 if (VT == MVT::v4i32 && Op->getOpcode() == ISD::SHL) {
9991 if (VT == MVT::v16i8 && Op->getOpcode() == ISD::SHL) {
10051 switch (Op.getOpcode()) {
10366 switch (Op.getOpcode()) {
10384 switch (Op.getOpcode()) {
10506 switch (N->getOpcode()) {
11967 switch (MI->getOpcode()) {
12057 switch (MI->getOpcode()) {
12301 unsigned Opc = Op.getOpcode();
12364 if (Op.getOpcode() == X86ISD::SETCC_CARRY)
12376 if (N->getOpcode() == X86ISD::Wrapper) {
12428 if (V1.getOpcode() == ISD::CONCAT_VECTORS &&
12429 V2.getOpcode() == ISD::CONCAT_VECTORS) {
12440 if (V2.getOperand(0).getOpcode() != ISD::BUILD_VECTOR ||
12441 V2.getOperand(1).getOpcode() != ISD::UNDEF ||
12442 V1.getOperand(1).getOpcode() != ISD::UNDEF)
12502 N->getOpcode() == ISD::VECTOR_SHUFFLE)
12542 if (Extract->getOpcode() != ISD::EXTRACT_VECTOR_ELT)
12549 if (Extract->use_begin()->getOpcode() != ISD::SIGN_EXTEND &&
12550 Extract->use_begin()->getOpcode() != ISD::ZERO_EXTEND)
12617 if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
12769 (Cond.getOpcode() == ISD::SETCC || // setcc -> invertible.
12770 (Cond.getOpcode() == ISD::XOR && // xor(X, C) -> invertible.
12867 switch (Cond.getOpcode()) {
13009 !(N->hasOneUse() && N->use_begin()->getOpcode() == ISD::ADD))
13044 if (N1C && N0.getOpcode() == ISD::AND &&
13045 N0.getOperand(1).getOpcode() == ISD::Constant) {
13047 if (N00.getOpcode() == X86ISD::SETCC_CARRY ||
13048 ((N00.getOpcode() == ISD::ANY_EXTEND ||
13049 N00.getOpcode() == ISD::ZERO_EXTEND) &&
13050 N00.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY)) {
13069 N->getOpcode() == ISD::SHL)
13086 if (ShAmtOp.getOpcode() == ISD::BUILD_VECTOR) {
13091 if (Arg.getOpcode() == ISD::UNDEF) continue;
13097 if (Arg.getOpcode() == ISD::UNDEF) continue;
13102 } else if (ShAmtOp.getOpcode() == ISD::VECTOR_SHUFFLE &&
13105 if (InVec.getOpcode() == ISD::BUILD_VECTOR) {
13110 if (Arg.getOpcode() == ISD::UNDEF) continue;
13114 } else if (InVec.getOpcode() == ISD::INSERT_VECTOR_ELT) {
13135 switch (N->getOpcode()) {
13200 if (CMP0.getOpcode() != X86ISD::CMP || CMP0 != CMP1)
13213 switch (UI->getOpcode()) {
13270 if (N->getOpcode() == ISD::BITCAST)
13276 N->getOpcode() == ISD::INSERT_SUBVECTOR) {
13280 if (V1.getOpcode() == ISD::INSERT_SUBVECTOR &&
13281 V1.getOperand(0).getOpcode() == ISD::UNDEF &&
13309 if (N0.getOpcode() == ISD::XOR && isAllOnes(N0.getOperand(1)))
13312 if (N1.getOpcode() == ISD::XOR && isAllOnes(N1.getOperand(1)))
13330 if (N0.getOpcode() == ISD::XOR &&
13336 if (N1.getOpcode() == ISD::XOR &&
13365 if (N0.getOpcode() == X86ISD::ANDNP)
13368 if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) {
13382 if (Mask.getOpcode() != ISD::BITCAST ||
13383 X.getOpcode() != ISD::BITCAST ||
13384 Y.getOpcode() != ISD::BITCAST)
13393 if (Mask.getOpcode() != ISD::INTRINSIC_WO_CHAIN)
13419 if (Y.getOpcode() == ISD::SUB && Y.getOperand(1) == X &&
13448 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
13450 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL)
13461 if (ShAmt0.getOpcode() == ISD::TRUNCATE)
13463 if (ShAmt1.getOpcode() == ISD::TRUNCATE)
13470 if (ShAmt0.getOpcode() == ISD::SUB) {
13477 if (ShAmt1.getOpcode() == ISD::SUB) {
13481 if (ShAmt1Op1.getNode()->getOpcode() == ISD::TRUNCATE)
13600 StoredVal.getNode()->getOpcode() == ISD::CONCAT_VECTORS &&
13723 ChainVal->getOpcode() == ISD::TokenFactor) {
13830 if (LHS.getOpcode() != ISD::VECTOR_SHUFFLE &&
13831 RHS.getOpcode() != ISD::VECTOR_SHUFFLE)
13845 if (LHS.getOpcode() == ISD::VECTOR_SHUFFLE) {
13846 if (LHS.getOperand(0).getOpcode() != ISD::UNDEF)
13848 if (LHS.getOperand(1).getOpcode() != ISD::UNDEF)
13852 if (LHS.getOpcode() != ISD::UNDEF)
13862 if (RHS.getOpcode() == ISD::VECTOR_SHUFFLE) {
13863 if (RHS.getOperand(0).getOpcode() != ISD::UNDEF)
13865 if (RHS.getOperand(1).getOpcode() != ISD::UNDEF)
13869 if (RHS.getOpcode() != ISD::UNDEF)
13951 assert(N->getOpcode() == X86ISD::FOR || N->getOpcode() == X86ISD::FXOR);
13997 if (Op.getOpcode() == ISD::BITCAST)
14000 if (Op.getOpcode() == X86ISD::VZEXT_LOAD &&
14016 if (N0.getOpcode() == ISD::AND &&
14020 if (N00.getOpcode() != X86ISD::SETCC_CARRY)
14057 if (Op0.getOpcode() == ISD::LOAD) {
14106 SDValue Ext = N->getOperand(N->getOpcode() == ISD::SUB ? 1 : 0);
14107 if (Ext.getOpcode() != ISD::ZERO_EXTEND || !Ext.hasOneUse())
14111 if (SetCC.getOpcode() != X86ISD::SETCC || !SetCC.hasOneUse())
14119 if (Cmp.getOpcode() != X86ISD::CMP || !Cmp.hasOneUse() ||
14128 SDValue OtherVal = N->getOperand(N->getOpcode() == ISD::SUB ? 0 : 1);
14130 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::ADC : X86ISD::SBB,
14133 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::SBB : X86ISD::ADC,
14148 if (Op1->hasOneUse() && Op1.getOpcode() == ISD::XOR &&
14166 switch (N->getOpcode()) {
14270 switch (Op.getOpcode()) {
14282 if (UI->getOpcode() != ISD::CopyToReg)
14716 } else if (Op.getOpcode() == ISD::ADD) {
14722 } else if (Op.getOpcode() == ISD::SUB) {
