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    Searched defs:CondCode (Results 1 - 8 of 8) sorted by null

  /external/llvm/lib/Target/XCore/
XCoreInstrInfo.cpp 32 enum CondCode {
130 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc)
143 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
154 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
214 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
236 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc);
290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
404 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()))
    [all...]
  /external/llvm/lib/Target/MBlaze/
MBlazeInstrInfo.h 39 enum CondCode {
89 inline static unsigned GetCondBranchFromCond(CondCode CC) {
103 // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC);
106 inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
  /external/llvm/lib/Target/Mips/InstPrinter/
MipsInstPrinter.h 33 enum CondCode {
73 const char *MipsFCCToString(Mips::CondCode CC);
  /external/llvm/lib/Target/X86/
X86InstrInfo.h 32 enum CondCode {
62 unsigned GetCondBranchFromCond(CondCode CC);
66 CondCode GetOppositeBranchCondition(X86::CondCode CC);
X86ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 102 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, DebugLoc dl);
447 ISD::CondCode CC, DebugLoc dl) {
544 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
578 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert, int &Other) {
612 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
    [all...]
  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 60 BasicBlock, VALUETYPE, CONDCODE, Register,
699 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
712 enum CondCode {
    [all...]
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]

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