| /external/clang/lib/CodeGen/ |
| CodeGenTBAA.cpp | 70 llvm::Value *Ops[] = {
77 unsigned Len = llvm::array_lengthof(Ops) - !Flags;
78 return llvm::MDNode::get(VMContext, llvm::makeArrayRef(Ops, Len));
|
| /external/llvm/lib/Transforms/Utils/ |
| LowerExpectIntrinsic.cpp | 126 Value *Ops[] = {
132 MDNode *WeightsNode = MDNode::get(Context, Ops);
|
| CloneFunction.cpp | 320 SmallVector<Constant*, 8> Ops;
325 Ops.push_back(Op);
330 return ConstantFoldCompareInstOperands(CI->getPredicate(), Ops[0], Ops[1],
335 return ConstantFoldLoadFromConstPtr(Ops[0], TD);
337 return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Ops, TD);
|
| /external/llvm/lib/VMCore/ |
| IRBuilder.cpp | 55 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops,
57 CallInst *CI = CallInst::Create(Callee, Ops, "");
67 Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) };
72 CallInst *CI = createCallHelper(TheFn, Ops, this);
87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) };
92 CallInst *CI = createCallHelper(TheFn, Ops, this);
107 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) };
112 CallInst *CI = createCallHelper(TheFn, Ops, this);
130 Value *Ops[] = { Size, Ptr };
133 return createCallHelper(TheFn, Ops, this)
[all...] |
| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 195 SmallVector<unsigned, 8> Ops;
196 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
199 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI);
|
| ProcessImplicitDefs.cpp | 252 SmallVector<unsigned, 4> Ops;
256 Ops.push_back(j);
262 for (unsigned j = 0, ee = Ops.size(); j != ee; ++j) {
263 unsigned OpIdx = Ops[j];
|
| IntrinsicLowering.cpp | 468 Value *Ops[3];
469 Ops[0] = CI->getArgOperand(0);
470 Ops[1] = CI->getArgOperand(1);
471 Ops[2] = Size;
472 ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getArgOperand(0)->getType());
479 Value *Ops[3];
480 Ops[0] = CI->getArgOperand(0);
481 Ops[1] = CI->getArgOperand(1);
482 Ops[2] = Size
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelDAGToDAG.cpp | 238 SDValue Ops[] = { Callee, GPReg, Chain };
240 MVT::i32, MVT::Other, Ops, 3), 0);
|
| MBlazeISelLowering.cpp | 804 SmallVector<SDValue, 8> Ops;
805 Ops.push_back(Chain);
806 Ops.push_back(Callee);
811 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
816 Ops.push_back(InFlag);
818 Chain = DAG.getNode(MBlazeISD::JmpLink, dl, NodeTys, &Ops[0], Ops.size());
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXISelDAGToDAG.cpp | 102 SDValue Ops[] = { Target, Pred, PredOp, Chain };
103 return CurDAG->getMachineNode(PTX::BRAdp, dl, MVT::Other, Ops, 4);
137 SDValue Ops[] = { Index, Pred, PredOp, Chain };
138 return CurDAG->getMachineNode(OpCode, dl, VT, Ops, 4);
175 SDValue Ops[] = { Value, Pred, PredOp, Chain };
176 SDNode* Ret = CurDAG->getMachineNode(OpCode, dl, MVT::Other, Ops, 4);
|
| PTXISelLowering.cpp | 361 std::vector<SDValue> Ops;
362 // The layout of the ops will be [Chain, #Ins, Ins, Callee, #Outs, Outs]
363 Ops.resize(Outs.size() + Ins.size() + 4);
365 Ops[0] = Chain;
372 Ops[Ins.size()+2] = Callee;
377 Ops[Ins.size()+3] = DAG.getTargetConstant(OutVals.size(), MVT::i32);
386 Ops[i+Ins.size()+4] = ParamValue;
392 Ops[1] = DAG.getTargetConstant(Ins.size(), MVT::i32);
399 Ops[i+2] = ParamValue;
403 Ops[0] = Chain
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 140 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
141 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
154 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
155 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops));
234 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
235 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops,
236 array_lengthof(Ops));
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 184 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
187 Ops, 3);
190 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
193 Ops, 3);
196 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
199 Ops, 4);
202 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
205 Ops, 4);
208 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
211 Ops, 4)
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 372 SDValue Ops[] = { Chain, Callee, InFlag };
373 Chain = DAG.getNode(BFISD::CALL, dl, NodeTys, Ops,
454 SDValue ops[2] = { SDValue(Sum, 0), SDValue(CarryOut, 0) }; local
455 return DAG.getMergeValues(ops, 2, dl);
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 226 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
232 SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, dl, VT, Ops, 2);
|
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolution.h | 564 const SCEV *getAddExpr(SmallVectorImpl<const SCEV *> &Ops,
568 SmallVector<const SCEV *, 2> Ops;
569 Ops.push_back(LHS);
570 Ops.push_back(RHS);
571 return getAddExpr(Ops, Flags);
575 SmallVector<const SCEV *, 3> Ops;
576 Ops.push_back(Op0);
577 Ops.push_back(Op1);
578 Ops.push_back(Op2);
579 return getAddExpr(Ops, Flags)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 122 SmallVector<SDValue, 8> Ops;
124 Ops.push_back(LegalizeOp(Node->getOperand(i)));
127 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0);
475 SmallVector<SDValue, 8> Ops(NumElems);
481 Ops[i] = DAG.getNode(ISD::SETCC, dl, TLI.getSetCCResultType(TmpEltVT),
483 Ops[i] = DAG.getNode(ISD::SELECT, dl, EltVT, Ops[i],
488 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElems);
|
| LegalizeTypes.cpp | [all...] |
| ScheduleDAGSDNodes.cpp | 142 SmallVector<SDValue, 4> Ops;
144 Ops.push_back(N->getOperand(I));
147 Ops.push_back(Glue);
159 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size());
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 644 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
646 Ops, array_lengthof(Ops));
729 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
731 Ops, array_lengthof(Ops));
|
| SystemZISelLowering.cpp | 477 SmallVector<SDValue, 8> Ops;
478 Ops.push_back(Chain);
479 Ops.push_back(Callee);
484 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
488 Ops.push_back(InFlag);
490 Chain = DAG.getNode(SystemZISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
716 SmallVector<SDValue, 4> Ops;
717 Ops.push_back(TrueV);
718 Ops.push_back(FalseV)
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 682 std::vector<Value*> Ops;
688 Ops.reserve(SI->size());
697 Ops.push_back(ConstantInt::get(IdxTy, *II));
702 V = GetElementPtrInst::Create(V, Ops, V->getName()+".idx", Call);
703 Ops.clear();
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 410 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
411 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
418 SDValue Ops[] = { Chain, Reg, N, Glue };
419 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
424 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
425 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
434 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
435 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
477 SDValue Ops[] = { Chain, Op };
478 return getNode(ISD::CALLSEQ_START, DebugLoc(), VTs, Ops, 2)
[all...] |
| /external/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 62 Constant *Ops = C; // don't take the address of C!
63 return FoldBitCast(ConstantVector::get(Ops), DestTy, TD);
544 static Constant *CastGEPIndices(ArrayRef<Constant *> Ops,
552 for (unsigned i = 1, e = Ops.size(); i != e; ++i) {
554 !isa<StructType>(GetElementPtrInst::getIndexedType(Ops[0]->getType(),
555 Ops.slice(1, i-1)))) &&
556 Ops[i]->getType() != IntPtrTy) {
558 NewIdxs.push_back(ConstantExpr::getCast(CastInst::getCastOpcode(Ops[i],
562 Ops[i], IntPtrTy));
564 NewIdxs.push_back(Ops[i])
[all...] |
| InstructionSimplify.cpp | 547 Constant *Ops[] = { CLHS, CRHS };
549 Ops, TD);
616 Constant *Ops[] = { CLHS, CRHS };
618 Ops, TD);
736 Constant *Ops[] = { CLHS, CRHS };
738 Ops, TD);
[all...] |
