| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.h | 26 const ARMSubtarget &STI;
29 explicit ARMFrameLowering(const ARMSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4),
31 STI(sti) {
|
| ARMHazardRecognizer.h | 29 const ARMSubtarget &STI;
40 const ARMSubtarget &sti,
43 TRI(tri), STI(sti), LastMI(0), ITBlockSize(0) {}
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| ARMBaseRegisterInfo.h | 78 const ARMSubtarget &STI;
90 const ARMSubtarget &STI);
|
| MLxExpansionPass.cpp | 316 const ARMSubtarget *STI = &Fn.getTarget().getSubtarget<ARMSubtarget>();
317 isA9 = STI->isCortexA9();
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| ARMExpandPseudoInsts.cpp | 45 const ARMSubtarget *STI;
655 if (!STI->hasV6T2Ops() &&
[all...] |
| Thumb2SizeReduction.cpp | 137 const ARMSubtarget *STI;
214 if (!Def || !STI->avoidCPSRPartialUpdate())
878 STI = &TM.getSubtarget<ARMSubtarget>();
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| ARMConstantIslandPass.cpp | 169 const ARMSubtarget *STI;
277 STI = &MF.getTarget().getSubtarget<ARMSubtarget>();
360 if (isThumb2 && !STI->prefers32BitThumb())
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinFrameLowering.h | 26 const BlackfinSubtarget &STI;
29 explicit BlackfinFrameLowering(const BlackfinSubtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0), STI(sti) {
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| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.h | 26 const MSP430Subtarget &STI;
29 explicit MSP430FrameLowering(const MSP430Subtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2), STI(sti) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.h | 26 const MipsSubtarget &STI;
29 explicit MipsFrameLowering(const MipsSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, sti.hasMips64() ? 16 : 8, 0),
31 STI(sti) {
|
| /external/llvm/lib/Target/Alpha/ |
| AlphaFrameLowering.h | 25 const AlphaSubtarget &STI;
29 explicit AlphaFrameLowering(const AlphaSubtarget &sti)
30 : TargetFrameLowering(StackGrowsDown, 16, 0), STI(sti), curgpdist(0) {
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeFrameLowering.h | 26 const MBlazeSubtarget &STI;
29 explicit MBlazeFrameLowering(const MBlazeSubtarget &sti)
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 4, 0), STI(sti) {
|
| /external/llvm/lib/Target/PTX/ |
| PTXFrameLowering.h | 26 const PTXSubtarget &STI;
29 explicit PTXFrameLowering(const PTXSubtarget &sti)
31 STI(sti) {
|
| PTXTargetMachine.cpp | 143 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
150 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI);
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| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.h | 25 const SparcSubtarget &STI;
27 explicit SparcFrameLowering(const SparcSubtarget &sti)
28 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0), STI(sti) {
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| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 27 const X86Subtarget &STI;
29 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti)
31 sti.getStackAlignment(),
32 (sti.is64Bit() ? -8 : -4)),
33 TM(tm), STI(sti) {
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.h | 25 const XCoreSubtarget &STI;
27 XCoreFrameLowering(const XCoreSubtarget &STI);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.h | 28 const SystemZSubtarget &STI;
31 explicit SystemZFrameLowering(const SystemZSubtarget &sti);
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 33 const MCSubtargetInfo &STI;
36 MipsMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
38 : MCII(mcii), STI(sti) {}
49 const MCSubtargetInfo &STI,
51 return new MipsMCCodeEmitter(MCII, STI, Ctx);
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| /external/llvm/include/llvm/MC/ |
| MCDisassembler.h | 58 MCDisassembler(const MCSubtargetInfo &STI) : GetOpInfo(0), SymbolLookUp(0),
60 STI(STI), CommentStream(0) {}
110 const MCSubtargetInfo &STI;
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| /external/llvm/lib/CodeGen/ |
| LLVMTargetMachine.cpp | 140 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
147 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI);
153 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
154 MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), STI, *Context);
172 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), STI,
249 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
250 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(),STI, *Ctx);
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| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.cpp | 60 const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(TripleName, CPU,
62 assert(STI && "Unable to create subtarget info!");
69 MCDisassembler *DisAsm = TheTarget->createMCDisassembler(*STI);
76 *MAI, *STI);
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| EDDisassembler.h | 141 llvm::OwningPtr<const llvm::MCSubtargetInfo> STI;
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.cpp | 40 const MCSubtargetInfo* STI;
44 : MCAsmBackend(), STI(ARM_MC::createARMMCSubtargetInfo(TT, "", "")),
48 delete STI;
54 return (STI->getFeatureBits() & ARM::HasV6T2Ops) != 0;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 34 const MCSubtargetInfo &STI;
37 X86MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
39 : MCII(mcii), STI(sti), Ctx(ctx) {
46 return (STI.getFeatureBits() & X86::Mode64Bit) != 0;
137 const MCSubtargetInfo &STI,
139 return new X86MCCodeEmitter(MCII, STI, Ctx);
[all...] |
