1 //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the X86 specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef X86SUBTARGET_H 15 #define X86SUBTARGET_H 16 17 #include "llvm/ADT/Triple.h" 18 #include "llvm/Target/TargetSubtargetInfo.h" 19 #include "llvm/CallingConv.h" 20 #include <string> 21 22 #define GET_SUBTARGETINFO_HEADER 23 #include "X86GenSubtargetInfo.inc" 24 25 namespace llvm { 26 class GlobalValue; 27 class StringRef; 28 class TargetMachine; 29 30 /// PICStyles - The X86 backend supports a number of different styles of PIC. 31 /// 32 namespace PICStyles { 33 enum Style { 34 StubPIC, // Used on i386-darwin in -fPIC mode. 35 StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode. 36 GOT, // Used on many 32-bit unices in -fPIC mode. 37 RIPRel, // Used on X86-64 when not in -static mode. 38 None // Set when in -static mode (not PIC or DynamicNoPIC mode). 39 }; 40 } 41 42 class X86Subtarget : public X86GenSubtargetInfo { 43 protected: 44 enum X86SSEEnum { 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 46 }; 47 48 enum X863DNowEnum { 49 NoThreeDNow, ThreeDNow, ThreeDNowA 50 }; 51 52 /// PICStyle - Which PIC style to use 53 /// 54 PICStyles::Style PICStyle; 55 56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or 57 /// none supported. 58 X86SSEEnum X86SSELevel; 59 60 /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported. 61 /// 62 X863DNowEnum X863DNowLevel; 63 64 /// HasCMov - True if this processor has conditional move instructions 65 /// (generally pentium pro+). 66 bool HasCMov; 67 68 /// HasX86_64 - True if the processor supports X86-64 instructions. 69 /// 70 bool HasX86_64; 71 72 /// HasPOPCNT - True if the processor supports POPCNT. 73 bool HasPOPCNT; 74 75 /// HasSSE4A - True if the processor supports SSE4A instructions. 76 bool HasSSE4A; 77 78 /// HasAVX - Target has AVX instructions 79 bool HasAVX; 80 81 /// HasAES - Target has AES instructions 82 bool HasAES; 83 84 /// HasCLMUL - Target has carry-less multiplication 85 bool HasCLMUL; 86 87 /// HasFMA3 - Target has 3-operand fused multiply-add 88 bool HasFMA3; 89 90 /// HasFMA4 - Target has 4-operand fused multiply-add 91 bool HasFMA4; 92 93 /// HasMOVBE - True if the processor has the MOVBE instruction. 94 bool HasMOVBE; 95 96 /// HasRDRAND - True if the processor has the RDRAND instruction. 97 bool HasRDRAND; 98 99 /// HasF16C - Processor has 16-bit floating point conversion instructions. 100 bool HasF16C; 101 102 /// HasLZCNT - Processor has LZCNT instruction. 103 bool HasLZCNT; 104 105 /// HasBMI - Processor has BMI1 instructions. 106 bool HasBMI; 107 108 /// HasBMI2 - Processor has BMI2 instructions. 109 bool HasBMI2; 110 111 /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow. 112 bool IsBTMemSlow; 113 114 /// IsUAMemFast - True if unaligned memory access is fast. 115 bool IsUAMemFast; 116 117 /// HasVectorUAMem - True if SIMD operations can have unaligned memory 118 /// operands. This may require setting a feature bit in the processor. 119 bool HasVectorUAMem; 120 121 /// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction; 122 /// this is true for most x86-64 chips, but not the first AMD chips. 123 bool HasCmpxchg16b; 124 125 /// stackAlignment - The minimum alignment known to hold of the stack frame on 126 /// entry to the function and which must be maintained by every function. 127 unsigned stackAlignment; 128 129 /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops. 130 /// 131 unsigned MaxInlineSizeThreshold; 132 133 /// TargetTriple - What processor and OS we're targeting. 134 Triple TargetTriple; 135 136 private: 137 /// In64BitMode - True if compiling for 64-bit, false for 32-bit. 138 bool In64BitMode; 139 140 public: 141 142 /// This constructor initializes the data members to match that 143 /// of the specified triple. 144 /// 145 X86Subtarget(const std::string &TT, const std::string &CPU, 146 const std::string &FS, 147 unsigned StackAlignOverride, bool is64Bit); 148 149 /// getStackAlignment - Returns the minimum alignment known to hold of the 150 /// stack frame on entry to the function and which must be maintained by every 151 /// function for this subtarget. 152 unsigned getStackAlignment() const { return stackAlignment; } 153 154 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size 155 /// that still makes it profitable to inline the call. 156 unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; } 157 158 /// ParseSubtargetFeatures - Parses features string setting specified 159 /// subtarget options. Definition of function is auto generated by tblgen. 160 void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 161 162 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID 163 /// instruction. 164 void AutoDetectSubtargetFeatures(); 165 166 bool is64Bit() const { return In64BitMode; } 167 168 PICStyles::Style getPICStyle() const { return PICStyle; } 169 void setPICStyle(PICStyles::Style Style) { PICStyle = Style; } 170 171 bool hasCMov() const { return HasCMov; } 172 bool hasMMX() const { return X86SSELevel >= MMX; } 173 bool hasSSE1() const { return X86SSELevel >= SSE1; } 174 bool hasSSE2() const { return X86SSELevel >= SSE2; } 175 bool hasSSE3() const { return X86SSELevel >= SSE3; } 176 bool hasSSSE3() const { return X86SSELevel >= SSSE3; } 177 bool hasSSE41() const { return X86SSELevel >= SSE41; } 178 bool hasSSE42() const { return X86SSELevel >= SSE42; } 179 bool hasSSE4A() const { return HasSSE4A; } 180 bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } 181 bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } 182 bool hasPOPCNT() const { return HasPOPCNT; } 183 bool hasAVX() const { return HasAVX; } 184 bool hasXMM() const { return hasSSE1() || hasAVX(); } 185 bool hasXMMInt() const { return hasSSE2() || hasAVX(); } 186 bool hasAES() const { return HasAES; } 187 bool hasCLMUL() const { return HasCLMUL; } 188 bool hasFMA3() const { return HasFMA3; } 189 bool hasFMA4() const { return HasFMA4; } 190 bool hasMOVBE() const { return HasMOVBE; } 191 bool hasRDRAND() const { return HasRDRAND; } 192 bool hasF16C() const { return HasF16C; } 193 bool hasLZCNT() const { return HasLZCNT; } 194 bool hasBMI() const { return HasBMI; } 195 bool hasBMI2() const { return HasBMI2; } 196 bool isBTMemSlow() const { return IsBTMemSlow; } 197 bool isUnalignedMemAccessFast() const { return IsUAMemFast; } 198 bool hasVectorUAMem() const { return HasVectorUAMem; } 199 bool hasCmpxchg16b() const { return HasCmpxchg16b; } 200 201 const Triple &getTargetTriple() const { return TargetTriple; } 202 203 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); } 204 bool isTargetFreeBSD() const { 205 return TargetTriple.getOS() == Triple::FreeBSD; 206 } 207 bool isTargetSolaris() const { 208 return TargetTriple.getOS() == Triple::Solaris; 209 } 210 211 // ELF is a reasonably sane default and the only other X86 targets we 212 // support are Darwin and Windows. Just use "not those". 213 bool isTargetELF() const { 214 return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing(); 215 } 216 bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; } 217 bool isTargetNaCl() const { 218 return TargetTriple.getOS() == Triple::NativeClient; 219 } 220 bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); } 221 bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); } 222 223 bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; } 224 bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; } 225 bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; } 226 bool isTargetCygMing() const { 227 return isTargetMingw() || isTargetCygwin(); 228 } 229 230 /// isTargetCOFF - Return true if this is any COFF/Windows target variant. 231 bool isTargetCOFF() const { 232 return isTargetMingw() || isTargetCygwin() || isTargetWindows(); 233 } 234 235 bool isTargetWin64() const { 236 // FIXME: x86_64-cygwin has not been released yet. 237 return In64BitMode && (isTargetCygMing() || isTargetWindows()); 238 } 239 240 bool isTargetEnvMacho() const { 241 return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO); 242 } 243 244 bool isTargetWin32() const { 245 return !In64BitMode && (isTargetMingw() || isTargetWindows()); 246 } 247 248 bool isPICStyleSet() const { return PICStyle != PICStyles::None; } 249 bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; } 250 bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; } 251 252 bool isPICStyleStubPIC() const { 253 return PICStyle == PICStyles::StubPIC; 254 } 255 256 bool isPICStyleStubNoDynamic() const { 257 return PICStyle == PICStyles::StubDynamicNoPIC; 258 } 259 bool isPICStyleStubAny() const { 260 return PICStyle == PICStyles::StubDynamicNoPIC || 261 PICStyle == PICStyles::StubPIC; } 262 263 /// ClassifyGlobalReference - Classify a global variable reference for the 264 /// current subtarget according to how we should reference it in a non-pcrel 265 /// context. 266 unsigned char ClassifyGlobalReference(const GlobalValue *GV, 267 const TargetMachine &TM)const; 268 269 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the 270 /// current subtarget according to how we should reference it in a non-pcrel 271 /// context. 272 unsigned char ClassifyBlockAddressReference() const; 273 274 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls 275 /// to immediate address. 276 bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const; 277 278 /// This function returns the name of a function which has an interface 279 /// like the non-standard bzero function, if such a function exists on 280 /// the current subtarget and it is considered prefereable over 281 /// memset with zero passed as the second argument. Otherwise it 282 /// returns null. 283 const char *getBZeroEntry() const; 284 285 /// getSpecialAddressLatency - For targets where it is beneficial to 286 /// backschedule instructions that compute addresses, return a value 287 /// indicating the number of scheduling cycles of backscheduling that 288 /// should be attempted. 289 unsigned getSpecialAddressLatency() const; 290 }; 291 292 } // End llvm namespace 293 294 #endif 295
