| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 320 BSWAP, CTTZ, CTLZ, CTPOP,
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 72 // The expansion of CTLZ/CTTZ uses AND/OR, so we might as well promote
74 setOperationAction(ISD::CTLZ, MVT::i16, Promote);
112 // i32 has native CTPOP, but not CTLZ/CTTZ
113 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 113 setOperationAction(ISD::CTLZ, MVT::i32, Promote);
114 setOperationAction(ISD::CTLZ, MVT::i64, Legal);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 189 case ISD::CTLZ:
|
| LegalizeDAG.cpp | [all...] |
| LegalizeVectorTypes.cpp | 68 case ISD::CTLZ:
444 case ISD::CTLZ:
[all...] |
| LegalizeIntegerTypes.cpp | 60 case ISD::CTLZ: Res = PromoteIntRes_CTLZ(N); break;
315 Op = DAG.getNode(ISD::CTLZ, dl, NVT, Op);
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 283 // SPU does not have BSWAP. It does have i32 support CTLZ.
300 setOperationAction(ISD::CTLZ , MVT::i8, Promote);
301 setOperationAction(ISD::CTLZ , MVT::i16, Promote);
302 setOperationAction(ISD::CTLZ , MVT::i32, Legal);
303 setOperationAction(ISD::CTLZ , MVT::i64, Expand);
304 setOperationAction(ISD::CTLZ , MVT::i128, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 127 setOperationAction(ISD::CTLZ, MVT::i8, Expand);
128 setOperationAction(ISD::CTLZ, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 169 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 91 setOperationAction(ISD::CTLZ , MVT::i64 , Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 766 setOperationAction(ISD::CTLZ , MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 393 setOperationAction(ISD::CTLZ , MVT::i8 , Promote);
395 setOperationAction(ISD::CTLZ , MVT::i8 , Custom);
396 setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
397 setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
399 setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
718 setOperationAction(ISD::CTLZ, (MVT::SimpleValueType)VT, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 335 setOperationAction(ISD::CTLZ, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 212 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 579 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
[all...] |
