| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 320 BSWAP, CTTZ, CTLZ, CTPOP,
[all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 72 // The expansion of CTLZ/CTTZ uses AND/OR, so we might as well promote
75 setOperationAction(ISD::CTTZ, MVT::i16, Promote);
112 // i32 has native CTPOP, but not CTLZ/CTTZ
114 setOperationAction(ISD::CTTZ, MVT::i32, Expand);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 111 setOperationAction(ISD::CTTZ, MVT::i32, Expand);
112 setOperationAction(ISD::CTTZ, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 188 case ISD::CTTZ:
|
| LegalizeVectorTypes.cpp | 70 case ISD::CTTZ:
446 case ISD::CTTZ:
[all...] |
| LegalizeIntegerTypes.cpp | 62 case ISD::CTTZ: Res = PromoteIntRes_CTTZ(N); break;
339 return DAG.getNode(ISD::CTTZ, dl, NVT, Op);
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 294 setOperationAction(ISD::CTTZ , MVT::i8, Expand);
295 setOperationAction(ISD::CTTZ , MVT::i16, Expand);
296 setOperationAction(ISD::CTTZ , MVT::i32, Expand);
297 setOperationAction(ISD::CTTZ , MVT::i64, Expand);
298 setOperationAction(ISD::CTTZ , MVT::i128, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 125 setOperationAction(ISD::CTTZ, MVT::i8, Expand);
126 setOperationAction(ISD::CTTZ, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 170 setOperationAction(ISD::CTTZ, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 90 setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 765 setOperationAction(ISD::CTTZ , MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 146 // PowerPC does not have BSWAP, CTPOP or CTTZ
149 setOperationAction(ISD::CTTZ , MVT::i32 , Expand);
152 setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
336 setOperationAction(ISD::CTTZ, VT, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 383 setOperationAction(ISD::CTTZ , MVT::i8 , Promote);
385 setOperationAction(ISD::CTTZ , MVT::i8 , Custom);
386 setOperationAction(ISD::CTTZ , MVT::i16 , Custom);
387 setOperationAction(ISD::CTTZ , MVT::i32 , Custom);
389 setOperationAction(ISD::CTTZ , MVT::i64 , Custom);
717 setOperationAction(ISD::CTTZ, (MVT::SimpleValueType)VT, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 155 setOperationAction(ISD::CTTZ, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 576 setOperationAction(ISD::CTTZ, MVT::i32, Custom);
[all...] |
