/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 60 BasicBlock, VALUETYPE, CONDCODE, Register, 699 /// ISD::CondCode enum - These are ordered carefully to make the bitfields 712 enum CondCode { [all...] |
Analysis.h | 71 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred); 76 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
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SelectionDAG.h | 438 SDValue getCondCode(ISD::CondCode Cond); 563 /// have an ISD::CondCode instead of an SDValue. 566 ISD::CondCode Cond) { 575 /// just have an ISD::CondCode instead of an SDValue. 578 SDValue True, SDValue False, ISD::CondCode Cond) { [all...] |
/external/llvm/lib/Target/Mips/InstPrinter/ |
MipsInstPrinter.h | 33 enum CondCode { 73 const char *MipsFCCToString(Mips::CondCode CC);
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MipsInstPrinter.cpp | 26 const char* Mips::MipsFCCToString(Mips::CondCode CC) { 128 O << MipsFCCToString((Mips::CondCode)MO.getImm());
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/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.cpp | 32 enum CondCode { 130 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) 143 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) 154 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) 214 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); 236 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); 290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); 299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); 404 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())) [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeInstrInfo.h | 39 enum CondCode { 89 inline static unsigned GetCondBranchFromCond(CondCode CC) { 103 // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC); 106 inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
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/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 32 enum CondCode { 62 unsigned GetCondBranchFromCond(CondCode CC); 66 CondCode GetOppositeBranchCondition(X86::CondCode CC);
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X86InstrInfo.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
Analysis.cpp | 151 ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) { 152 ISD::CondCode FPC, FOC; 184 ISD::CondCode llvm::getICmpCondCode(ICmpInst::Predicate Pred) {
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/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 102 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, DebugLoc dl); 447 ISD::CondCode CC, DebugLoc dl) { 544 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) { 578 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert, int &Other) { 612 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get(); [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.h | 81 ISD::CondCode CC, SDValue &SystemZCC,
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SystemZISelLowering.cpp | 610 ISD::CondCode CC, SDValue &SystemZCC, 691 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); 709 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); [all...] |
/external/llvm/include/llvm/Target/ |
TargetLowering.h | 475 getCondCodeAction(ISD::CondCode CC, EVT VT) const { 487 bool isCondCodeLegal(ISD::CondCode CC, EVT VT) const { [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypes.h | 288 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code); 362 ISD::CondCode &CCCode, DebugLoc dl); 435 ISD::CondCode &CCCode, DebugLoc dl); 491 ISD::CondCode &CCCode, DebugLoc dl); [all...] |
LegalizeFloatTypes.cpp | 613 ISD::CondCode &CCCode, DebugLoc dl) { 714 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get(); [all...] |
SelectionDAGBuilder.h | 206 CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs, 216 ISD::CondCode CC;
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/external/llvm/lib/Target/Mips/ |
MipsAsmPrinter.cpp | 416 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
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MipsISelLowering.cpp | 452 static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) { 480 static bool InvertFPCondCode(Mips::CondCode CC) { 508 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); 517 bool invert = InvertFPCondCode((Mips::CondCode) 701 static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) { [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 645 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) { 663 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) { [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.h | 488 SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
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ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaISelDAGToDAG.cpp | 304 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
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/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 667 ISD::CondCode CC, 751 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); 783 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); [all...] |
/external/llvm/lib/Target/PTX/ |
PTXISelLowering.cpp | 153 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
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