| /external/javassist/src/main/javassist/bytecode/ |
| Opcode.java | 102 int FNEG = 118;
362 0, // fneg, 118
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 446 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
450 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 59 // Implements expansion for FNEG; falls back to UnrollVectorOp if FSUB
201 case ISD::FNEG:
250 else if (Node->getOpcode() == ISD::FNEG)
|
| LegalizeFloatTypes.cpp | 81 case ISD::FNEG: R = SoftenFloatRes_FNEG(N); break;
343 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
[all...] |
| DAGCombiner.cpp | 370 // fneg is removable even if it has multiple uses.
371 if (Op.getOpcode() == ISD::FNEG) return 2;
389 // fold (fsub (fadd A, B)) -> (fsub (fneg A), B)
392 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
398 // fold (fneg (fsub A, B)) -> (fsub B, A)
405 // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y) or (fmul X, (fneg Y))
422 // fneg is removable even if it has multiple uses
[all...] |
| LegalizeVectorTypes.cpp | 81 case ISD::FNEG:
457 case ISD::FNEG:
[all...] |
| LegalizeDAG.cpp | [all...] |
| FastISel.cpp | 792 /// SelectFNeg - Emit an FNeg operation.
801 // If the target has ISD::FNEG, use it.
804 ISD::FNEG, OpReg, OpRegIsKill);
889 // FNeg is currently represented in LLVM IR as a special case of FSub.
[all...] |
| SelectionDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /dalvik/dx/src/com/android/dx/cf/code/ |
| ByteOps.java | 145 public static final int FNEG = 0x76;
472 "76 - fneg;" +
|
| BytecodeArray.java | 624 case ByteOps.FNEG: {
[all...] |
| /prebuilt/common/asm/ |
| asm-3.1.jar | |
| /external/javassist/src/main/javassist/bytecode/analysis/ |
| Executor.java | 374 case FNEG:
[all...] |
| /external/javassist/src/main/javassist/compiler/ |
| CodeGen.java | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | 795 } else if (Opc == ISD::FNEG
799 // (fneg (fsub (fmul R64FP:$rA, R64FP:$rB), R64FP:$rC))
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 558 // Use XORP to simulate FNEG.
559 setOperationAction(ISD::FNEG , MVT::f64, Custom);
560 setOperationAction(ISD::FNEG , MVT::f32, Custom);
589 // Use XORP to simulate FNEG.
590 setOperationAction(ISD::FNEG , MVT::f32, Custom);
689 setOperationAction(ISD::FNEG, (MVT::SimpleValueType)VT, Expand);
[all...] |
| /prebuilt/common/jarjar/ |
| jarjar-1.0rc8.jar | |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 324 setOperationAction(ISD::FNEG, VT, Expand);
[all...] |
| /prebuilt/sdk/tools/lib/ |
| dx.jar | |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 467 setOperationAction(ISD::FNEG, MVT::v2f64, Expand);
[all...] |
| /prebuilt/common/groovy/ |
| groovy-all-1.7.0.jar | |
