| /external/chromium/net/base/ |
| load_flags_list.h | 101 // Indicates that this load was motivated by the rel=prefetch feature,
103 LOAD_FLAG(PREFETCH, 1 << 23)
|
| /external/chromium/webkit/glue/ |
| resource_type.h | 25 PREFETCH, // an explicitly requested prefetch
|
| weburlloader_impl.cc | 137 return ResourceType::PREFETCH;
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 586 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
587 // their first operand. The other operands are the address to prefetch,
590 PREFETCH,
[all...] |
| SelectionDAGNodes.h | [all...] |
| /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ |
| rtl.def | 236 /* Memory prefetch, with attributes supported on some targets.
244 whose prefetch instructions do not support them. */
245 DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA)
[all...] |
| system.h | 238 # undef PREFETCH
|
| genrtl.h | 274 gen_rtx_fmt_eee (PREFETCH, (MODE), (ARG0), (ARG1), (ARG2))
|
| /external/oprofile/events/mips/24K/ |
| events | 38 event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed
102 event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit
|
| /external/oprofile/events/mips/34K/ |
| events | 38 event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed
110 event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit
|
| /external/oprofile/events/mips/1004K/ |
| events | 38 event:0x14 counters:0 um:zero minimum:500 name:PREFETCH_INSNS : 20-0 PREFETCH instructions completed
118 event:0x414 counters:1 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 20-1 PREFETCH instructions completed with cache hit
|
| /external/oprofile/events/i386/atom/ |
| events | 15 event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions executed
25 event:0x24 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_IN : L2 cache misses
27 event:0x26 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_OUT : L2 cache lines evicted
28 event:0x27 counters:0,1 um:core,prefetch minimum:500 name:L2_M_LINES_OUT : Modified lines evicted from the L2 cache
30 event:0x29 counters:0,1 um:core,prefetch,mesi minimum:6000 name:L2_LD : L2 cache reads
33 event:0x2E counters:0,1 um:l2_rqsts,core,prefetch,mesi minimum:6000 name:L2_RQSTS : L2 cache requests
34 event:0x30 counters:0,1 um:core,prefetch,mesi minimum:500 name:L2_REJECT_BUSQ : Rejected L2 cache requests
|
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/ |
| system.h | 238 # undef PREFETCH
|
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/ |
| system.h | 238 # undef PREFETCH
|
| /external/oprofile/events/mips/74K/ |
| events | 68 event:0x34 counters:0,2 um:zero minimum:500 name:PREFETCH_INSNS : 52-0 Prefetch instructions graduated
142 event:0x434 counters:1,3 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 52-1 PREFETCH instructions which did nothing, because they hit in the cache
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 569 // Most targets ignore the @llvm.prefetch intrinsic.
570 setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 660 setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 463 setOperationAction(ISD::PREFETCH , MVT::Other, Legal);
[all...] |
