/external/chromium/net/http/ |
md4.cc | 65 #define ROTL(x,n) (((x) << (n)) | ((x) >> (0x20 - n))) 68 #define RD1(a,b,c,d,k,s) a += F(b,c,d) + X[k]; a = ROTL(a,s) 71 #define RD2(a,b,c,d,k,s) a += G(b,c,d) + X[k] + 0x5A827999; a = ROTL(a,s) 74 #define RD3(a,b,c,d,k,s) a += H(b,c,d) + X[k] + 0x6ED9EBA1; a = ROTL(a,s)
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/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 317 SHL, SRA, SRL, ROTL, ROTR, [all...] |
/external/dbus/dbus/ |
dbus-sha.c | 125 #define ROTL(n,X) ( ( ( X ) << n ) | ( ( X ) >> ( 32 - n ) ) ) 141 #define expand(W,i) ( W[ i & 15 ] = ROTL( 1, ( W[ i & 15 ] ^ W[ (i - 14) & 15 ] ^ \ 147 a' = e + ROTL( 5, a ) + f( b, c, d ) + k + data; 149 c' = ROTL( 30, b ); 159 ( e += ROTL( 5, a ) + f( b, c, d ) + k + data, b = ROTL( 30, b ) )
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/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 186 case ISD::ROTL:
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DAGCombiner.cpp | [all...] |
SelectionDAG.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 358 } else if (Opcode == ISD::ROTL) { [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 239 setOperationAction(ISD::ROTL, MVT::i32, Legal); 240 setOperationAction(ISD::ROTL, MVT::i16, Legal); 241 setOperationAction(ISD::ROTL, MVT::i8, Custom); [all...] |
/external/openssl/crypto/bn/asm/ |
ppc.pl | 126 $ROTL= "rotlwi"; # rotate left by immediate 150 $ROTL= "rotldi"; # rotate left by immediate [all...] |
/external/valgrind/main/VEX/priv/ |
guest_ppc_toIR.c | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 104 setOperationAction(ISD::ROTL, MVT::i8, Expand); 106 setOperationAction(ISD::ROTL, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 164 setOperationAction(ISD::ROTL, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 94 setOperationAction(ISD::ROTL , MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 767 setOperationAction(ISD::ROTL , MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 156 setOperationAction(ISD::ROTL, MVT::i32, Expand); 157 setOperationAction(ISD::ROTL, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 110 setOperationAction(ISD::ROTL , MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 574 // ARM does not have ROTL. 575 setOperationAction(ISD::ROTL, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 722 setOperationAction(ISD::ROTL, (MVT::SimpleValueType)VT, Expand); [all...] |